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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
3bf801a2 AR |
2 | /* |
3 | * USB armory MkI board configuration settings | |
4 | * http://inversepath.com/usbarmory | |
5 | * | |
6 | * Copyright (C) 2015, Inverse Path | |
7 | * Andrej Rosano <andrej@inversepath.com> | |
3bf801a2 AR |
8 | */ |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
12 | ||
18fb0e3c | 13 | #define CONFIG_SYS_FSL_CLK |
3bf801a2 AR |
14 | |
15 | #include <asm/arch/imx-regs.h> | |
3bf801a2 | 16 | |
3bf801a2 | 17 | /* U-Boot environment */ |
3bf801a2 AR |
18 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
19 | ||
20 | /* U-Boot general configurations */ | |
21 | #define CONFIG_SYS_CBSIZE 512 | |
3bf801a2 AR |
22 | |
23 | /* UART */ | |
24 | #define CONFIG_MXC_UART | |
25 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
3bf801a2 AR |
26 | |
27 | /* SD/MMC */ | |
3bf801a2 AR |
28 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
29 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
3bf801a2 AR |
30 | |
31 | /* USB */ | |
3bf801a2 AR |
32 | #define CONFIG_MXC_USB_PORT 1 |
33 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
34 | #define CONFIG_MXC_USB_FLAGS 0 | |
35 | ||
36 | /* I2C */ | |
3bf801a2 AR |
37 | #define CONFIG_SYS_I2C |
38 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
39 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
40 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
3bf801a2 AR |
41 | |
42 | /* Fuse */ | |
3bf801a2 AR |
43 | #define CONFIG_FSL_IIM |
44 | ||
9a45ec3e | 45 | /* U-Boot memory offsets */ |
3bf801a2 | 46 | #define CONFIG_LOADADDR 0x72000000 |
3bf801a2 | 47 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
9a45ec3e AR |
48 | |
49 | /* Linux boot */ | |
5bc0543d | 50 | #define CONFIG_HOSTNAME "usbarmory" |
3bf801a2 AR |
51 | #define CONFIG_BOOTCOMMAND \ |
52 | "run distro_bootcmd; " \ | |
53 | "setenv bootargs console=${console} ${bootargs_default}; " \ | |
9a45ec3e | 54 | "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ |
3bf801a2 | 55 | "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ |
9a45ec3e | 56 | "bootz ${kernel_addr_r} - ${fdt_addr_r}" |
3bf801a2 AR |
57 | |
58 | #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) | |
59 | ||
60 | #include <config_distro_bootcmd.h> | |
61 | ||
62 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
63 | "kernel_addr_r=0x70800000\0" \ | |
64 | "fdt_addr_r=0x71000000\0" \ | |
65 | "scriptaddr=0x70800000\0" \ | |
66 | "pxefile_addr_r=0x70800000\0" \ | |
67 | "ramdisk_addr_r=0x73000000\0" | |
68 | ||
69 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
70 | MEM_LAYOUT_ENV_SETTINGS \ | |
71 | "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \ | |
72 | "fdtfile=imx53-usbarmory.dtb\0" \ | |
73 | "console=ttymxc0,115200\0" \ | |
74 | BOOTENV | |
75 | ||
a02ab5ea | 76 | #ifndef CONFIG_CMDLINE |
a02ab5ea AR |
77 | #define USBARMORY_FIT_PATH "/boot/usbarmory.itb" |
78 | #define USBARMORY_FIT_ADDR "0x70800000" | |
79 | #endif | |
80 | ||
3bf801a2 | 81 | /* Physical Memory Map */ |
3bf801a2 AR |
82 | #define PHYS_SDRAM CSD0_BASE_ADDR |
83 | #define PHYS_SDRAM_SIZE (gd->ram_size) | |
84 | ||
85 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
86 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
87 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
88 | ||
89 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
90 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
91 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
92 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
93 | ||
94 | #define CONFIG_SYS_MEMTEST_START 0x70000000 | |
95 | #define CONFIG_SYS_MEMTEST_END 0x90000000 | |
96 | ||
97 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) | |
98 | ||
99 | #endif /* __CONFIG_H */ |