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3bf801a2 AR |
1 | /* |
2 | * USB armory MkI board configuration settings | |
3 | * http://inversepath.com/usbarmory | |
4 | * | |
5 | * Copyright (C) 2015, Inverse Path | |
6 | * Andrej Rosano <andrej@inversepath.com> | |
7 | * | |
8 | * SPDX-License-Identifier:|____GPL-2.0+ | |
9 | */ | |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
14 | #define CONFIG_MX53 | |
18fb0e3c | 15 | #define CONFIG_SYS_FSL_CLK |
3bf801a2 AR |
16 | #define CONFIG_MXC_GPIO |
17 | ||
18 | #include <asm/arch/imx-regs.h> | |
3bf801a2 AR |
19 | |
20 | #include <config_distro_defaults.h> | |
21 | ||
3bf801a2 | 22 | /* U-Boot environment */ |
3bf801a2 AR |
23 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
24 | #define CONFIG_ENV_SIZE (8 * 1024) | |
25 | #define CONFIG_ENV_IS_IN_MMC | |
26 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
27 | ||
28 | /* U-Boot general configurations */ | |
29 | #define CONFIG_SYS_CBSIZE 512 | |
30 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
31 | #define CONFIG_SYS_MAXARGS 16 | |
32 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
33 | ||
34 | /* UART */ | |
35 | #define CONFIG_MXC_UART | |
36 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
37 | #define CONFIG_CONS_INDEX 1 | |
38 | #define CONFIG_BAUDRATE 115200 | |
39 | ||
40 | /* SD/MMC */ | |
3bf801a2 AR |
41 | #define CONFIG_FSL_ESDHC |
42 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
43 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
3bf801a2 AR |
44 | |
45 | /* USB */ | |
3bf801a2 AR |
46 | #define CONFIG_USB_EHCI |
47 | #define CONFIG_USB_EHCI_MX5 | |
3bf801a2 AR |
48 | #define CONFIG_MXC_USB_PORT 1 |
49 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
50 | #define CONFIG_MXC_USB_FLAGS 0 | |
51 | ||
52 | /* I2C */ | |
3bf801a2 AR |
53 | #define CONFIG_SYS_I2C |
54 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
55 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
56 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
3bf801a2 AR |
57 | |
58 | /* Fuse */ | |
59 | #define CONFIG_CMD_FUSE | |
60 | #define CONFIG_FSL_IIM | |
61 | ||
9a45ec3e | 62 | /* U-Boot memory offsets */ |
3bf801a2 AR |
63 | #define CONFIG_LOADADDR 0x72000000 |
64 | #define CONFIG_SYS_TEXT_BASE 0x77800000 | |
65 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
9a45ec3e AR |
66 | |
67 | /* Linux boot */ | |
3bf801a2 AR |
68 | #define CONFIG_HOSTNAME usbarmory |
69 | #define CONFIG_BOOTCOMMAND \ | |
70 | "run distro_bootcmd; " \ | |
71 | "setenv bootargs console=${console} ${bootargs_default}; " \ | |
9a45ec3e | 72 | "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ |
3bf801a2 | 73 | "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ |
9a45ec3e | 74 | "bootz ${kernel_addr_r} - ${fdt_addr_r}" |
3bf801a2 AR |
75 | |
76 | #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) | |
77 | ||
78 | #include <config_distro_bootcmd.h> | |
79 | ||
80 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
81 | "kernel_addr_r=0x70800000\0" \ | |
82 | "fdt_addr_r=0x71000000\0" \ | |
83 | "scriptaddr=0x70800000\0" \ | |
84 | "pxefile_addr_r=0x70800000\0" \ | |
85 | "ramdisk_addr_r=0x73000000\0" | |
86 | ||
87 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
88 | MEM_LAYOUT_ENV_SETTINGS \ | |
89 | "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \ | |
90 | "fdtfile=imx53-usbarmory.dtb\0" \ | |
91 | "console=ttymxc0,115200\0" \ | |
92 | BOOTENV | |
93 | ||
a02ab5ea AR |
94 | #ifndef CONFIG_CMDLINE |
95 | #define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw" | |
96 | #define USBARMORY_FIT_PATH "/boot/usbarmory.itb" | |
97 | #define USBARMORY_FIT_ADDR "0x70800000" | |
98 | #endif | |
99 | ||
3bf801a2 AR |
100 | /* Physical Memory Map */ |
101 | #define CONFIG_NR_DRAM_BANKS 1 | |
102 | #define PHYS_SDRAM CSD0_BASE_ADDR | |
103 | #define PHYS_SDRAM_SIZE (gd->ram_size) | |
104 | ||
105 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
106 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
107 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
108 | ||
109 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
110 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
111 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
112 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
113 | ||
114 | #define CONFIG_SYS_MEMTEST_START 0x70000000 | |
115 | #define CONFIG_SYS_MEMTEST_END 0x90000000 | |
116 | ||
117 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) | |
118 | ||
119 | #endif /* __CONFIG_H */ |