[people/ms/u-boot.git] / include / configs / vct.h

/*
 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * This file contains the configuration parameters for the VCT board
 * family:
 *
 * vct_premium
 * vct_premium_small
 * vct_premium_onenand
 * vct_premium_onenand_small
 * vct_platinum
 * vct_platinum_small
 * vct_platinum_onenand
 * vct_platinum_onenand_small
 * vct_platinumavc
 * vct_platinumavc_small
 * vct_platinumavc_onenand
 * vct_platinumavc_onenand_small
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MIPS32				/* MIPS 4Kc CPU core	*/
#define CPU_CLOCK_RATE			324000000 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ	(CPU_CLOCK_RATE / 2)
#define CONFIG_SYS_HZ			1000

#define CONFIG_SKIP_LOWLEVEL_INIT	/* SDRAM is initialized by the bootstrap code */

#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN		(256 << 10)
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)
#define CONFIG_SYS_BOOTPARAMS_LEN	(128 << 10)
#define CONFIG_SYS_INIT_SP_OFFSET	0x400000

#if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
#define CONFIG_VCT_NOR
#else
#define CONFIG_SYS_NO_FLASH
#endif

/*
 * UART
 */
#ifdef CONFIG_VCT_PLATINUMAVC
#define UART_1_BASE		0xBDC30000
#else
#define UART_1_BASE		0xBF89C000
#endif

#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_REG_SIZE	-4
#define CONFIG_SYS_NS16550_COM1		UART_1_BASE
#define CONFIG_CONS_INDEX		1
#define CONFIG_SYS_NS16550_CLK		921600
#define CONFIG_BAUDRATE			115200

/*
 * SDRAM
 */
#define CONFIG_SYS_SDRAM_BASE		0x80000000
#define CONFIG_SYS_MBYTES_SDRAM		128
#define CONFIG_SYS_MEMTEST_START	0x80200000
#define CONFIG_SYS_MEMTEST_END		0x80400000
#define CONFIG_SYS_LOAD_ADDR		0x80400000	/* default load address */

#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
/*
 * SMSC91C11x Network Card
 */
#define CONFIG_SMC911X
#define CONFIG_SMC911X_BASE	0x00000000
#define CONFIG_SMC911X_32_BIT
#define CONFIG_NET_RETRY_COUNT		20
#endif

/*
 * Commands
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ELF
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C

/*
 * Only Premium/Platinum have ethernet support right now
 */
#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
	!defined(CONFIG_VCT_SMALL_IMAGE)
#define CONFIG_CMD_PING
#define CONFIG_CMD_SNTP
#else
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#endif

/*
 * Only Premium/Platinum have USB-EHCI support right now
 */
#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
	!defined(CONFIG_VCT_SMALL_IMAGE)
#define CONFIG_CMD_USB
#define CONFIG_CMD_FAT
#endif

#if defined(CONFIG_CMD_USB)
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION

#define CONFIG_SUPPORT_VFAT

/*
 * USB/EHCI
 */
#define CONFIG_USB_EHCI			/* Enable EHCI USB support	*/
#define CONFIG_USB_EHCI_VCT		/* on VCT platform		*/
#define CONFIG_EHCI_MMIO_BIG_ENDIAN
#define CONFIG_EHCI_DESC_BIG_ENDIAN
#define CONFIG_EHCI_IS_TDI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
#endif /* CONFIG_CMD_USB */

#if !defined(CONFIG_VCT_NOR)
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#endif

#if defined(CONFIG_VCT_NAND)
#define CONFIG_CMD_NAND
#endif

#if defined(CONFIG_VCT_ONENAND)
#define CONFIG_CMD_ONENAND
#endif

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_SUBNETMASK

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
#define CONFIG_SYS_PROMPT	"VCT# "		/* Monitor Command Prompt	*/
#define CONFIG_SYS_CBSIZE	512		/* Console I/O Buffer Size	*/
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
				 sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
#define CONFIG_TIMESTAMP			/* Print image info with timestamp */
#define CONFIG_CMDLINE_EDITING			/* add command line history	*/
#define CONFIG_SYS_CONSOLE_INFO_QUIET		/* don't print console @ startup*/

/*
 * FLASH and environment organization
 */
#if defined(CONFIG_VCT_NOR)
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_FLASH_NOT_MEM_MAPPED

/*
 * We need special accessor functions for the CFI FLASH driver. This
 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
 */
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS

/*
 * For the non-memory-mapped NOR FLASH, we need to define the
 * NOR FLASH area. This can't be detected via the addr2info()
 * function, since we check for flash access in the very early
 * U-Boot code, before the NOR FLASH is detected.
 */
#define CONFIG_FLASH_BASE		0xb0000000
#define CONFIG_FLASH_END		0xbfffffff

/*
 * CFI driver settings
 */
#define CONFIG_SYS_FLASH_CFI			/* The flash is CFI compatible	*/
#define CONFIG_FLASH_CFI_DRIVER		/* Use common CFI driver	*/
#define CONFIG_SYS_FLASH_CFI_AMD_RESET	1	/* Use AMD (Spansion) reset cmd */
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT	/* no byte writes on IXP4xx	*/

#define CONFIG_SYS_FLASH_BASE		0xb0000000
#define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
#define CONFIG_SYS_MAX_FLASH_SECT	512	/* max number of sectors on one chip	*/

#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/

#ifdef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE	0x10000		/* size of one complete sector	*/
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
#define	CONFIG_ENV_SIZE		0x4000	/* Total Size of Environment Sector	*/

/* Address and size of Redundant Environment Sector	*/
#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
#endif /* CONFIG_ENV_IS_IN_FLASH */
#endif /* CONFIG_VCT_NOR */

#if defined(CONFIG_VCT_ONENAND)
#define CONFIG_USE_ONENAND_BOARD_INIT
#define	CONFIG_ENV_IS_IN_ONENAND
#define	CONFIG_SYS_ONENAND_BASE		0x00000000	/* this is not real address */
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_ENV_ADDR			(128 << 10)	/* after compr. U-Boot image */
#define	CONFIG_ENV_SIZE			(128 << 10)	/* erase size */
#endif /* CONFIG_VCT_ONENAND */

/*
 * Cache Configuration
 */
#define CONFIG_SYS_DCACHE_SIZE		16384
#define CONFIG_SYS_ICACHE_SIZE		16384
#define CONFIG_SYS_CACHELINE_SIZE	32

/*
 * I2C/EEPROM
 */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED	83000	/* 83 kHz is supposed to work */
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x7f

/*
 * Software (bit-bang) I2C driver configuration
 */
#define CONFIG_SYS_GPIO_I2C_SCL		11
#define CONFIG_SYS_GPIO_I2C_SDA		10

#ifndef __ASSEMBLY__
int vct_gpio_dir(int pin, int dir);
void vct_gpio_set(int pin, int val);
int vct_gpio_get(int pin);
#endif

#define I2C_INIT	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
#define I2C_ACTIVE	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
#define I2C_TRISTATE	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
#define I2C_READ	vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
#define I2C_SDA(bit)	vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
#define I2C_SCL(bit)	vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
#define I2C_DELAY	udelay(5)	/* 1/4 I2C clock duration */

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
/* CAT24WC32 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2	/* Bytes of address		*/
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5	/* The Catalyst CAT24WC32 has	*/
					/* 32 byte page write mode using*/
					/* last 5 bits of the address	*/
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10   /* and takes up to 10 msec */

#define CONFIG_BOOTCOMMAND	"run test3"
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/

/*
 * UBI configuration
 */
#if defined(CONFIG_VCT_ONENAND)
#define CONFIG_SYS_USE_UBI
#define	CONFIG_CMD_JFFS2
#define	CONFIG_CMD_UBI
#define	CONFIG_RBTREE
#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS
#define CONFIG_CMD_MTDPARTS

#define MTDIDS_DEFAULT		"onenand0=onenand"
#define MTDPARTS_DEFAULT	"mtdparts=onenand:128k(u-boot),"	\
					"128k(env),"		\
					"20m(kernel),"		\
					"-(rootfs)"
#endif

/*
 * We need a small, stripped down image to fit into the first 128k OneNAND
 * erase block (gzipped). This image only needs basic commands for FLASH
 * (NOR/OneNAND) usage and Linux kernel booting.
 */
#if defined(CONFIG_VCT_SMALL_IMAGE)
#undef CONFIG_CMD_ASKENV
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_BEDBUG
#undef CONFIG_CMD_CACHE
#undef CONFIG_CMD_CONSOLE
#undef CONFIG_CMD_CRC32
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_ELF
#undef CONFIG_CMD_FAT
#undef CONFIG_CMD_I2C
#undef CONFIG_CMD_I2C
#undef CONFIG_CMD_IRQ
#undef CONFIG_CMD_ITEST
#undef CONFIG_CMD_LOADB
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_LOADY
#undef CONFIG_CMD_MII
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_PING
#undef CONFIG_CMD_REGINFO
#undef CONFIG_CMD_SNTP
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_STRINGS
#undef CONFIG_CMD_TERMINAL
#undef CONFIG_CMD_USB

#undef CONFIG_SMC911X
#undef CONFIG_SYS_I2C_SOFT
#undef CONFIG_SOURCE
#undef CONFIG_SYS_LONGHELP
#undef CONFIG_TIMESTAMP
#endif /* CONFIG_VCT_SMALL_IMAGE */

#endif  /* __CONFIG_H */
Commit	Line	Data
ae691e57 SR	1	/*
	2	* (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License as
	6	* published by the Free Software Foundation; either version 2 of
	7	* the License, or (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	17	* MA 02111-1307 USA
	18	*/
	19
	20	/*
	21	* This file contains the configuration parameters for the VCT board
	22	* family:
	23	*
	24	* vct_premium
	25	* vct_premium_small
	26	* vct_premium_onenand
	27	* vct_premium_onenand_small
	28	* vct_platinum
	29	* vct_platinum_small
	30	* vct_platinum_onenand
	31	* vct_platinum_onenand_small
	32	* vct_platinumavc
	33	* vct_platinumavc_small
	34	* vct_platinumavc_onenand
	35	* vct_platinumavc_onenand_small
	36	*/
	37
	38	#ifndef __CONFIG_H
	39	#define __CONFIG_H
	40
	41	#define CONFIG_MIPS32 /* MIPS 4Kc CPU core */
	42	#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
	43	#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
	44	#define CONFIG_SYS_HZ 1000
	45
	46	#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
	47
14d0a02a	48	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
ae691e57	49	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
ae691e57 SR	50	#define CONFIG_SYS_MALLOC_LEN (1 << 20)
	51	#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
	52	#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
	53
	54	#if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
	55	#define CONFIG_VCT_NOR
	56	#else
	57	#define CONFIG_SYS_NO_FLASH
	58	#endif
	59
	60	/*
	61	* UART
	62	*/
294f10ca DZ	63	#ifdef CONFIG_VCT_PLATINUMAVC
	64	#define UART_1_BASE 0xBDC30000
	65	#else
	66	#define UART_1_BASE 0xBF89C000
	67	#endif
	68
	69	#define CONFIG_SYS_NS16550_SERIAL
	70	#define CONFIG_SYS_NS16550
	71	#define CONFIG_SYS_NS16550_REG_SIZE -4
	72	#define CONFIG_SYS_NS16550_COM1 UART_1_BASE
	73	#define CONFIG_CONS_INDEX 1
	74	#define CONFIG_SYS_NS16550_CLK 921600
ae691e57	75	#define CONFIG_BAUDRATE 115200
ae691e57 SR	76
	77	/*
	78	* SDRAM
	79	*/
	80	#define CONFIG_SYS_SDRAM_BASE 0x80000000
	81	#define CONFIG_SYS_MBYTES_SDRAM 128
	82	#define CONFIG_SYS_MEMTEST_START 0x80200000
	83	#define CONFIG_SYS_MEMTEST_END 0x80400000
	84	#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
	85
	86	#if defined(CONFIG_VCT_PREMIUM) \|\| defined(CONFIG_VCT_PLATINUM)
	87	/*
	88	* SMSC91C11x Network Card
	89	*/
736fead8 BW	90	#define CONFIG_SMC911X
	91	#define CONFIG_SMC911X_BASE 0x00000000
	92	#define CONFIG_SMC911X_32_BIT
ae691e57 SR	93	#define CONFIG_NET_RETRY_COUNT 20
	94	#endif
	95
	96	/*
	97	* Commands
	98	*/
	99	#include <config_cmd_default.h>
	100
	101	#define CONFIG_CMD_DHCP
	102	#define CONFIG_CMD_ELF
	103	#define CONFIG_CMD_EEPROM
	104	#define CONFIG_CMD_I2C
	105
	106	/*
	107	* Only Premium/Platinum have ethernet support right now
	108	*/
383015b2 DS	109	#if (defined(CONFIG_VCT_PREMIUM) \|\| defined(CONFIG_VCT_PLATINUM)) && \
383015b2 DS	110	!defined(CONFIG_VCT_SMALL_IMAGE)
ae691e57 SR	111	#define CONFIG_CMD_PING
	112	#define CONFIG_CMD_SNTP
	113	#else
	114	#undef CONFIG_CMD_NET
383015b2	115	#undef CONFIG_CMD_NFS
ae691e57 SR	116	#endif
	117
	118	/*
	119	* Only Premium/Platinum have USB-EHCI support right now
	120	*/
383015b2 DS	121	#if (defined(CONFIG_VCT_PREMIUM) \|\| defined(CONFIG_VCT_PLATINUM)) && \
383015b2 DS	122	!defined(CONFIG_VCT_SMALL_IMAGE)
ae691e57 SR	123	#define CONFIG_CMD_USB
	124	#define CONFIG_CMD_FAT
	125	#endif
	126
	127	#if defined(CONFIG_CMD_USB)
	128	#define CONFIG_USB_STORAGE
	129	#define CONFIG_DOS_PARTITION
	130	#define CONFIG_ISO_PARTITION
	131
	132	#define CONFIG_SUPPORT_VFAT
	133
	134	/*
	135	* USB/EHCI
	136	*/
	137	#define CONFIG_USB_EHCI /* Enable EHCI USB support */
	138	#define CONFIG_USB_EHCI_VCT /* on VCT platform */
ae691e57 SR	139	#define CONFIG_EHCI_MMIO_BIG_ENDIAN
	140	#define CONFIG_EHCI_DESC_BIG_ENDIAN
	141	#define CONFIG_EHCI_IS_TDI
	142	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
	143	#endif /* CONFIG_CMD_USB */
	144
	145	#if !defined(CONFIG_VCT_NOR)
	146	#undef CONFIG_CMD_FLASH
	147	#undef CONFIG_CMD_IMLS
	148	#endif
	149
	150	#if defined(CONFIG_VCT_NAND)
	151	#define CONFIG_CMD_NAND
	152	#endif
	153
	154	#if defined(CONFIG_VCT_ONENAND)
	155	#define CONFIG_CMD_ONENAND
	156	#endif
	157
	158	/*
	159	* BOOTP options
	160	*/
	161	#define CONFIG_BOOTP_BOOTFILESIZE
	162	#define CONFIG_BOOTP_BOOTPATH
	163	#define CONFIG_BOOTP_GATEWAY
	164	#define CONFIG_BOOTP_HOSTNAME
	165	#define CONFIG_BOOTP_SUBNETMASK
	166
	167	/*
	168	* Miscellaneous configurable options
	169	*/
	170	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	171	#define CONFIG_SYS_PROMPT "VCT# " /* Monitor Command Prompt */
	172	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
	173	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	174	sizeof(CONFIG_SYS_PROMPT) + 16)
	175	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	176	#define CONFIG_TIMESTAMP /* Print image info with timestamp */
	177	#define CONFIG_CMDLINE_EDITING /* add command line history */
	178	#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
	179
	180	/*
	181	* FLASH and environment organization
	182	*/
	183	#if defined(CONFIG_VCT_NOR)
	184	#define CONFIG_ENV_IS_IN_FLASH
	185	#define CONFIG_FLASH_NOT_MEM_MAPPED
	186
	187	/*
	188	* We need special accessor functions for the CFI FLASH driver. This
	189	* can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
	190	*/
	191	#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
	192
	193	/*
	194	* For the non-memory-mapped NOR FLASH, we need to define the
	195	* NOR FLASH area. This can't be detected via the addr2info()
	196	* function, since we check for flash access in the very early
	197	* U-Boot code, before the NOR FLASH is detected.
	198	*/
	199	#define CONFIG_FLASH_BASE 0xb0000000
	200	#define CONFIG_FLASH_END 0xbfffffff
	201
	202	/*
203	* CFI driver settings
204	*/
205	#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
206	#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
207	#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
208	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
209
210	#define CONFIG_SYS_FLASH_BASE 0xb0000000
211	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
212	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
213	#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
214
215	#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
216	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
217
218	#ifdef CONFIG_ENV_IS_IN_FLASH
219	#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
220	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
221	#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
222
223	/* Address and size of Redundant Environment Sector */
224	#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
225	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
226	#endif /* CONFIG_ENV_IS_IN_FLASH */
227	#endif /* CONFIG_VCT_NOR */
228
229	#if defined(CONFIG_VCT_ONENAND)
230	#define CONFIG_USE_ONENAND_BOARD_INIT
231	#define CONFIG_ENV_IS_IN_ONENAND
232	#define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
233	#define CONFIG_SYS_FLASH_BASE 0x00000000
234	#define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
235	#define CONFIG_ENV_SIZE (128 << 10) /* erase size */
236	#endif /* CONFIG_VCT_ONENAND */
237
238	/*
239	* Cache Configuration
240	*/
241	#define CONFIG_SYS_DCACHE_SIZE 16384
242	#define CONFIG_SYS_ICACHE_SIZE 16384
243	#define CONFIG_SYS_CACHELINE_SIZE 32
244
245	/*
246	* I2C/EEPROM
247	*/
ea818dbb HS	248	#define CONFIG_SYS_I2C
	249	#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
	250	#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
	251	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
ae691e57 SR	252
	253	/*
	254	* Software (bit-bang) I2C driver configuration
	255	*/
	256	#define CONFIG_SYS_GPIO_I2C_SCL 11
	257	#define CONFIG_SYS_GPIO_I2C_SDA 10
	258
	259	#ifndef __ASSEMBLY__
	260	int vct_gpio_dir(int pin, int dir);
	261	void vct_gpio_set(int pin, int val);
	262	int vct_gpio_get(int pin);
	263	#endif
	264
	265	#define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
	266	#define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
	267	#define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
	268	#define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
	269	#define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
	270	#define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
	271	#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
	272
	273	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	274	/* CAT24WC32 */
	275	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
	276	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
	277	/* 32 byte page write mode using*/
	278	/* last 5 bits of the address */
	279	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
	280
	281	#define CONFIG_BOOTCOMMAND "run test3"
	282	#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
	283
ae691e57 SR	284	/*
	285	* UBI configuration
	286	*/
	287	#if defined(CONFIG_VCT_ONENAND)
	288	#define CONFIG_SYS_USE_UBI
	289	#define CONFIG_CMD_JFFS2
	290	#define CONFIG_CMD_UBI
	291	#define CONFIG_RBTREE
942556a9	292	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
ae691e57	293	#define CONFIG_MTD_PARTITIONS
68d7d651	294	#define CONFIG_CMD_MTDPARTS
ae691e57 SR	295
	296	#define MTDIDS_DEFAULT "onenand0=onenand"
	297	#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
	298	"128k(env)," \
	299	"20m(kernel)," \
	300	"-(rootfs)"
	301	#endif
	302
	303	/*
	304	* We need a small, stripped down image to fit into the first 128k OneNAND
	305	* erase block (gzipped). This image only needs basic commands for FLASH
	306	* (NOR/OneNAND) usage and Linux kernel booting.
	307	*/
	308	#if defined(CONFIG_VCT_SMALL_IMAGE)
74de7aef WD	309	#undef CONFIG_CMD_ASKENV
	310	#undef CONFIG_CMD_BDI
	311	#undef CONFIG_CMD_BEDBUG
	312	#undef CONFIG_CMD_CACHE
	313	#undef CONFIG_CMD_CONSOLE
	314	#undef CONFIG_CMD_CRC32
	315	#undef CONFIG_CMD_DHCP
	316	#undef CONFIG_CMD_EEPROM
ae691e57	317	#undef CONFIG_CMD_EEPROM
ae691e57	318	#undef CONFIG_CMD_ELF
74de7aef WD	319	#undef CONFIG_CMD_FAT
	320	#undef CONFIG_CMD_I2C
	321	#undef CONFIG_CMD_I2C
ae691e57 SR	322	#undef CONFIG_CMD_IRQ
ae691e57 SR	323	#undef CONFIG_CMD_ITEST
74de7aef WD	324	#undef CONFIG_CMD_LOADB
	325	#undef CONFIG_CMD_LOADS
	326	#undef CONFIG_CMD_LOADY
ae691e57 SR	327	#undef CONFIG_CMD_MII
ae691e57 SR	328	#undef CONFIG_CMD_MISC
74de7aef WD	329	#undef CONFIG_CMD_NET
74de7aef WD	330	#undef CONFIG_CMD_PING
ae691e57	331	#undef CONFIG_CMD_REGINFO
74de7aef WD	332	#undef CONFIG_CMD_SNTP
74de7aef WD	333	#undef CONFIG_CMD_SOURCE
ae691e57 SR	334	#undef CONFIG_CMD_STRINGS
ae691e57 SR	335	#undef CONFIG_CMD_TERMINAL
ae691e57	336	#undef CONFIG_CMD_USB
ae691e57	337
736fead8	338	#undef CONFIG_SMC911X
ea818dbb	339	#undef CONFIG_SYS_I2C_SOFT
74de7aef	340	#undef CONFIG_SOURCE
ae691e57 SR	341	#undef CONFIG_SYS_LONGHELP
	342	#undef CONFIG_TIMESTAMP
	343	#endif /* CONFIG_VCT_SMALL_IMAGE */
	344
	345	#endif /* __CONFIG_H */