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8c653124 AW |
1 | /* |
2 | * Copyright 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale Vybrid vf610twr board. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
8c653124 AW |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #include <asm/arch/imx-regs.h> | |
8c653124 AW |
13 | |
14 | #define CONFIG_VF610 | |
15 | ||
16 | #define CONFIG_DISPLAY_CPUINFO | |
17 | #define CONFIG_DISPLAY_BOARDINFO | |
18fb0e3c | 18 | #define CONFIG_SYS_FSL_CLK |
8c653124 AW |
19 | |
20 | #define CONFIG_MACH_TYPE 4146 | |
21 | ||
22 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
23 | ||
24 | /* Enable passing of ATAGs */ | |
25 | #define CONFIG_CMDLINE_TAG | |
26 | ||
27 | #define CONFIG_CMD_FUSE | |
28 | #ifdef CONFIG_CMD_FUSE | |
29 | #define CONFIG_MXC_OCOTP | |
30 | #endif | |
31 | ||
32 | /* Size of malloc() pool */ | |
33 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) | |
34 | ||
35 | #define CONFIG_BOARD_EARLY_INIT_F | |
36 | ||
8c653124 AW |
37 | /* Allow to overwrite serial and ethaddr */ |
38 | #define CONFIG_ENV_OVERWRITE | |
8c653124 AW |
39 | #define CONFIG_BAUDRATE 115200 |
40 | ||
d6d07a9b SA |
41 | /* NAND support */ |
42 | #define CONFIG_CMD_NAND | |
43 | #define CONFIG_CMD_NAND_TRIMFFS | |
8fca2d8c | 44 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
d6d07a9b SA |
45 | |
46 | #ifdef CONFIG_CMD_NAND | |
d6d07a9b | 47 | #define CONFIG_USE_ARCH_MEMCPY |
d6d07a9b SA |
48 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
49 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR | |
50 | ||
51 | /* UBI */ | |
52 | #define CONFIG_CMD_UBI | |
53 | #define CONFIG_CMD_UBIFS | |
d6d07a9b SA |
54 | #define CONFIG_RBTREE |
55 | #define CONFIG_LZO | |
d6d07a9b SA |
56 | |
57 | /* Dynamic MTD partition support */ | |
58 | #define CONFIG_CMD_MTDPARTS | |
59 | #define CONFIG_MTD_PARTITIONS | |
60 | #define CONFIG_MTD_DEVICE | |
61 | #define MTDIDS_DEFAULT "nand0=fsl_nfc" | |
62 | #define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \ | |
63 | "128k(vf-bcb)ro," \ | |
64 | "1408k(u-boot)ro," \ | |
65 | "512k(u-boot-env)," \ | |
66 | "4m(kernel)," \ | |
67 | "512k(fdt)," \ | |
68 | "-(rootfs)" | |
69 | #endif | |
70 | ||
8c653124 AW |
71 | #define CONFIG_MMC |
72 | #define CONFIG_FSL_ESDHC | |
73 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
74 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
75 | ||
76 | #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 | |
77 | ||
8c653124 | 78 | #define CONFIG_GENERIC_MMC |
8c653124 AW |
79 | #define CONFIG_DOS_PARTITION |
80 | ||
8c653124 AW |
81 | #define CONFIG_FEC_MXC |
82 | #define CONFIG_MII | |
83 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
84 | #define CONFIG_FEC_XCV_TYPE RMII | |
85 | #define CONFIG_FEC_MXC_PHYADDR 0 | |
86 | #define CONFIG_PHYLIB | |
87 | #define CONFIG_PHY_MICREL | |
88 | ||
cb6d04d6 | 89 | /* QSPI Configs*/ |
cb6d04d6 CF |
90 | |
91 | #ifdef CONFIG_FSL_QSPI | |
cb6d04d6 CF |
92 | #define FSL_QSPI_FLASH_SIZE (1 << 24) |
93 | #define FSL_QSPI_FLASH_NUM 2 | |
94 | #define CONFIG_SYS_FSL_QSPI_LE | |
95 | #endif | |
96 | ||
1221b3d7 | 97 | /* I2C Configs */ |
b089d039 | 98 | #define CONFIG_SYS_I2C |
99 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
100 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
101 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
b089d039 | 102 | #define CONFIG_SYS_SPD_BUS_NUM 0 |
1221b3d7 | 103 | |
8c653124 | 104 | |
cf04ad32 | 105 | #define CONFIG_SYS_LOAD_ADDR 0x82000000 |
b188067f SA |
106 | |
107 | /* We boot from the gfxRAM area of the OCRAM. */ | |
108 | #define CONFIG_SYS_TEXT_BASE 0x3f408000 | |
109 | #define CONFIG_BOARD_SIZE_LIMIT 524288 | |
8c653124 | 110 | |
cf04ad32 SA |
111 | /* |
112 | * We do have 128MB of memory on the Vybrid Tower board. Leave the last | |
113 | * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from | |
114 | * DDR3. Hence, limit the memory range for image processing to 112MB | |
115 | * using bootm_size. All of the following must be within this range. | |
116 | * We have the default load at 32MB into DDR (for the kernel), FDT at | |
117 | * 64MB and the ramdisk 512KB above that (allowing for hopefully never | |
118 | * seen large trees). This allows a reasonable split between ramdisk | |
119 | * and kernel size, where the ram disk can be a bit larger. | |
120 | */ | |
121 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
122 | "bootm_size=0x07000000\0" \ | |
123 | "loadaddr=0x82000000\0" \ | |
124 | "kernel_addr_r=0x82000000\0" \ | |
125 | "fdt_addr=0x84000000\0" \ | |
126 | "fdt_addr_r=0x84000000\0" \ | |
127 | "rdaddr=0x84080000\0" \ | |
128 | "ramdisk_addr_r=0x84080000\0" | |
129 | ||
ca21f61e | 130 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
cf04ad32 | 131 | MEM_LAYOUT_ENV_SETTINGS \ |
ca21f61e | 132 | "script=boot.scr\0" \ |
c0a5b081 | 133 | "image=zImage\0" \ |
ca21f61e | 134 | "console=ttyLP1\0" \ |
ca21f61e | 135 | "fdt_file=vf610-twr.dtb\0" \ |
ca21f61e OS |
136 | "boot_fdt=try\0" \ |
137 | "ip_dyn=yes\0" \ | |
138 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ | |
139 | "mmcpart=1\0" \ | |
140 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
141 | "update_sd_firmware_filename=u-boot.imx\0" \ | |
142 | "update_sd_firmware=" \ | |
143 | "if test ${ip_dyn} = yes; then " \ | |
144 | "setenv get_cmd dhcp; " \ | |
145 | "else " \ | |
146 | "setenv get_cmd tftp; " \ | |
147 | "fi; " \ | |
148 | "if mmc dev ${mmcdev}; then " \ | |
149 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
150 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
151 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
152 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
153 | "fi; " \ | |
154 | "fi\0" \ | |
155 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
156 | "root=${mmcroot}\0" \ | |
157 | "loadbootscript=" \ | |
158 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
159 | "bootscript=echo Running bootscript from mmc ...; " \ | |
160 | "source\0" \ | |
c0a5b081 | 161 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
ca21f61e OS |
162 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
163 | "mmcboot=echo Booting from mmc ...; " \ | |
164 | "run mmcargs; " \ | |
165 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
166 | "if run loadfdt; then " \ | |
c0a5b081 | 167 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
ca21f61e OS |
168 | "else " \ |
169 | "if test ${boot_fdt} = try; then " \ | |
c0a5b081 | 170 | "bootz; " \ |
ca21f61e OS |
171 | "else " \ |
172 | "echo WARN: Cannot load the DT; " \ | |
173 | "fi; " \ | |
174 | "fi; " \ | |
175 | "else " \ | |
c0a5b081 | 176 | "bootz; " \ |
ca21f61e OS |
177 | "fi;\0" \ |
178 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
179 | "root=/dev/nfs " \ | |
180 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
181 | "netboot=echo Booting from net ...; " \ | |
182 | "run netargs; " \ | |
183 | "if test ${ip_dyn} = yes; then " \ | |
184 | "setenv get_cmd dhcp; " \ | |
185 | "else " \ | |
186 | "setenv get_cmd tftp; " \ | |
187 | "fi; " \ | |
c0a5b081 | 188 | "${get_cmd} ${image}; " \ |
ca21f61e OS |
189 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
190 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
c0a5b081 | 191 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
ca21f61e OS |
192 | "else " \ |
193 | "if test ${boot_fdt} = try; then " \ | |
c0a5b081 | 194 | "bootz; " \ |
ca21f61e OS |
195 | "else " \ |
196 | "echo WARN: Cannot load the DT; " \ | |
197 | "fi; " \ | |
198 | "fi; " \ | |
199 | "else " \ | |
c0a5b081 | 200 | "bootz; " \ |
ca21f61e OS |
201 | "fi;\0" |
202 | ||
203 | #define CONFIG_BOOTCOMMAND \ | |
204 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
205 | "if run loadbootscript; then " \ | |
206 | "run bootscript; " \ | |
207 | "else " \ | |
c0a5b081 | 208 | "if run loadimage; then " \ |
ca21f61e OS |
209 | "run mmcboot; " \ |
210 | "else run netboot; " \ | |
211 | "fi; " \ | |
212 | "fi; " \ | |
213 | "else run netboot; fi" | |
214 | ||
8c653124 AW |
215 | /* Miscellaneous configurable options */ |
216 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
8c653124 AW |
217 | #undef CONFIG_AUTO_COMPLETE |
218 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
219 | #define CONFIG_SYS_PBSIZE \ | |
220 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
221 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
222 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
223 | ||
8c653124 AW |
224 | #define CONFIG_SYS_MEMTEST_START 0x80010000 |
225 | #define CONFIG_SYS_MEMTEST_END 0x87C00000 | |
226 | ||
8c653124 AW |
227 | /* |
228 | * Stack sizes | |
229 | * The stack sizes are set up in start.S using the settings below | |
230 | */ | |
231 | #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ | |
232 | ||
233 | /* Physical memory map */ | |
234 | #define CONFIG_NR_DRAM_BANKS 1 | |
235 | #define PHYS_SDRAM (0x80000000) | |
236 | #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) | |
237 | ||
238 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
239 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
240 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
241 | ||
242 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
243 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
244 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
245 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
246 | ||
247 | /* FLASH and environment organization */ | |
248 | #define CONFIG_SYS_NO_FLASH | |
249 | ||
d6d07a9b | 250 | #ifdef CONFIG_ENV_IS_IN_MMC |
8c653124 | 251 | #define CONFIG_ENV_SIZE (8 * 1024) |
8c653124 AW |
252 | |
253 | #define CONFIG_ENV_OFFSET (12 * 64 * 1024) | |
254 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
d6d07a9b SA |
255 | #endif |
256 | ||
257 | #ifdef CONFIG_ENV_IS_IN_NAND | |
258 | #define CONFIG_ENV_SIZE (64 * 2048) | |
259 | #define CONFIG_ENV_SECT_SIZE (64 * 2048) | |
260 | #define CONFIG_ENV_RANGE (512 * 1024) | |
261 | #define CONFIG_ENV_OFFSET 0x180000 | |
262 | #endif | |
8c653124 | 263 | |
8c653124 | 264 | #endif |