[people/ms/u-boot.git] / include / configs / vf610twr.h

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale Vybrid vf610twr board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

#define CONFIG_VF610

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_FSL_CLK

#define CONFIG_MACH_TYPE		4146

#define CONFIG_SKIP_LOWLEVEL_INIT

/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG

#define CONFIG_CMD_FUSE
#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)

#define CONFIG_BOARD_EARLY_INIT_F

#define CONFIG_FSL_LPUART
#define LPUART_BASE			UART1_BASE

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_UART_PORT		(1)
#define CONFIG_BAUDRATE			115200

/* NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_NAND_ONFI_DETECTION

#ifdef CONFIG_CMD_NAND
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR

/* UBI */
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO

/* Dynamic MTD partition support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define MTDIDS_DEFAULT			"nand0=fsl_nfc"
#define MTDPARTS_DEFAULT		"mtdparts=fsl_nfc:"		\
					"128k(vf-bcb)ro,"		\
					"1408k(u-boot)ro,"		\
					"512k(u-boot-env),"		\
					"4m(kernel),"			\
					"512k(fdt),"		\
					"-(rootfs)"
#endif

#define CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1

#define CONFIG_SYS_FSL_ERRATUM_ESDHC111

#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RMII
#define CONFIG_FEC_MXC_PHYADDR          0
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL

/* QSPI Configs*/
#define CONFIG_FSL_QSPI

#ifdef CONFIG_FSL_QSPI
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SPANSION
#define FSL_QSPI_FLASH_SIZE		(1 << 24)
#define FSL_QSPI_FLASH_NUM		2
#define CONFIG_SYS_FSL_QSPI_LE
#endif

/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_SPD_BUS_NUM		0

#define CONFIG_BOOTDELAY		3

#define CONFIG_SYS_LOAD_ADDR		0x82000000

/* We boot from the gfxRAM area of the OCRAM. */
#define CONFIG_SYS_TEXT_BASE		0x3f408000
#define CONFIG_BOARD_SIZE_LIMIT		524288

/*
 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
 * DDR3. Hence, limit the memory range for image processing to 112MB
 * using bootm_size. All of the following must be within this range.
 * We have the default load at 32MB into DDR (for the kernel), FDT at
 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
 * seen large trees). This allows a reasonable split between ramdisk
 * and kernel size, where the ram disk can be a bit larger.
 */
#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=0x07000000\0" \
	"loadaddr=0x82000000\0" \
	"kernel_addr_r=0x82000000\0" \
	"fdt_addr=0x84000000\0" \
	"fdt_addr_r=0x84000000\0" \
	"rdaddr=0x84080000\0" \
	"ramdisk_addr_r=0x84080000\0"

#define CONFIG_EXTRA_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttyLP1\0" \
	"fdt_file=vf610-twr.dtb\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	"mmcpart=1\0" \
	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	"update_sd_firmware_filename=u-boot.imx\0" \
	"update_sd_firmware=" \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"if mmc dev ${mmcdev}; then "	\
			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
				"setexpr fw_sz ${filesize} / 0x200; " \
				"setexpr fw_sz ${fw_sz} + 1; "	\
				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
			"fi; "	\
		"fi\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#undef CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		\
			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START	0x80010000
#define CONFIG_SYS_MEMTEST_END		0x87C00000

/*
 * Stack sizes
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE		(128 * 1024)	/* regular stack */

/* Physical memory map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			(0x80000000)
#define PHYS_SDRAM_SIZE			(128 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH

#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0
#endif

#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE			(64 * 2048)
#define CONFIG_ENV_SECT_SIZE		(64 * 2048)
#define CONFIG_ENV_RANGE		(512 * 1024)
#define CONFIG_ENV_OFFSET		0x180000
#endif

#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ

#endif
Commit	Line	Data
8c653124 AW	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the Freescale Vybrid vf610twr board.
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
8c653124 AW	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
	12	#include <asm/arch/imx-regs.h>
8c653124 AW	13
	14	#define CONFIG_VF610
	15
	16	#define CONFIG_DISPLAY_CPUINFO
	17	#define CONFIG_DISPLAY_BOARDINFO
18fb0e3c	18	#define CONFIG_SYS_FSL_CLK
8c653124 AW	19
	20	#define CONFIG_MACH_TYPE 4146
	21
	22	#define CONFIG_SKIP_LOWLEVEL_INIT
	23
	24	/* Enable passing of ATAGs */
	25	#define CONFIG_CMDLINE_TAG
	26
	27	#define CONFIG_CMD_FUSE
	28	#ifdef CONFIG_CMD_FUSE
	29	#define CONFIG_MXC_OCOTP
	30	#endif
	31
	32	/* Size of malloc() pool */
	33	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
	34
	35	#define CONFIG_BOARD_EARLY_INIT_F
	36
	37	#define CONFIG_FSL_LPUART
	38	#define LPUART_BASE UART1_BASE
	39
	40	/* Allow to overwrite serial and ethaddr */
	41	#define CONFIG_ENV_OVERWRITE
	42	#define CONFIG_SYS_UART_PORT (1)
	43	#define CONFIG_BAUDRATE 115200
	44
d6d07a9b SA	45	/* NAND support */
	46	#define CONFIG_CMD_NAND
	47	#define CONFIG_CMD_NAND_TRIMFFS
8fca2d8c	48	#define CONFIG_SYS_NAND_ONFI_DETECTION
d6d07a9b SA	49
d6d07a9b SA	50	#ifdef CONFIG_CMD_NAND
d6d07a9b	51	#define CONFIG_USE_ARCH_MEMCPY
d6d07a9b SA	52	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	53	#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
	54
	55	/* UBI */
	56	#define CONFIG_CMD_UBI
	57	#define CONFIG_CMD_UBIFS
d6d07a9b SA	58	#define CONFIG_RBTREE
d6d07a9b SA	59	#define CONFIG_LZO
d6d07a9b SA	60
	61	/* Dynamic MTD partition support */
	62	#define CONFIG_CMD_MTDPARTS
	63	#define CONFIG_MTD_PARTITIONS
	64	#define CONFIG_MTD_DEVICE
	65	#define MTDIDS_DEFAULT "nand0=fsl_nfc"
	66	#define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \
	67	"128k(vf-bcb)ro," \
	68	"1408k(u-boot)ro," \
	69	"512k(u-boot-env)," \
	70	"4m(kernel)," \
	71	"512k(fdt)," \
	72	"-(rootfs)"
	73	#endif
	74
8c653124 AW	75	#define CONFIG_MMC
	76	#define CONFIG_FSL_ESDHC
	77	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	78	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	79
	80	#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
	81
	82	#define CONFIG_CMD_MMC
	83	#define CONFIG_GENERIC_MMC
	84	#define CONFIG_CMD_FAT
	85	#define CONFIG_DOS_PARTITION
	86
	87	#define CONFIG_CMD_PING
	88	#define CONFIG_CMD_DHCP
	89	#define CONFIG_CMD_MII
8c653124 AW	90	#define CONFIG_FEC_MXC
	91	#define CONFIG_MII
	92	#define IMX_FEC_BASE ENET_BASE_ADDR
	93	#define CONFIG_FEC_XCV_TYPE RMII
	94	#define CONFIG_FEC_MXC_PHYADDR 0
	95	#define CONFIG_PHYLIB
	96	#define CONFIG_PHY_MICREL
	97
cb6d04d6 CF	98	/* QSPI Configs*/
	99	#define CONFIG_FSL_QSPI
	100
	101	#ifdef CONFIG_FSL_QSPI
	102	#define CONFIG_CMD_SF
cb6d04d6 CF	103	#define CONFIG_SPI_FLASH_SPANSION
	104	#define FSL_QSPI_FLASH_SIZE (1 << 24)
	105	#define FSL_QSPI_FLASH_NUM 2
	106	#define CONFIG_SYS_FSL_QSPI_LE
	107	#endif
	108
1221b3d7 AW	109	/* I2C Configs */
1221b3d7 AW	110	#define CONFIG_CMD_I2C
b089d039	111	#define CONFIG_SYS_I2C
b089d039	112	#define CONFIG_SYS_I2C_MXC
03544c66 AA	113	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	114	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
b089d039	115	#define CONFIG_SYS_SPD_BUS_NUM 0
1221b3d7	116
8c653124 AW	117	#define CONFIG_BOOTDELAY 3
8c653124 AW	118
cf04ad32	119	#define CONFIG_SYS_LOAD_ADDR 0x82000000
b188067f SA	120
	121	/* We boot from the gfxRAM area of the OCRAM. */
	122	#define CONFIG_SYS_TEXT_BASE 0x3f408000
	123	#define CONFIG_BOARD_SIZE_LIMIT 524288
8c653124	124
cf04ad32 SA	125	/*
	126	* We do have 128MB of memory on the Vybrid Tower board. Leave the last
	127	* 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
	128	* DDR3. Hence, limit the memory range for image processing to 112MB
	129	* using bootm_size. All of the following must be within this range.
	130	* We have the default load at 32MB into DDR (for the kernel), FDT at
	131	* 64MB and the ramdisk 512KB above that (allowing for hopefully never
	132	* seen large trees). This allows a reasonable split between ramdisk
	133	* and kernel size, where the ram disk can be a bit larger.
	134	*/
	135	#define MEM_LAYOUT_ENV_SETTINGS \
	136	"bootm_size=0x07000000\0" \
	137	"loadaddr=0x82000000\0" \
	138	"kernel_addr_r=0x82000000\0" \
	139	"fdt_addr=0x84000000\0" \
	140	"fdt_addr_r=0x84000000\0" \
	141	"rdaddr=0x84080000\0" \
	142	"ramdisk_addr_r=0x84080000\0"
	143
ca21f61e	144	#define CONFIG_EXTRA_ENV_SETTINGS \
cf04ad32	145	MEM_LAYOUT_ENV_SETTINGS \
ca21f61e	146	"script=boot.scr\0" \
c0a5b081	147	"image=zImage\0" \
ca21f61e	148	"console=ttyLP1\0" \
ca21f61e	149	"fdt_file=vf610-twr.dtb\0" \
ca21f61e OS	150	"boot_fdt=try\0" \
	151	"ip_dyn=yes\0" \
	152	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	153	"mmcpart=1\0" \
	154	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	155	"update_sd_firmware_filename=u-boot.imx\0" \
	156	"update_sd_firmware=" \
	157	"if test ${ip_dyn} = yes; then " \
	158	"setenv get_cmd dhcp; " \
	159	"else " \
	160	"setenv get_cmd tftp; " \
	161	"fi; " \
	162	"if mmc dev ${mmcdev}; then " \
	163	"if ${get_cmd} ${update_sd_firmware_filename}; then " \
	164	"setexpr fw_sz ${filesize} / 0x200; " \
	165	"setexpr fw_sz ${fw_sz} + 1; " \
	166	"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
	167	"fi; " \
	168	"fi\0" \
	169	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	170	"root=${mmcroot}\0" \
	171	"loadbootscript=" \
	172	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	173	"bootscript=echo Running bootscript from mmc ...; " \
	174	"source\0" \
c0a5b081	175	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
ca21f61e OS	176	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	177	"mmcboot=echo Booting from mmc ...; " \
	178	"run mmcargs; " \
	179	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	180	"if run loadfdt; then " \
c0a5b081	181	"bootz ${loadaddr} - ${fdt_addr}; " \
ca21f61e OS	182	"else " \
ca21f61e OS	183	"if test ${boot_fdt} = try; then " \
c0a5b081	184	"bootz; " \
ca21f61e OS	185	"else " \
	186	"echo WARN: Cannot load the DT; " \
	187	"fi; " \
	188	"fi; " \
	189	"else " \
c0a5b081	190	"bootz; " \
ca21f61e OS	191	"fi;\0" \
	192	"netargs=setenv bootargs console=${console},${baudrate} " \
	193	"root=/dev/nfs " \
	194	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	195	"netboot=echo Booting from net ...; " \
	196	"run netargs; " \
	197	"if test ${ip_dyn} = yes; then " \
	198	"setenv get_cmd dhcp; " \
	199	"else " \
	200	"setenv get_cmd tftp; " \
	201	"fi; " \
c0a5b081	202	"${get_cmd} ${image}; " \
ca21f61e OS	203	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
ca21f61e OS	204	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
c0a5b081	205	"bootz ${loadaddr} - ${fdt_addr}; " \
ca21f61e OS	206	"else " \
ca21f61e OS	207	"if test ${boot_fdt} = try; then " \
c0a5b081	208	"bootz; " \
ca21f61e OS	209	"else " \
	210	"echo WARN: Cannot load the DT; " \
	211	"fi; " \
	212	"fi; " \
	213	"else " \
c0a5b081	214	"bootz; " \
ca21f61e OS	215	"fi;\0"
	216
	217	#define CONFIG_BOOTCOMMAND \
	218	"mmc dev ${mmcdev}; if mmc rescan; then " \
	219	"if run loadbootscript; then " \
	220	"run bootscript; " \
	221	"else " \
c0a5b081	222	"if run loadimage; then " \
ca21f61e OS	223	"run mmcboot; " \
	224	"else run netboot; " \
	225	"fi; " \
	226	"fi; " \
	227	"else run netboot; fi"
	228
8c653124 AW	229	/* Miscellaneous configurable options */
	230	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	231	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
	232	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
8c653124 AW	233	#undef CONFIG_AUTO_COMPLETE
	234	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	235	#define CONFIG_SYS_PBSIZE \
	236	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	237	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	238	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	239
	240	#define CONFIG_CMD_MEMTEST
	241	#define CONFIG_SYS_MEMTEST_START 0x80010000
	242	#define CONFIG_SYS_MEMTEST_END 0x87C00000
	243
8c653124 AW	244	/*
	245	* Stack sizes
	246	* The stack sizes are set up in start.S using the settings below
	247	*/
	248	#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
	249
	250	/* Physical memory map */
	251	#define CONFIG_NR_DRAM_BANKS 1
	252	#define PHYS_SDRAM (0x80000000)
	253	#define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
	254
	255	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	256	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	257	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	258
	259	#define CONFIG_SYS_INIT_SP_OFFSET \
	260	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	261	#define CONFIG_SYS_INIT_SP_ADDR \
	262	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	263
	264	/* FLASH and environment organization */
	265	#define CONFIG_SYS_NO_FLASH
	266
d6d07a9b	267	#ifdef CONFIG_ENV_IS_IN_MMC
8c653124	268	#define CONFIG_ENV_SIZE (8 * 1024)
8c653124 AW	269
	270	#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
	271	#define CONFIG_SYS_MMC_ENV_DEV 0
d6d07a9b SA	272	#endif
	273
	274	#ifdef CONFIG_ENV_IS_IN_NAND
	275	#define CONFIG_ENV_SIZE (64 * 2048)
	276	#define CONFIG_ENV_SECT_SIZE (64 * 2048)
	277	#define CONFIG_ENV_RANGE (512 * 1024)
	278	#define CONFIG_ENV_OFFSET 0x180000
	279	#endif
8c653124 AW	280
	281	#define CONFIG_OF_LIBFDT
	282	#define CONFIG_CMD_BOOTZ
	283
	284	#endif