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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
8c653124 AW |
2 | /* |
3 | * Copyright 2013 Freescale Semiconductor, Inc. | |
4 | * | |
5 | * Configuration settings for the Freescale Vybrid vf610twr board. | |
8c653124 AW |
6 | */ |
7 | ||
8 | #ifndef __CONFIG_H | |
9 | #define __CONFIG_H | |
10 | ||
11 | #include <asm/arch/imx-regs.h> | |
1af3c7f4 | 12 | #include <linux/stringify.h> |
8c653124 | 13 | |
18fb0e3c | 14 | #define CONFIG_SYS_FSL_CLK |
8c653124 AW |
15 | |
16 | #define CONFIG_MACH_TYPE 4146 | |
17 | ||
8c653124 AW |
18 | /* Enable passing of ATAGs */ |
19 | #define CONFIG_CMDLINE_TAG | |
20 | ||
8c653124 AW |
21 | /* Size of malloc() pool */ |
22 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) | |
23 | ||
d6d07a9b | 24 | /* NAND support */ |
8fca2d8c | 25 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
d6d07a9b SA |
26 | |
27 | #ifdef CONFIG_CMD_NAND | |
d6d07a9b SA |
28 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
29 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR | |
30 | ||
d6d07a9b | 31 | /* Dynamic MTD partition support */ |
d6d07a9b SA |
32 | #endif |
33 | ||
8c653124 AW |
34 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
35 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
36 | ||
8c653124 | 37 | #define CONFIG_FEC_MXC |
8c653124 AW |
38 | #define IMX_FEC_BASE ENET_BASE_ADDR |
39 | #define CONFIG_FEC_XCV_TYPE RMII | |
40 | #define CONFIG_FEC_MXC_PHYADDR 0 | |
8c653124 | 41 | |
1221b3d7 | 42 | /* I2C Configs */ |
b089d039 | 43 | #define CONFIG_SYS_SPD_BUS_NUM 0 |
1221b3d7 | 44 | |
b188067f | 45 | /* We boot from the gfxRAM area of the OCRAM. */ |
c0f432c3 | 46 | #define CONFIG_BOARD_SIZE_LIMIT 520192 |
8c653124 | 47 | |
cf04ad32 SA |
48 | /* |
49 | * We do have 128MB of memory on the Vybrid Tower board. Leave the last | |
50 | * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from | |
51 | * DDR3. Hence, limit the memory range for image processing to 112MB | |
52 | * using bootm_size. All of the following must be within this range. | |
53 | * We have the default load at 32MB into DDR (for the kernel), FDT at | |
54 | * 64MB and the ramdisk 512KB above that (allowing for hopefully never | |
55 | * seen large trees). This allows a reasonable split between ramdisk | |
56 | * and kernel size, where the ram disk can be a bit larger. | |
57 | */ | |
58 | #define MEM_LAYOUT_ENV_SETTINGS \ | |
59 | "bootm_size=0x07000000\0" \ | |
60 | "loadaddr=0x82000000\0" \ | |
61 | "kernel_addr_r=0x82000000\0" \ | |
62 | "fdt_addr=0x84000000\0" \ | |
63 | "fdt_addr_r=0x84000000\0" \ | |
64 | "rdaddr=0x84080000\0" \ | |
65 | "ramdisk_addr_r=0x84080000\0" | |
66 | ||
ca21f61e | 67 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
cf04ad32 | 68 | MEM_LAYOUT_ENV_SETTINGS \ |
ca21f61e | 69 | "script=boot.scr\0" \ |
c0a5b081 | 70 | "image=zImage\0" \ |
ca21f61e | 71 | "console=ttyLP1\0" \ |
ca21f61e | 72 | "fdt_file=vf610-twr.dtb\0" \ |
ca21f61e OS |
73 | "boot_fdt=try\0" \ |
74 | "ip_dyn=yes\0" \ | |
75 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ | |
76 | "mmcpart=1\0" \ | |
77 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
78 | "update_sd_firmware_filename=u-boot.imx\0" \ | |
79 | "update_sd_firmware=" \ | |
80 | "if test ${ip_dyn} = yes; then " \ | |
81 | "setenv get_cmd dhcp; " \ | |
82 | "else " \ | |
83 | "setenv get_cmd tftp; " \ | |
84 | "fi; " \ | |
85 | "if mmc dev ${mmcdev}; then " \ | |
86 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
87 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
88 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
89 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
90 | "fi; " \ | |
91 | "fi\0" \ | |
92 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
93 | "root=${mmcroot}\0" \ | |
94 | "loadbootscript=" \ | |
95 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
96 | "bootscript=echo Running bootscript from mmc ...; " \ | |
97 | "source\0" \ | |
c0a5b081 | 98 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
ca21f61e OS |
99 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
100 | "mmcboot=echo Booting from mmc ...; " \ | |
101 | "run mmcargs; " \ | |
102 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
103 | "if run loadfdt; then " \ | |
c0a5b081 | 104 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
ca21f61e OS |
105 | "else " \ |
106 | "if test ${boot_fdt} = try; then " \ | |
c0a5b081 | 107 | "bootz; " \ |
ca21f61e OS |
108 | "else " \ |
109 | "echo WARN: Cannot load the DT; " \ | |
110 | "fi; " \ | |
111 | "fi; " \ | |
112 | "else " \ | |
c0a5b081 | 113 | "bootz; " \ |
ca21f61e OS |
114 | "fi;\0" \ |
115 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
116 | "root=/dev/nfs " \ | |
117 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
118 | "netboot=echo Booting from net ...; " \ | |
119 | "run netargs; " \ | |
120 | "if test ${ip_dyn} = yes; then " \ | |
121 | "setenv get_cmd dhcp; " \ | |
122 | "else " \ | |
123 | "setenv get_cmd tftp; " \ | |
124 | "fi; " \ | |
c0a5b081 | 125 | "${get_cmd} ${image}; " \ |
ca21f61e OS |
126 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
127 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
c0a5b081 | 128 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
ca21f61e OS |
129 | "else " \ |
130 | "if test ${boot_fdt} = try; then " \ | |
c0a5b081 | 131 | "bootz; " \ |
ca21f61e OS |
132 | "else " \ |
133 | "echo WARN: Cannot load the DT; " \ | |
134 | "fi; " \ | |
135 | "fi; " \ | |
136 | "else " \ | |
c0a5b081 | 137 | "bootz; " \ |
ca21f61e OS |
138 | "fi;\0" |
139 | ||
140 | #define CONFIG_BOOTCOMMAND \ | |
141 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
142 | "if run loadbootscript; then " \ | |
143 | "run bootscript; " \ | |
144 | "else " \ | |
c0a5b081 | 145 | "if run loadimage; then " \ |
ca21f61e OS |
146 | "run mmcboot; " \ |
147 | "else run netboot; " \ | |
148 | "fi; " \ | |
149 | "fi; " \ | |
150 | "else run netboot; fi" | |
151 | ||
8c653124 | 152 | /* Miscellaneous configurable options */ |
8c653124 | 153 | |
8c653124 | 154 | /* Physical memory map */ |
8c653124 AW |
155 | #define PHYS_SDRAM (0x80000000) |
156 | #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) | |
157 | ||
158 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
159 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
160 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
161 | ||
162 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
163 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
164 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
165 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
166 | ||
d6d07a9b | 167 | #ifdef CONFIG_ENV_IS_IN_NAND |
d6d07a9b | 168 | #define CONFIG_ENV_RANGE (512 * 1024) |
d6d07a9b | 169 | #endif |
8c653124 | 170 | |
8c653124 | 171 | #endif |