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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
e2d282a1 FE |
2 | /* |
3 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
4 | * | |
5 | * Configuration settings for the Wandboard. | |
e2d282a1 FE |
6 | */ |
7 | ||
8 | #ifndef __CONFIG_H | |
9 | #define __CONFIG_H | |
10 | ||
02824dc7 | 11 | #include "mx6_common.h" |
e2d282a1 | 12 | |
0d1ea052 FE |
13 | #include "imx6_spl.h" |
14 | ||
92a1babf | 15 | #define CONFIG_MACH_TYPE MACH_TYPE_WANDBOARD_IMX6 |
e2d282a1 | 16 | |
e2d282a1 | 17 | /* Size of malloc() pool */ |
7bcb983f | 18 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
e2d282a1 | 19 | |
e2d282a1 FE |
20 | #define CONFIG_MXC_UART |
21 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
22 | ||
e355eec7 GC |
23 | /* SATA Configs */ |
24 | ||
e355eec7 | 25 | #ifdef CONFIG_CMD_SATA |
e355eec7 GC |
26 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 |
27 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
28 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR | |
29 | #define CONFIG_LBA48 | |
e355eec7 GC |
30 | #endif |
31 | ||
e2d282a1 FE |
32 | #define CONFIG_SYS_MEMTEST_START 0x10000000 |
33 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) | |
e2d282a1 | 34 | |
8bc7c487 | 35 | /* I2C Configs */ |
8bc7c487 OS |
36 | #define CONFIG_SYS_I2C |
37 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
38 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
39 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 40 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
8bc7c487 OS |
41 | #define CONFIG_SYS_I2C_SPEED 100000 |
42 | ||
066d97c7 FE |
43 | /* PMIC */ |
44 | #define CONFIG_POWER | |
45 | #define CONFIG_POWER_I2C | |
46 | #define CONFIG_POWER_PFUZE100 | |
47 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
48 | ||
e2d282a1 | 49 | /* MMC Configuration */ |
5ed15738 | 50 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
e2d282a1 | 51 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
e2d282a1 | 52 | |
9df47577 | 53 | /* USB Configs */ |
9df47577 JH |
54 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
55 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
56 | #define CONFIG_MXC_USB_FLAGS 0 | |
57 | ||
e2d282a1 | 58 | /* Ethernet Configuration */ |
e2d282a1 FE |
59 | #define CONFIG_FEC_MXC |
60 | #define CONFIG_MII | |
61 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
62 | #define CONFIG_FEC_XCV_TYPE RGMII | |
63 | #define CONFIG_ETHPRIME "FEC" | |
64 | #define CONFIG_FEC_MXC_PHYADDR 1 | |
e2d282a1 FE |
65 | #define CONFIG_PHY_ATHEROS |
66 | ||
7bcb983f | 67 | /* Framebuffer */ |
36c0627b | 68 | #ifdef CONFIG_VIDEO |
7bcb983f | 69 | #define CONFIG_VIDEO_IPUV3 |
7bcb983f FE |
70 | #define CONFIG_VIDEO_BMP_RLE8 |
71 | #define CONFIG_SPLASH_SCREEN | |
a7efb026 | 72 | #define CONFIG_SPLASH_SCREEN_ALIGN |
7bcb983f FE |
73 | #define CONFIG_BMP_16BPP |
74 | #define CONFIG_VIDEO_LOGO | |
a7efb026 | 75 | #define CONFIG_VIDEO_BMP_LOGO |
5ea7f0e3 | 76 | #define CONFIG_IMX_HDMI |
8bc7c487 | 77 | #define CONFIG_IMX_VIDEO_SKIP |
36c0627b | 78 | #endif |
7bcb983f | 79 | |
e2d282a1 | 80 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
acc6bb56 | 81 | "console=ttymxc0,115200\0" \ |
d727ab3c | 82 | "splashpos=m,m\0" \ |
0d1ea052 | 83 | "fdtfile=undefined\0" \ |
e2d282a1 FE |
84 | "fdt_high=0xffffffff\0" \ |
85 | "initrd_high=0xffffffff\0" \ | |
acc6bb56 | 86 | "fdt_addr_r=0x18000000\0" \ |
6584a1b5 | 87 | "fdt_addr=0x18000000\0" \ |
e2d282a1 | 88 | "ip_dyn=yes\0" \ |
1e1cbde0 | 89 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ |
84b4690f | 90 | "finduuid=part uuid mmc 0:1 uuid\0" \ |
0798d578 OS |
91 | "update_sd_firmware_filename=u-boot.imx\0" \ |
92 | "update_sd_firmware=" \ | |
93 | "if test ${ip_dyn} = yes; then " \ | |
94 | "setenv get_cmd dhcp; " \ | |
95 | "else " \ | |
96 | "setenv get_cmd tftp; " \ | |
97 | "fi; " \ | |
98 | "if mmc dev ${mmcdev}; then " \ | |
99 | "if ${get_cmd} ${update_sd_firmware_filename}; then " \ | |
100 | "setexpr fw_sz ${filesize} / 0x200; " \ | |
101 | "setexpr fw_sz ${fw_sz} + 1; " \ | |
102 | "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ | |
103 | "fi; " \ | |
104 | "fi\0" \ | |
0d1ea052 | 105 | "findfdt="\ |
e1f0715f FE |
106 | "if test $board_name = D1 && test $board_rev = MX6QP ; then " \ |
107 | "setenv fdtfile imx6qp-wandboard-revd1.dtb; fi; " \ | |
066d97c7 FE |
108 | "if test $board_name = D1 && test $board_rev = MX6Q ; then " \ |
109 | "setenv fdtfile imx6q-wandboard-revd1.dtb; fi; " \ | |
110 | "if test $board_name = D1 && test $board_rev = MX6DL ; then " \ | |
111 | "setenv fdtfile imx6dl-wandboard-revd1.dtb; fi; " \ | |
9a8804a8 | 112 | "if test $board_name = C1 && test $board_rev = MX6Q ; then " \ |
0d1ea052 | 113 | "setenv fdtfile imx6q-wandboard.dtb; fi; " \ |
9a8804a8 | 114 | "if test $board_name = C1 && test $board_rev = MX6DL ; then " \ |
0d1ea052 | 115 | "setenv fdtfile imx6dl-wandboard.dtb; fi; " \ |
9a8804a8 FE |
116 | "if test $board_name = B1 && test $board_rev = MX6Q ; then " \ |
117 | "setenv fdtfile imx6q-wandboard-revb1.dtb; fi; " \ | |
118 | "if test $board_name = B1 && test $board_rev = MX6DL ; then " \ | |
119 | "setenv fdtfile imx6dl-wandboard-revb1.dtb; fi; " \ | |
0d1ea052 FE |
120 | "if test $fdtfile = undefined; then " \ |
121 | "echo WARNING: Could not determine dtb to use; fi; \0" \ | |
acc6bb56 | 122 | "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ |
d3b78e18 | 123 | "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ |
acc6bb56 VC |
124 | "ramdisk_addr_r=0x13000000\0" \ |
125 | "ramdiskaddr=0x13000000\0" \ | |
126 | "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ | |
127 | BOOTENV | |
128 | ||
129 | #define BOOT_TARGET_DEVICES(func) \ | |
130 | func(MMC, mmc, 0) \ | |
131 | func(MMC, mmc, 1) \ | |
3b22599e | 132 | func(SATA, sata, 0) \ |
acc6bb56 VC |
133 | func(USB, usb, 0) \ |
134 | func(PXE, pxe, na) \ | |
135 | func(DHCP, dhcp, na) | |
e2d282a1 | 136 | |
acc6bb56 | 137 | #include <config_distro_bootcmd.h> |
e2d282a1 | 138 | |
e2d282a1 FE |
139 | /* Physical Memory Map */ |
140 | #define CONFIG_NR_DRAM_BANKS 1 | |
141 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
142 | ||
143 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
144 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
145 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
146 | ||
147 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
148 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
149 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
150 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
151 | ||
056845c2 | 152 | /* Environment organization */ |
e2d282a1 FE |
153 | #define CONFIG_ENV_SIZE (8 * 1024) |
154 | ||
67ff9e11 | 155 | #define CONFIG_ENV_OFFSET (768 * 1024) |
e2d282a1 FE |
156 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
157 | ||
e2d282a1 | 158 | #endif /* __CONFIG_H * */ |