[thirdparty/u-boot.git] / include / configs / wb45n.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Configuation settings for the WB45N CPU Module.
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

#include <asm/hardware.h>
#include <linux/stringify.h>

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK  32768
#define CONFIG_SYS_AT91_MAIN_CLOCK  12000000	/* 12 MHz crystal */

#define CONFIG_CMDLINE_TAG	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY	/* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE   ATMEL_BASE_DBGU
#define CONFIG_USART_ID     ATMEL_ID_SYS

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE

/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE       0x20000000
#define CONFIG_SYS_SDRAM_SIZE       0x04000000	/* 64 MB */

#define CONFIG_SYS_INIT_SP_ADDR \
    (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)

/* NAND flash */
#define CONFIG_SYS_MAX_NAND_DEVICE  1
#define CONFIG_SYS_NAND_BASE        0x40000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE    (1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN   AT91_PIN_PD5

#define CONFIG_RBTREE
#define CONFIG_LZO

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT      20
#define CONFIG_MACB_SEARCH_PHY
#define CONFIG_ETHADDR              C0:EE:40:00:00:00
#define CONFIG_ENV_OVERWRITE        1

/* System */
#define CONFIG_SYS_LOAD_ADDR        0x22000000	/* load address */

#ifdef CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env + linux in nandflash */

#define CONFIG_BOOTCOMMAND  "nand read 0x22000000 0xe0000 0x280000; " \
    "run _mtd; bootm"

#define MTDIDS_DEFAULT      "nand0=atmel_nand"
#define MTDPARTS_DEFAULT    "mtdparts=atmel_nand:" \
                            "128K(at91bs)," \
                            "512K(u-boot)," \
                            "128K(u-boot-env)," \
                            "128K(redund-env)," \
                            "2560K(kernel-a)," \
                            "2560K(kernel-b)," \
                            "38912K(rootfs-a)," \
                            "38912K(rootfs-b)," \
                            "46208K(user)," \
                            "512K(logs)"

#else
#error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
#endif

#define CONFIG_BOOTARGS     "console=ttyS0,115200 earlyprintk " \
                            "rw noinitrd mem=64M "              \
                            "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"

#define CONFIG_EXTRA_ENV_SETTINGS       \
    "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
    "autoload=no\0" \
    "autostart=no\0" \
    "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
    "\0"

#define CONFIG_SYS_CBSIZE   256
#define CONFIG_SYS_MAXARGS  16

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN       (512 * 1024 + 0x1000)

/* SPL */
#define CONFIG_SPL_MAX_SIZE         0x6000
#define CONFIG_SPL_STACK            0x308000

#define CONFIG_SPL_BSS_START_ADDR   0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE     0x80000
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE  0x80000

#define CONFIG_SYS_MONITOR_LEN      (512 << 10)

#define CONFIG_SYS_MASTER_CLOCK     132096000
#define CONFIG_SYS_AT91_PLLA        0x20c73f03
#define CONFIG_SYS_MCKR             0x1301
#define CONFIG_SYS_MCKR_CSS         0x1302

#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE   0x800
#define CONFIG_SYS_NAND_PAGE_COUNT  64
#define CONFIG_SYS_NAND_OOBSIZE     64
#define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0

#endif				/* __CONFIG_H__ */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
5aaef600 BW	2	/*
5aaef600 BW	3	* Configuation settings for the WB45N CPU Module.
5aaef600 BW	4	*/
	5
	6	#ifndef __CONFIG_H__
	7	#define __CONFIG_H__
	8
	9	#include <asm/hardware.h>
1af3c7f4	10	#include <linux/stringify.h>
5aaef600	11
5aaef600 BW	12	/* ARM asynchronous clock */
	13	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	14	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
	15
	16	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	17	#define CONFIG_SETUP_MEMORY_TAGS
	18	#define CONFIG_INITRD_TAG
	19	#define CONFIG_SKIP_LOWLEVEL_INIT
	20
	21	/* general purpose I/O */
	22	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
	23	#define CONFIG_AT91_GPIO
	24
	25	/* serial console */
	26	#define CONFIG_ATMEL_USART
	27	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	28	#define CONFIG_USART_ID ATMEL_ID_SYS
	29
	30	/*
	31	* BOOTP options
	32	*/
	33	#define CONFIG_BOOTP_BOOTFILESIZE
5aaef600 BW	34
5aaef600 BW	35	/* SDRAM */
5aaef600 BW	36	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	37	#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
	38
	39	#define CONFIG_SYS_INIT_SP_ADDR \
	40	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
	41
	42	/* NAND flash */
5aaef600 BW	43	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	44	#define CONFIG_SYS_NAND_BASE 0x40000000
	45	/* our ALE is AD21 */
	46	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	47	/* our CLE is AD22 */
	48	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	49	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
	50	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
	51
5aaef600 BW	52	#define CONFIG_RBTREE
	53	#define CONFIG_LZO
	54
	55	/* Ethernet */
	56	#define CONFIG_MACB
	57	#define CONFIG_RMII
	58	#define CONFIG_NET_RETRY_COUNT 20
	59	#define CONFIG_MACB_SEARCH_PHY
	60	#define CONFIG_ETHADDR C0:EE:40:00:00:00
	61	#define CONFIG_ENV_OVERWRITE 1
	62
	63	/* System */
	64	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
5aaef600 BW	65
	66	#ifdef CONFIG_SYS_USE_NANDFLASH
	67	/* bootstrap + u-boot + env + linux in nandflash */
5aaef600 BW	68
	69	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \
	70	"run _mtd; bootm"
	71
	72	#define MTDIDS_DEFAULT "nand0=atmel_nand"
	73	#define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \
	74	"128K(at91bs)," \
	75	"512K(u-boot)," \
	76	"128K(u-boot-env)," \
	77	"128K(redund-env)," \
	78	"2560K(kernel-a)," \
	79	"2560K(kernel-b)," \
	80	"38912K(rootfs-a)," \
	81	"38912K(rootfs-b)," \
	82	"46208K(user)," \
	83	"512K(logs)"
	84
	85	#else
	86	#error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
	87	#endif
	88
	89	#define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk " \
	90	"rw noinitrd mem=64M " \
	91	"rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"
	92
	93	#define CONFIG_EXTRA_ENV_SETTINGS \
	94	"_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
	95	"autoload=no\0" \
	96	"autostart=no\0" \
	97	"ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
	98	"\0"
	99
	100	#define CONFIG_SYS_CBSIZE 256
	101	#define CONFIG_SYS_MAXARGS 16
5aaef600 BW	102
	103	/*
	104	* Size of malloc() pool
	105	*/
	106	#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
	107
	108	/* SPL */
5aaef600 BW	109	#define CONFIG_SPL_MAX_SIZE 0x6000
	110	#define CONFIG_SPL_STACK 0x308000
	111
	112	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	113	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
	114	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	115	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
	116
	117	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
	118
	119	#define CONFIG_SYS_MASTER_CLOCK 132096000
	120	#define CONFIG_SYS_AT91_PLLA 0x20c73f03
	121	#define CONFIG_SYS_MCKR 0x1301
	122	#define CONFIG_SYS_MCKR_CSS 0x1302
	123
	124	#define CONFIG_SPL_NAND_DRIVERS
	125	#define CONFIG_SPL_NAND_BASE
	126	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
	127	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	128	#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
	129	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	130	#define CONFIG_SYS_NAND_OOBSIZE 64
	131	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
	132	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
5aaef600 BW	133
5aaef600 BW	134	#endif /* __CONFIG_H__ */