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a7f480d9 SR |
1 | /* |
2 | * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de> | |
3 | * | |
4 | * Configuration settings for the CCV xPress board | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | #ifndef __XPRESS_CONFIG_H | |
9 | #define __XPRESS_CONFIG_H | |
10 | ||
11 | #include "mx6_common.h" | |
552a848e | 12 | #include <asm/mach-imx/gpio.h> |
a7f480d9 SR |
13 | |
14 | /* SPL options */ | |
a7f480d9 SR |
15 | #include "imx6_spl.h" |
16 | ||
a7f480d9 SR |
17 | /* Size of malloc() pool */ |
18 | #define CONFIG_SYS_MALLOC_LEN (16 << 20) | |
19 | ||
a7f480d9 | 20 | #define CONFIG_MXC_UART |
fe12386c | 21 | #define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR |
a7f480d9 SR |
22 | |
23 | /* MMC Configs */ | |
24 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR | |
25 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ | |
26 | ||
27 | /* I2C configs */ | |
a7f480d9 SR |
28 | #define CONFIG_SYS_I2C |
29 | #define CONFIG_SYS_I2C_MXC | |
30 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ | |
31 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
32 | #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ | |
33 | #define CONFIG_SYS_I2C_SPEED 100000 | |
34 | ||
35 | /* Miscellaneous configurable options */ | |
a7f480d9 SR |
36 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
37 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) | |
38 | ||
39 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
40 | #define CONFIG_SYS_HZ 1000 | |
41 | ||
a7f480d9 SR |
42 | /* Physical Memory Map */ |
43 | #define CONFIG_NR_DRAM_BANKS 1 | |
44 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
45 | #define PHYS_SDRAM_SIZE (128 << 20) | |
46 | ||
47 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
48 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
49 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
50 | ||
51 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
52 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
53 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
54 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
55 | ||
a7f480d9 SR |
56 | /* Environment is in stored in the eMMC boot partition */ |
57 | #define CONFIG_ENV_SIZE (16 << 10) | |
a7f480d9 SR |
58 | #define CONFIG_ENV_OFFSET (512 << 10) |
59 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ | |
60 | #define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */ | |
61 | #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */ | |
62 | ||
a7f480d9 | 63 | /* USB Configs */ |
a7f480d9 SR |
64 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
65 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
66 | #define CONFIG_MXC_USB_FLAGS 0 | |
67 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
68 | ||
69 | #define CONFIG_FEC_MXC | |
70 | #define CONFIG_MII | |
a7f480d9 SR |
71 | #define CONFIG_FEC_ENET_DEV 0 |
72 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
73 | #define CONFIG_FEC_MXC_PHYADDR 0x0 | |
74 | #define CONFIG_FEC_XCV_TYPE RMII | |
75 | #define CONFIG_ETHPRIME "FEC" | |
a7f480d9 SR |
76 | #define CONFIG_PHY_SMSC |
77 | ||
78 | #define CONFIG_IMX_THERMAL | |
79 | ||
80 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | |
81 | ||
82 | #define CONFIG_UBOOT_SECTOR_START 0x2 | |
83 | #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe | |
84 | ||
85 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
86 | "script=boot.scr\0" \ | |
87 | "image=zImage\0" \ | |
fe12386c | 88 | "console=ttymxc6\0" \ |
a7f480d9 SR |
89 | "fdt_high=0xffffffff\0" \ |
90 | "initrd_high=0xffffffff\0" \ | |
91 | "fdt_file=undefined\0" \ | |
92 | "fdt_addr=0x83000000\0" \ | |
93 | "boot_fdt=try\0" \ | |
94 | "ip_dyn=yes\0" \ | |
95 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ | |
96 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ | |
97 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ | |
98 | "mmcautodetect=yes\0" \ | |
99 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
100 | "root=${mmcroot}\0" \ | |
101 | "loadbootscript=" \ | |
102 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
103 | "bootscript=echo Running bootscript from mmc ...; " \ | |
104 | "source\0" \ | |
105 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
106 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
107 | "mmcboot=echo Booting from mmc ...; " \ | |
108 | "run mmcargs; " \ | |
109 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
110 | "if run loadfdt; then " \ | |
111 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
112 | "else " \ | |
113 | "if test ${boot_fdt} = try; then " \ | |
114 | "bootz; " \ | |
115 | "else " \ | |
116 | "echo WARN: Cannot load the DT; " \ | |
117 | "fi; " \ | |
118 | "fi; " \ | |
119 | "else " \ | |
120 | "bootz; " \ | |
121 | "fi;\0" \ | |
122 | "uboot=ccv/u-boot.imx\0" \ | |
123 | "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \ | |
124 | "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \ | |
125 | "update_uboot=if tftp ${uboot}; then " \ | |
126 | "if itest ${filesize} > 0; then " \ | |
127 | "mmc dev 0 1;" \ | |
128 | "setexpr blkc ${filesize} / 0x200;" \ | |
129 | "setexpr blkc ${blkc} + 1;" \ | |
130 | "if itest ${blkc} <= ${uboot_size}; then " \ | |
131 | "mmc write ${loadaddr} ${uboot_start} " \ | |
132 | "${blkc};" \ | |
133 | "fi;" \ | |
134 | "fi; fi;" \ | |
135 | "setenv filesize; setenv blkc\0" \ | |
136 | "update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0" | |
137 | ||
138 | #endif /* __XPRESS_CONFIG_H */ |