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39f0023e MW |
1 | /* |
2 | * (c) 2011 Graf-Syteco, Matthias Weisser | |
3 | * <weisserm@arcor.de> | |
4 | * | |
5 | * Configuation settings for the zmx25 board | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
39f0023e MW |
8 | */ |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
12 | ||
3dae5b51 RH |
13 | #include <asm/arch/imx-regs.h> |
14 | ||
3dae5b51 RH |
15 | #define CONFIG_SYS_TIMER_RATE 32768 |
16 | #define CONFIG_SYS_TIMER_COUNTER \ | |
17 | (&((struct gpt_regs *)IMX_GPT1_BASE)->counter) | |
18 | ||
94ba26f2 | 19 | #define CONFIG_MACH_TYPE MACH_TYPE_ZMX25 |
39f0023e MW |
20 | /* |
21 | * Environment settings | |
22 | */ | |
23 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
24 | "gs_fast_boot=setenv bootdelay 5\0" \ | |
25 | "gs_slow_boot=setenv bootdelay 10\0" \ | |
26 | "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \ | |
27 | "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \ | |
28 | "bootm 0x81000000; bootelf 0x81000000\0" | |
29 | ||
30 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
31 | #define CONFIG_SETUP_MEMORY_TAGS | |
32 | #define CONFIG_INITRD_TAG | |
39f0023e | 33 | |
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34 | /* |
35 | * Hardware drivers | |
36 | */ | |
37 | ||
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38 | /* |
39 | * Serial | |
40 | */ | |
41 | #define CONFIG_MXC_UART | |
40f6fffe | 42 | #define CONFIG_MXC_UART_BASE UART2_BASE |
39f0023e | 43 | #define CONFIG_CONS_INDEX 1 /* use UART2 for console */ |
39f0023e MW |
44 | |
45 | /* | |
46 | * Ethernet | |
47 | */ | |
48 | #define CONFIG_FEC_MXC | |
49 | #define CONFIG_FEC_MXC_PHYADDR 0x00 | |
50 | #define CONFIG_MII | |
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51 | |
52 | /* | |
53 | * BOOTP options | |
54 | */ | |
55 | #define CONFIG_BOOTP_BOOTFILESIZE | |
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56 | |
57 | /* | |
58 | * Command line configuration. | |
59 | */ | |
39f0023e | 60 | |
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61 | /* |
62 | * Additional command | |
63 | */ | |
39f0023e | 64 | |
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65 | /* |
66 | * USB | |
67 | */ | |
68 | #ifdef CONFIG_CMD_USB | |
39f0023e MW |
69 | #define CONFIG_USB_EHCI_MXC |
70 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
9fa3d093 BT |
71 | #define CONFIG_MXC_USB_PORT 1 |
72 | #define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL | |
73 | #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN) | |
39f0023e | 74 | #define CONFIG_EHCI_IS_TDI |
39f0023e MW |
75 | #endif /* CONFIG_CMD_USB */ |
76 | ||
77 | /* SDRAM */ | |
78 | #define CONFIG_NR_DRAM_BANKS 1 | |
79 | #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ | |
80 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ | |
81 | ||
82 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
83 | #define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */ | |
84 | ||
85 | /* | |
86 | * FLASH and environment organization | |
87 | */ | |
88 | #define CONFIG_SYS_FLASH_BASE 0xA0000000 | |
89 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
90 | #define CONFIG_SYS_MAX_FLASH_SECT 256 | |
91 | ||
92 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) | |
39f0023e MW |
93 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
94 | #define CONFIG_ENV_SIZE (128 * 1024) | |
95 | ||
96 | /* | |
97 | * CFI FLASH driver setup | |
98 | */ | |
99 | #define CONFIG_SYS_FLASH_CFI | |
100 | #define CONFIG_FLASH_CFI_DRIVER | |
101 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */ | |
102 | ||
103 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE | |
104 | ||
105 | #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) | |
106 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) | |
107 | ||
39f0023e MW |
108 | #define CONFIG_PREBOOT "" |
109 | ||
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110 | |
111 | /* | |
112 | * Size of malloc() pool | |
113 | */ | |
114 | #define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000) | |
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115 | |
116 | #endif /* __CONFIG_H */ |