projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 2b62997c CC |
1 | /* |
| 2 | * CPSW Ethernet Switch Driver | |
| 3 | * | |
| 4 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or | |
| 7 | * modify it under the terms of the GNU General Public License as | |
| 8 | * published by the Free Software Foundation version 2. | |
| 9 | * | |
| 10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
| 11 | * kind, whether express or implied; without even the implied warranty | |
| 12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | * GNU General Public License for more details. | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef _CPSW_H_ | |
| 17 | #define _CPSW_H_ | |
| 18 | ||
| 0229c933 FA |
19 | /* reg offset */ |
| 20 | #define CPSW_HOST_PORT_OFFSET 0x108 | |
| 21 | #define CPSW_SLAVE0_OFFSET 0x208 | |
| 22 | #define CPSW_SLAVE1_OFFSET 0x308 | |
| 23 | #define CPSW_SLAVE_SIZE 0x100 | |
| 24 | #define CPSW_CPDMA_OFFSET 0x800 | |
| 25 | #define CPSW_HW_STATS 0x900 | |
| 26 | #define CPSW_STATERAM_OFFSET 0xa00 | |
| 27 | #define CPSW_CPTS_OFFSET 0xc00 | |
| 28 | #define CPSW_ALE_OFFSET 0xd00 | |
| 29 | #define CPSW_SLIVER0_OFFSET 0xd80 | |
| 30 | #define CPSW_SLIVER1_OFFSET 0xdc0 | |
| 31 | #define CPSW_BD_OFFSET 0x2000 | |
| 32 | #define CPSW_MDIO_DIV 0xff | |
| 33 | ||
| 34 | #define AM335X_GMII_SEL_OFFSET 0x630 | |
| 35 | ||
| 2b62997c CC |
36 | struct cpsw_slave_data { |
| 37 | u32 slave_reg_ofs; | |
| 38 | u32 sliver_reg_ofs; | |
| 9c653aad | 39 | int phy_addr; |
| 2b62997c | 40 | int phy_if; |
| cb386227 | 41 | int phy_of_handle; |
| 2b62997c CC |
42 | }; |
| 43 | ||
| 44 | enum { | |
| 45 | CPSW_CTRL_VERSION_1 = 0, | |
| 46 | CPSW_CTRL_VERSION_2 /* am33xx like devices */ | |
| 47 | }; | |
| 48 | ||
| 49 | struct cpsw_platform_data { | |
| 50 | u32 mdio_base; | |
| 51 | u32 cpsw_base; | |
| 4cc77895 M |
52 | u32 mac_id; |
| 53 | u32 gmii_sel; | |
| 2b62997c CC |
54 | int mdio_div; |
| 55 | int channels; /* number of cpdma channels (symmetric) */ | |
| 56 | u32 cpdma_reg_ofs; /* cpdma register offset */ | |
| 57 | int slaves; /* number of slave cpgmac ports */ | |
| 58 | u32 ale_reg_ofs; /* address lookup engine reg offset */ | |
| 59 | int ale_entries; /* ale table size */ | |
| 60 | u32 host_port_reg_ofs; /* cpdma host port registers */ | |
| 61 | u32 hw_stats_reg_ofs; /* cpsw hw stats counters */ | |
| 2bf36ac6 | 62 | u32 bd_ram_ofs; /* Buffer Descriptor RAM offset */ |
| 2b62997c CC |
63 | u32 mac_control; |
| 64 | struct cpsw_slave_data *slave_data; | |
| 65 | void (*control)(int enabled); | |
| 66 | u32 host_port_num; | |
| 7a022753 | 67 | u32 active_slave; |
| ab971530 | 68 | bool rmii_clock_external; |
| 2b62997c | 69 | u8 version; |
| e50f878c | 70 | const char *phy_sel_compat; |
| a58d222d FA |
71 | u32 syscon_addr; |
| 72 | const char *macid_sel_compat; | |
| 2b62997c CC |
73 | }; |
| 74 | ||
| 75 | int cpsw_register(struct cpsw_platform_data *data); | |
| a58d222d FA |
76 | int ti_cm_get_macid_addr(struct udevice *dev, int slave, |
| 77 | struct cpsw_platform_data *data); | |
| 78 | void ti_cm_get_macid(struct udevice *dev, struct cpsw_platform_data *data, | |
| 79 | u8 *mac_addr); | |
| e2597be5 | 80 | int cpsw_get_slave_phy_addr(struct udevice *dev, int slave); |
| 2b62997c CC |
81 | |
| 82 | #endif /* _CPSW_H_ */ |