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dm: x86: Add a northbridge uclass
[people/ms/u-boot.git] / include / dm / uclass-id.h
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1/*
2 * Copyright (c) 2013 Google, Inc
3 *
4 * (C) Copyright 2012
5 * Pavel Herrmann <morpheus.ibis@gmail.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef _DM_UCLASS_ID_H
11#define _DM_UCLASS_ID_H
12
13/* TODO(sjg@chromium.org): this could be compile-time generated */
14enum uclass_id {
15 /* These are used internally by driver model */
16 UCLASS_ROOT = 0,
17 UCLASS_DEMO,
18 UCLASS_TEST,
19 UCLASS_TEST_FDT,
1ca7e206 20 UCLASS_TEST_BUS,
c60e1f25 21 UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
c70c71d8 22 UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
36d0d3b4 23 UCLASS_PCI_EMUL, /* sandbox PCI device emulator */
019808f9 24 UCLASS_USB_EMUL, /* sandbox USB bus device emulator */
3d7cf419 25 UCLASS_SIMPLE_BUS, /* bus with child devices */
6494d708 26
3d7cf419 27 /* U-Boot uclasses start here - in alphabetical order */
5decbf53 28 UCLASS_ADC, /* Analog-to-digital converter */
f26c8a8e 29 UCLASS_CLK, /* Clock source, e.g. used by peripherals */
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30 UCLASS_CPU, /* CPU, typically part of an SoC */
31 UCLASS_CROS_EC, /* Chrome OS EC */
2dcf1433 32 UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
6c51df68 33 UCLASS_RAM, /* RAM controller */
3d7cf419 34 UCLASS_ETH, /* Ethernet device */
0040b944 35 UCLASS_GPIO, /* Bank of general-purpose I/O pins */
c6202d85 36 UCLASS_I2C, /* I2C bus */
20142019 37 UCLASS_I2C_EEPROM, /* I2C EEPROM device */
3d7cf419 38 UCLASS_I2C_GENERIC, /* Generic I2C device */
3d1957f0 39 UCLASS_I2C_MUX, /* I2C multiplexer */
e76187a3 40 UCLASS_IRQ, /* Interrupt controller */
34ab37ee 41 UCLASS_KEYBOARD, /* Keyboard input device */
5917112c 42 UCLASS_LED, /* Light-emitting diode (LED) */
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43 UCLASS_LPC, /* x86 'low pin count' interface */
44 UCLASS_MASS_STORAGE, /* Mass storage device */
4395e06e 45 UCLASS_MISC, /* Miscellaneous device */
e7ecf7cb 46 UCLASS_MMC, /* SD / MMC card or chip */
31d2b4fd 47 UCLASS_MOD_EXP, /* RSA Mod Exp device */
d8587993 48 UCLASS_MTD, /* Memory Technology Device (MTD) device */
5544757c 49 UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
f563dc1d 50 UCLASS_PANEL, /* Display panel, such as an LCD */
363bf77a 51 UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
3d7cf419 52 UCLASS_PCH, /* x86 platform controller hub */
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53 UCLASS_PCI, /* PCI bus */
54 UCLASS_PCI_GENERIC, /* Generic PCI bus device */
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55 UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
56 UCLASS_PINCONFIG, /* Pin configuration node device */
4e389366 57 UCLASS_PMIC, /* PMIC I/O device */
fc760cb8 58 UCLASS_PWM, /* Pulse-width modulator */
5fd6badb 59 UCLASS_PWRSEQ, /* Power sequence device */
4e389366 60 UCLASS_REGULATOR, /* Regulator device */
f9917454 61 UCLASS_RESET, /* Reset device */
ddf56bc7 62 UCLASS_REMOTEPROC, /* Remote Processor device */
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63 UCLASS_RTC, /* Real time clock device */
64 UCLASS_SERIAL, /* Serial UART */
65 UCLASS_SPI, /* SPI bus */
3d7cf419 66 UCLASS_SPI_FLASH, /* SPI flash */
4e389366 67 UCLASS_SPI_GENERIC, /* Generic SPI flash target */
57251285 68 UCLASS_SYSCON, /* System configuration device */
3d7cf419 69 UCLASS_THERMAL, /* Thermal sensor */
c8a7ba9e 70 UCLASS_TIMER, /* Timer device */
f255d31f 71 UCLASS_TPM, /* Trusted Platform Module TIS interface */
de31213f 72 UCLASS_USB, /* USB bus */
449230f0 73 UCLASS_USB_DEV_GENERIC, /* USB generic device */
3d7cf419 74 UCLASS_USB_HUB, /* USB hub */
1acafc73 75 UCLASS_VIDEO, /* Video or LCD device */
801ab9e9 76 UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */
83510766 77 UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */
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78
79 UCLASS_COUNT,
80 UCLASS_INVALID = -1,
81};
82
83#endif