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6f1c0430 1/* Copyright (c) 2018 The Chromium OS Authors. All rights reserved.
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2 * Use of this source code is governed by a BSD-style license that can be
3 * found in the LICENSE file.
4 */
5
6/* Host communication command constants for Chrome EC */
7
8#ifndef __CROS_EC_COMMANDS_H
9#define __CROS_EC_COMMANDS_H
10
11/*
12 * Protocol overview
13 *
14 * request: CMD [ P0 P1 P2 ... Pn S ]
15 * response: ERR [ P0 P1 P2 ... Pn S ]
16 *
17 * where the bytes are defined as follow :
18 * - CMD is the command code. (defined by EC_CMD_ constants)
19 * - ERR is the error code. (defined by EC_RES_ constants)
20 * - Px is the optional payload.
21 * it is not sent if the error code is not success.
22 * (defined by ec_params_ and ec_response_ structures)
23 * - S is the checksum which is the sum of all payload bytes.
24 *
25 * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD
26 * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM.
27 * On I2C, all bytes are sent serially in the same message.
28 */
29
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30/*
31 * Current version of this protocol
32 *
33 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
34 * determined in other ways. Remove this once the kernel code no longer
35 * depends on it.
36 */
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37#define EC_PROTO_VERSION 0x00000002
38
39/* Command version mask */
40#define EC_VER_MASK(version) (1UL << (version))
41
42/* I/O addresses for ACPI commands */
43#define EC_LPC_ADDR_ACPI_DATA 0x62
44#define EC_LPC_ADDR_ACPI_CMD 0x66
45
46/* I/O addresses for host command */
47#define EC_LPC_ADDR_HOST_DATA 0x200
48#define EC_LPC_ADDR_HOST_CMD 0x204
49
50/* I/O addresses for host command args and params */
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51/* Protocol version 2 */
52#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
53#define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
54 * EC_PROTO2_MAX_PARAM_SIZE */
55/* Protocol version 3 */
56#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
57#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
58
59/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
60 * and they tell the kernel that so we have to think of it as two parts. */
61#define EC_HOST_CMD_REGION0 0x800
62#define EC_HOST_CMD_REGION1 0x880
63#define EC_HOST_CMD_REGION_SIZE 0x80
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64
65/* EC command register bit functions */
66#define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
67#define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
68#define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */
69#define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */
70#define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */
71#define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */
72#define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */
73
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74/* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource */
75#define MEC_EMI_BASE 0x800
76#define MEC_EMI_SIZE 8
77
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78#define EC_LPC_ADDR_MEMMAP 0x900
79#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
80#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
81
82/* The offset address of each type of data in mapped memory. */
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83#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
84#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
85#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
86#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
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87#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
88#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
89#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
90#define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
91#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
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92#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
93/* Unused 0x28 - 0x2f */
94#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
95/* Unused 0x31 - 0x33 */
96#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */
97/* Reserve 0x38 - 0x3f for additional host event-related stuff */
98/* Battery values are all 32 bits */
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99#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
100#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
101#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
102#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */
103#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
104#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
105#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
106#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
6f1c0430 107/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
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108#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
109#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
110#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
111#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
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112#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
113/* Unused 0x84 - 0x8f */
114#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
115/* Unused 0x91 */
116#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
117/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
118/* 0x94 - 0x99: 1st Accelerometer */
119/* 0x9a - 0x9f: 2nd Accelerometer */
120#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
121/* Unused 0xa6 - 0xdf */
122
123/*
124 * ACPI is unable to access memory mapped data at or above this offset due to
125 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
126 * which might be needed by ACPI.
127 */
128#define EC_MEMMAP_NO_ACPI 0xe0
129
130/* Define the format of the accelerometer mapped memory status byte. */
131#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
132#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4)
133#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7)
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134
135/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
136#define EC_TEMP_SENSOR_ENTRIES 16
137/*
138 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
139 *
140 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
141 */
142#define EC_TEMP_SENSOR_B_ENTRIES 8
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143
144/* Special values for mapped temperature sensors */
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145#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
146#define EC_TEMP_SENSOR_ERROR 0xfe
147#define EC_TEMP_SENSOR_NOT_POWERED 0xfd
148#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
149/*
150 * The offset of temperature value stored in mapped memory. This allows
151 * reporting a temperature range of 200K to 454K = -73C to 181C.
152 */
153#define EC_TEMP_SENSOR_OFFSET 200
154
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155/*
156 * Number of ALS readings at EC_MEMMAP_ALS
157 */
158#define EC_ALS_ENTRIES 2
159
160/*
161 * The default value a temperature sensor will return when it is present but
162 * has not been read this boot. This is a reasonable number to avoid
163 * triggering alarms on the host.
164 */
165#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
166
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167#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
168#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
169#define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
170
171/* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
172#define EC_BATT_FLAG_AC_PRESENT 0x01
173#define EC_BATT_FLAG_BATT_PRESENT 0x02
174#define EC_BATT_FLAG_DISCHARGING 0x04
175#define EC_BATT_FLAG_CHARGING 0x08
176#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
177
178/* Switch flags at EC_MEMMAP_SWITCHES */
179#define EC_SWITCH_LID_OPEN 0x01
180#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
181#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
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182/* Was recovery requested via keyboard; now unused. */
183#define EC_SWITCH_IGNORE1 0x08
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184/* Recovery requested via dedicated signal (from servo board) */
185#define EC_SWITCH_DEDICATED_RECOVERY 0x10
186/* Was fake developer mode switch; now unused. Remove in next refactor. */
187#define EC_SWITCH_IGNORE0 0x20
188
189/* Host command interface flags */
190/* Host command interface supports LPC args (LPC interface only) */
191#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
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192/* Host command interface supports version 3 protocol */
193#define EC_HOST_CMD_FLAG_VERSION_3 0x02
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194
195/* Wireless switch flags */
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196#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
197#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
198#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
199#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
200#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
201
202/*****************************************************************************/
203/*
204 * ACPI commands
205 *
206 * These are valid ONLY on the ACPI command/data port.
207 */
208
209/*
210 * ACPI Read Embedded Controller
211 *
212 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
213 *
214 * Use the following sequence:
215 *
216 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
217 * - Wait for EC_LPC_CMDR_PENDING bit to clear
218 * - Write address to EC_LPC_ADDR_ACPI_DATA
219 * - Wait for EC_LPC_CMDR_DATA bit to set
220 * - Read value from EC_LPC_ADDR_ACPI_DATA
221 */
222#define EC_CMD_ACPI_READ 0x0080
223
224/*
225 * ACPI Write Embedded Controller
226 *
227 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
228 *
229 * Use the following sequence:
230 *
231 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
232 * - Wait for EC_LPC_CMDR_PENDING bit to clear
233 * - Write address to EC_LPC_ADDR_ACPI_DATA
234 * - Wait for EC_LPC_CMDR_PENDING bit to clear
235 * - Write value to EC_LPC_ADDR_ACPI_DATA
236 */
237#define EC_CMD_ACPI_WRITE 0x0081
238
239/*
240 * ACPI Burst Enable Embedded Controller
241 *
242 * This enables burst mode on the EC to allow the host to issue several
243 * commands back-to-back. While in this mode, writes to mapped multi-byte
244 * data are locked out to ensure data consistency.
245 */
246#define EC_CMD_ACPI_BURST_ENABLE 0x0082
247
248/*
249 * ACPI Burst Disable Embedded Controller
250 *
251 * This disables burst mode on the EC and stops preventing EC writes to mapped
252 * multi-byte data.
253 */
254#define EC_CMD_ACPI_BURST_DISABLE 0x0083
255
256/*
257 * ACPI Query Embedded Controller
258 *
259 * This clears the lowest-order bit in the currently pending host events, and
260 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
261 * event 0x80000000 = 32), or 0 if no event was pending.
262 */
263#define EC_CMD_ACPI_QUERY_EVENT 0x0084
264
265/* Valid addresses in ACPI memory space, for read/write commands */
266
267/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
268#define EC_ACPI_MEM_VERSION 0x00
269/*
270 * Test location; writing value here updates test compliment byte to (0xff -
271 * value).
272 */
273#define EC_ACPI_MEM_TEST 0x01
274/* Test compliment; writes here are ignored. */
275#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
276
277/* Keyboard backlight brightness percent (0 - 100) */
278#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
279/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
280#define EC_ACPI_MEM_FAN_DUTY 0x04
281
282/*
283 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
284 * independent thresholds attached to them. The current value of the ID
285 * register determines which sensor is affected by the THRESHOLD and COMMIT
286 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
287 * as the memory-mapped sensors. The COMMIT register applies those settings.
288 *
289 * The spec does not mandate any way to read back the threshold settings
290 * themselves, but when a threshold is crossed the AP needs a way to determine
291 * which sensor(s) are responsible. Each reading of the ID register clears and
292 * returns one sensor ID that has crossed one of its threshold (in either
293 * direction) since the last read. A value of 0xFF means "no new thresholds
294 * have tripped". Setting or enabling the thresholds for a sensor will clear
295 * the unread event count for that sensor.
296 */
297#define EC_ACPI_MEM_TEMP_ID 0x05
298#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
299#define EC_ACPI_MEM_TEMP_COMMIT 0x07
300/*
301 * Here are the bits for the COMMIT register:
302 * bit 0 selects the threshold index for the chosen sensor (0/1)
303 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
304 * Each write to the commit register affects one threshold.
305 */
306#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
307#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
308/*
309 * Example:
310 *
311 * Set the thresholds for sensor 2 to 50 C and 60 C:
312 * write 2 to [0x05] -- select temp sensor 2
313 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
314 * write 0x2 to [0x07] -- enable threshold 0 with this value
315 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
316 * write 0x3 to [0x07] -- enable threshold 1 with this value
317 *
318 * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
319 * write 2 to [0x05] -- select temp sensor 2
320 * write 0x1 to [0x07] -- disable threshold 1
321 */
322
323/* DPTF battery charging current limit */
324#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
325
326/* Charging limit is specified in 64 mA steps */
327#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
328/* Value to disable DPTF battery charging limit */
329#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
330
331/*
332 * Report device orientation
333 * bit 0 device is tablet mode
334 */
335#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
336#define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01
337
338/*
339 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
340 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
341 */
342#define EC_ACPI_MEM_MAPPED_BEGIN 0x20
343#define EC_ACPI_MEM_MAPPED_SIZE 0xe0
344
345/* Current version of ACPI memory address space */
346#define EC_ACPI_MEM_VERSION_CURRENT 2
347
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348
349/*
350 * This header file is used in coreboot both in C and ACPI code. The ACPI code
351 * is pre-processed to handle constants but the ASL compiler is unable to
352 * handle actual C code so keep it separate.
353 */
354#ifndef __ACPI__
355
356/*
357 * Define __packed if someone hasn't beat us to it. Linux kernel style
358 * checking prefers __packed over __attribute__((packed)).
359 */
360#ifndef __packed
361#define __packed __attribute__((packed))
362#endif
363
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364#ifndef __aligned
365#define __aligned(x) __attribute__((aligned(x)))
366#endif
367
368/*
369 * Attributes for EC request and response packets. Just defining __packed
370 * results in inefficient assembly code on ARM, if the structure is actually
371 * 32-bit aligned, as it should be for all buffers.
372 *
373 * Be very careful when adding these to existing structures. They will round
374 * up the structure size to the specified boundary.
375 *
376 * Also be very careful to make that if a structure is included in some other
377 * parent structure that the alignment will still be true given the packing of
378 * the parent structure. This is particularly important if the sub-structure
379 * will be passed as a pointer to another function, since that function will
380 * not know about the misaligment caused by the parent structure's packing.
381 *
382 * Also be very careful using __packed - particularly when nesting non-packed
383 * structures inside packed ones. In fact, DO NOT use __packed directly;
384 * always use one of these attributes.
385 *
386 * Once everything is annotated properly, the following search strings should
387 * not return ANY matches in this file other than right here:
388 *
389 * "__packed" - generates inefficient code; all sub-structs must also be packed
390 *
391 * "struct [^_]" - all structs should be annotated, except for structs that are
392 * members of other structs/unions (and their original declarations should be
393 * annotated).
394 */
395#ifdef CONFIG_HOSTCMD_ALIGNED
396
397/*
398 * Packed structures where offset and size are always aligned to 1, 2, or 4
399 * byte boundary.
400 */
401#define __ec_align1 __packed
402#define __ec_align2 __packed __aligned(2)
403#define __ec_align4 __packed __aligned(4)
404
405/*
406 * Packed structure which must be under-aligned, because its size is not a
407 * 4-byte multiple. This is sub-optimal because it forces byte-wise access
408 * of all multi-byte fields in it, even though they are themselves aligned.
409 *
410 * In theory, we could duplicate the structure with __aligned(4) for accessing
411 * its members, but use the __packed version for sizeof().
412 */
413#define __ec_align_size1 __packed
414
415/*
416 * Packed structure which must be under-aligned, because its offset inside a
417 * parent structure is not a 4-byte multiple.
418 */
419#define __ec_align_offset1 __packed
420#define __ec_align_offset2 __packed __aligned(2)
421
422/*
423 * Structures which are complicated enough that I'm skipping them on the first
424 * pass. They are effectively unchanged from their previous definitions.
425 *
426 * TODO(rspangler): Figure out what to do with these. It's likely necessary
427 * to work out the size and offset of each member and add explicit padding to
428 * maintain those.
429 */
430#define __ec_todo_packed __packed
431#define __ec_todo_unpacked
432
433#else /* !CONFIG_HOSTCMD_ALIGNED */
434
435/*
436 * Packed structures make no assumption about alignment, so they do inefficient
437 * byte-wise reads.
438 */
439#define __ec_align1 __packed
440#define __ec_align2 __packed
441#define __ec_align4 __packed
442#define __ec_align_size1 __packed
443#define __ec_align_offset1 __packed
444#define __ec_align_offset2 __packed
445#define __ec_todo_packed __packed
446#define __ec_todo_unpacked
447
448#endif /* !CONFIG_HOSTCMD_ALIGNED */
449
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450/* LPC command status byte masks */
451/* EC has written a byte in the data register and host hasn't read it yet */
452#define EC_LPC_STATUS_TO_HOST 0x01
453/* Host has written a command/data byte and the EC hasn't read it yet */
454#define EC_LPC_STATUS_FROM_HOST 0x02
455/* EC is processing a command */
456#define EC_LPC_STATUS_PROCESSING 0x04
457/* Last write to EC was a command, not data */
458#define EC_LPC_STATUS_LAST_CMD 0x08
6f1c0430 459/* EC is in burst mode */
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460#define EC_LPC_STATUS_BURST_MODE 0x10
461/* SCI event is pending (requesting SCI query) */
462#define EC_LPC_STATUS_SCI_PENDING 0x20
463/* SMI event is pending (requesting SMI query) */
464#define EC_LPC_STATUS_SMI_PENDING 0x40
465/* (reserved) */
466#define EC_LPC_STATUS_RESERVED 0x80
467
468/*
469 * EC is busy. This covers both the EC processing a command, and the host has
470 * written a new command but the EC hasn't picked it up yet.
471 */
472#define EC_LPC_STATUS_BUSY_MASK \
473 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
474
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475/* Host command response codes (16-bit). Note that response codes should be
476 * stored in a uint16_t rather than directly in a value of this type.
477 */
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478enum ec_status {
479 EC_RES_SUCCESS = 0,
480 EC_RES_INVALID_COMMAND = 1,
481 EC_RES_ERROR = 2,
482 EC_RES_INVALID_PARAM = 3,
483 EC_RES_ACCESS_DENIED = 4,
484 EC_RES_INVALID_RESPONSE = 5,
485 EC_RES_INVALID_VERSION = 6,
486 EC_RES_INVALID_CHECKSUM = 7,
487 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */
488 EC_RES_UNAVAILABLE = 9, /* No response available */
489 EC_RES_TIMEOUT = 10, /* We got a timeout */
490 EC_RES_OVERFLOW = 11, /* Table / data overflow */
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491 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
492 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
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493 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */
494 EC_RES_BUS_ERROR = 15, /* Communications bus error */
495 EC_RES_BUSY = 16 /* Up but too busy. Should retry */
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496};
497
498/*
499 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
500 * EC command uses code 0 to mean "no event pending". We explicitly specify
501 * each value in the enum listing so they won't change if we delete/insert an
502 * item or rearrange the list (it needs to be stable across platforms, not
503 * just within a single compiled instance).
504 */
505enum host_event_code {
506 EC_HOST_EVENT_LID_CLOSED = 1,
507 EC_HOST_EVENT_LID_OPEN = 2,
508 EC_HOST_EVENT_POWER_BUTTON = 3,
509 EC_HOST_EVENT_AC_CONNECTED = 4,
510 EC_HOST_EVENT_AC_DISCONNECTED = 5,
511 EC_HOST_EVENT_BATTERY_LOW = 6,
512 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
513 EC_HOST_EVENT_BATTERY = 8,
514 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
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515 /* Event generated by a device attached to the EC */
516 EC_HOST_EVENT_DEVICE = 10,
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517 EC_HOST_EVENT_THERMAL = 11,
518 EC_HOST_EVENT_USB_CHARGER = 12,
519 EC_HOST_EVENT_KEY_PRESSED = 13,
520 /*
521 * EC has finished initializing the host interface. The host can check
522 * for this event following sending a EC_CMD_REBOOT_EC command to
523 * determine when the EC is ready to accept subsequent commands.
524 */
525 EC_HOST_EVENT_INTERFACE_READY = 14,
526 /* Keyboard recovery combo has been pressed */
527 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
528
529 /* Shutdown due to thermal overload */
530 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
531 /* Shutdown due to battery level too low */
532 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
533
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534 /* Suggest that the AP throttle itself */
535 EC_HOST_EVENT_THROTTLE_START = 18,
536 /* Suggest that the AP resume normal speed */
537 EC_HOST_EVENT_THROTTLE_STOP = 19,
538
539 /* Hang detect logic detected a hang and host event timeout expired */
540 EC_HOST_EVENT_HANG_DETECT = 20,
541 /* Hang detect logic detected a hang and warm rebooted the AP */
542 EC_HOST_EVENT_HANG_REBOOT = 21,
543
544 /* PD MCU triggering host event */
545 EC_HOST_EVENT_PD_MCU = 22,
546
547 /* Battery Status flags have changed */
548 EC_HOST_EVENT_BATTERY_STATUS = 23,
549
550 /* EC encountered a panic, triggering a reset */
551 EC_HOST_EVENT_PANIC = 24,
552
553 /* Keyboard fastboot combo has been pressed */
554 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
555
556 /* EC RTC event occurred */
557 EC_HOST_EVENT_RTC = 26,
558
559 /* Emulate MKBP event */
560 EC_HOST_EVENT_MKBP = 27,
561
562 /* EC desires to change state of host-controlled USB mux */
563 EC_HOST_EVENT_USB_MUX = 28,
564
565 /* TABLET/LAPTOP mode event*/
566 EC_HOST_EVENT_MODE_CHANGE = 29,
567
568 /* Keyboard recovery combo with hardware reinitialization */
569 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
570
571 /*
572 * Reserve this last bit to indicate that at least one bit in a
573 * secondary host event word is set. See crbug.com/633646.
574 */
575 EC_HOST_EVENT_EXTENDED = 31,
576
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577 /*
578 * The high bit of the event mask is not used as a host event code. If
579 * it reads back as set, then the entire event mask should be
580 * considered invalid by the host. This can happen when reading the
581 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
582 * not initialized on the EC, or improperly configured on the host.
583 */
584 EC_HOST_EVENT_INVALID = 32
585};
586/* Host event mask */
6f1c0430 587#define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1))
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588
589/* Arguments at EC_LPC_ADDR_HOST_ARGS */
6f1c0430 590struct __ec_align4 ec_lpc_host_args {
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591 uint8_t flags;
592 uint8_t command_version;
593 uint8_t data_size;
594 /*
595 * Checksum; sum of command + flags + command_version + data_size +
596 * all params/response data bytes.
597 */
598 uint8_t checksum;
6f1c0430 599};
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HT
600
601/* Flags for ec_lpc_host_args.flags */
602/*
603 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
604 * params.
605 *
606 * If EC gets a command and this flag is not set, this is an old-style command.
607 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
608 * unknown length. EC must respond with an old-style response (that is,
6f1c0430 609 * without setting EC_HOST_ARGS_FLAG_TO_HOST).
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610 */
611#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
612/*
613 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
614 *
615 * If EC responds to a command and this flag is not set, this is an old-style
616 * response. Command version is 0 and response data from EC is at
617 * EC_LPC_ADDR_OLD_PARAM with unknown length.
618 */
619#define EC_HOST_ARGS_FLAG_TO_HOST 0x02
620
6f1c0430
SG
621/*****************************************************************************/
622/*
623 * Byte codes returned by EC over SPI interface.
624 *
625 * These can be used by the AP to debug the EC interface, and to determine
626 * when the EC is not in a state where it will ever get around to responding
627 * to the AP.
628 *
629 * Example of sequence of bytes read from EC for a current good transfer:
630 * 1. - - AP asserts chip select (CS#)
631 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
632 * 3. - - EC starts handling CS# interrupt
633 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
634 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
635 * bytes looking for EC_SPI_FRAME_START
636 * 6. - - EC finishes processing and sets up response
637 * 7. EC_SPI_FRAME_START - AP reads frame byte
638 * 8. (response packet) - AP reads response packet
639 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
640 * 10 - - AP deasserts chip select
641 * 11 - - EC processes CS# interrupt and sets up DMA for
642 * next request
643 *
644 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
645 * the following byte values:
646 * EC_SPI_OLD_READY
647 * EC_SPI_RX_READY
648 * EC_SPI_RECEIVING
649 * EC_SPI_PROCESSING
650 *
651 * Then the EC found an error in the request, or was not ready for the request
652 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
653 * because the EC is unable to tell when the AP is done sending its request.
654 */
655
656/*
657 * Framing byte which precedes a response packet from the EC. After sending a
658 * request, the AP will clock in bytes until it sees the framing byte, then
659 * clock in the response packet.
660 */
661#define EC_SPI_FRAME_START 0xec
662
663/*
664 * Padding bytes which are clocked out after the end of a response packet.
665 */
666#define EC_SPI_PAST_END 0xed
667
668/*
669 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
670 * that the AP will send a valid packet header (starting with
671 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
672 */
673#define EC_SPI_RX_READY 0xf8
674
675/*
676 * EC has started receiving the request from the AP, but hasn't started
677 * processing it yet.
678 */
679#define EC_SPI_RECEIVING 0xf9
680
681/* EC has received the entire request from the AP and is processing it. */
682#define EC_SPI_PROCESSING 0xfa
683
684/*
685 * EC received bad data from the AP, such as a packet header with an invalid
686 * length. EC will ignore all data until chip select deasserts.
687 */
688#define EC_SPI_RX_BAD_DATA 0xfb
689
690/*
691 * EC received data from the AP before it was ready. That is, the AP asserted
692 * chip select and started clocking data before the EC was ready to receive it.
693 * EC will ignore all data until chip select deasserts.
694 */
695#define EC_SPI_NOT_READY 0xfc
696
697/*
698 * EC was ready to receive a request from the AP. EC has treated the byte sent
699 * by the AP as part of a request packet, or (for old-style ECs) is processing
700 * a fully received packet but is not ready to respond yet.
701 */
702#define EC_SPI_OLD_READY 0xfd
703
836bb6e8
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704/*****************************************************************************/
705
706/*
707 * Protocol version 2 for I2C and SPI send a request this way:
708 *
709 * 0 EC_CMD_VERSION0 + (command version)
710 * 1 Command number
711 * 2 Length of params = N
712 * 3..N+2 Params, if any
713 * N+3 8-bit checksum of bytes 0..N+2
714 *
715 * The corresponding response is:
716 *
717 * 0 Result code (EC_RES_*)
718 * 1 Length of params = M
719 * 2..M+1 Params, if any
720 * M+2 8-bit checksum of bytes 0..M+1
721 */
722#define EC_PROTO2_REQUEST_HEADER_BYTES 3
723#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
724#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
725 EC_PROTO2_REQUEST_TRAILER_BYTES)
726
727#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
728#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
729#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
730 EC_PROTO2_RESPONSE_TRAILER_BYTES)
731
732/* Parameter length was limited by the LPC interface */
733#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
734
735/* Maximum request and response packet sizes for protocol version 2 */
736#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
737 EC_PROTO2_MAX_PARAM_SIZE)
738#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
739 EC_PROTO2_MAX_PARAM_SIZE)
740
741/*****************************************************************************/
742
743/*
744 * Value written to legacy command port / prefix byte to indicate protocol
745 * 3+ structs are being used. Usage is bus-dependent.
746 */
747#define EC_COMMAND_PROTOCOL_3 0xda
748
749#define EC_HOST_REQUEST_VERSION 3
750
751/* Version 3 request from host */
6f1c0430
SG
752struct __ec_align4 ec_host_request {
753 /* Structure version (=3)
836bb6e8
SG
754 *
755 * EC will return EC_RES_INVALID_HEADER if it receives a header with a
756 * version it doesn't know how to parse.
757 */
758 uint8_t struct_version;
759
760 /*
761 * Checksum of request and data; sum of all bytes including checksum
762 * should total to 0.
763 */
764 uint8_t checksum;
765
766 /* Command code */
767 uint16_t command;
768
769 /* Command version */
770 uint8_t command_version;
771
772 /* Unused byte in current protocol version; set to 0 */
773 uint8_t reserved;
774
775 /* Length of data which follows this header */
776 uint16_t data_len;
6f1c0430 777};
836bb6e8
SG
778
779#define EC_HOST_RESPONSE_VERSION 3
780
781/* Version 3 response from EC */
6f1c0430
SG
782struct __ec_align4 ec_host_response {
783 /* Structure version (=3) */
836bb6e8
SG
784 uint8_t struct_version;
785
786 /*
787 * Checksum of response and data; sum of all bytes including checksum
788 * should total to 0.
789 */
790 uint8_t checksum;
791
792 /* Result code (EC_RES_*) */
793 uint16_t result;
794
795 /* Length of data which follows this header */
796 uint16_t data_len;
797
798 /* Unused bytes in current protocol version; set to 0 */
799 uint16_t reserved;
6f1c0430 800};
836bb6e8
SG
801
802/*****************************************************************************/
88364387
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803/*
804 * Notes on commands:
805 *
6f1c0430
SG
806 * Each command is an 16-bit command value. Commands which take params or
807 * return response data specify structures for that data. If no structure is
88364387
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808 * specified, the command does not input or output data, respectively.
809 * Parameter/response length is implicit in the structs. Some underlying
810 * communication protocols (I2C, SPI) may add length or checksum headers, but
811 * those are implementation-dependent and not defined here.
6f1c0430
SG
812 *
813 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
814 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
88364387
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815 */
816
817/*****************************************************************************/
818/* General / test commands */
819
820/*
821 * Get protocol version, used to deal with non-backward compatible protocol
822 * changes.
823 */
6f1c0430 824#define EC_CMD_PROTO_VERSION 0x0000
88364387 825
6f1c0430 826struct __ec_align4 ec_response_proto_version {
88364387 827 uint32_t version;
6f1c0430 828};
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HT
829
830/*
831 * Hello. This is a simple command to test the EC is responsive to
832 * commands.
833 */
6f1c0430 834#define EC_CMD_HELLO 0x0001
88364387 835
6f1c0430 836struct __ec_align4 ec_params_hello {
88364387 837 uint32_t in_data; /* Pass anything here */
6f1c0430 838};
88364387 839
6f1c0430 840struct __ec_align4 ec_response_hello {
88364387 841 uint32_t out_data; /* Output will be in_data + 0x01020304 */
6f1c0430 842};
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HT
843
844/* Get version number */
6f1c0430 845#define EC_CMD_GET_VERSION 0x0002
88364387
HT
846
847enum ec_current_image {
848 EC_IMAGE_UNKNOWN = 0,
849 EC_IMAGE_RO,
850 EC_IMAGE_RW
851};
852
6f1c0430 853struct __ec_align4 ec_response_get_version {
88364387
HT
854 /* Null-terminated version strings for RO, RW */
855 char version_string_ro[32];
856 char version_string_rw[32];
857 char reserved[32]; /* Was previously RW-B string */
858 uint32_t current_image; /* One of ec_current_image */
6f1c0430 859};
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860
861/* Read test */
6f1c0430 862#define EC_CMD_READ_TEST 0x0003
88364387 863
6f1c0430 864struct __ec_align4 ec_params_read_test {
88364387
HT
865 uint32_t offset; /* Starting value for read buffer */
866 uint32_t size; /* Size to read in bytes */
6f1c0430 867};
88364387 868
6f1c0430 869struct __ec_align4 ec_response_read_test {
88364387 870 uint32_t data[32];
6f1c0430 871};
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HT
872
873/*
874 * Get build information
875 *
876 * Response is null-terminated string.
877 */
6f1c0430 878#define EC_CMD_GET_BUILD_INFO 0x0004
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HT
879
880/* Get chip info */
6f1c0430 881#define EC_CMD_GET_CHIP_INFO 0x0005
88364387 882
6f1c0430 883struct __ec_align4 ec_response_get_chip_info {
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HT
884 /* Null-terminated strings */
885 char vendor[32];
886 char name[32];
887 char revision[32]; /* Mask version */
6f1c0430 888};
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HT
889
890/* Get board HW version */
6f1c0430 891#define EC_CMD_GET_BOARD_VERSION 0x0006
88364387 892
6f1c0430 893struct __ec_align2 ec_response_board_version {
88364387 894 uint16_t board_version; /* A monotonously incrementing number. */
6f1c0430 895};
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896
897/*
898 * Read memory-mapped data.
899 *
900 * This is an alternate interface to memory-mapped data for bus protocols
901 * which don't support direct-mapped memory - I2C, SPI, etc.
902 *
903 * Response is params.size bytes of data.
904 */
6f1c0430 905#define EC_CMD_READ_MEMMAP 0x0007
88364387 906
6f1c0430 907struct __ec_align1 ec_params_read_memmap {
88364387
HT
908 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */
909 uint8_t size; /* Size to read in bytes */
6f1c0430 910};
88364387
HT
911
912/* Read versions supported for a command */
6f1c0430 913#define EC_CMD_GET_CMD_VERSIONS 0x0008
88364387 914
6f1c0430 915struct __ec_align1 ec_params_get_cmd_versions {
88364387 916 uint8_t cmd; /* Command to check */
6f1c0430
SG
917};
918
919struct __ec_align2 ec_params_get_cmd_versions_v1 {
920 uint16_t cmd; /* Command to check */
921};
88364387 922
6f1c0430 923struct __ec_align4 ec_response_get_cmd_versions {
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HT
924 /*
925 * Mask of supported versions; use EC_VER_MASK() to compare with a
926 * desired version.
927 */
928 uint32_t version_mask;
6f1c0430 929};
88364387
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930
931/*
6f1c0430 932 * Check EC communications status (busy). This is needed on i2c/spi but not
88364387
HT
933 * on lpc since it has its own out-of-band busy indicator.
934 *
935 * lpc must read the status from the command register. Attempting this on
936 * lpc will overwrite the args/parameter space and corrupt its data.
937 */
6f1c0430 938#define EC_CMD_GET_COMMS_STATUS 0x0009
88364387
HT
939
940/* Avoid using ec_status which is for return values */
941enum ec_comms_status {
942 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */
943};
944
6f1c0430 945struct __ec_align4 ec_response_get_comms_status {
88364387 946 uint32_t flags; /* Mask of enum ec_comms_status */
6f1c0430 947};
88364387 948
6f1c0430
SG
949/* Fake a variety of responses, purely for testing purposes. */
950#define EC_CMD_TEST_PROTOCOL 0x000A
836bb6e8
SG
951
952/* Tell the EC what to send back to us. */
6f1c0430 953struct __ec_align4 ec_params_test_protocol {
836bb6e8
SG
954 uint32_t ec_result;
955 uint32_t ret_len;
956 uint8_t buf[32];
6f1c0430 957};
836bb6e8
SG
958
959/* Here it comes... */
6f1c0430 960struct __ec_align4 ec_response_test_protocol {
836bb6e8 961 uint8_t buf[32];
6f1c0430 962};
836bb6e8 963
6f1c0430
SG
964/* Get protocol information */
965#define EC_CMD_GET_PROTOCOL_INFO 0x000B
836bb6e8
SG
966
967/* Flags for ec_response_get_protocol_info.flags */
968/* EC_RES_IN_PROGRESS may be returned if a command is slow */
969#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
970
6f1c0430 971struct __ec_align4 ec_response_get_protocol_info {
836bb6e8
SG
972 /* Fields which exist if at least protocol version 3 supported */
973
974 /* Bitmask of protocol versions supported (1 << n means version n)*/
975 uint32_t protocol_versions;
976
977 /* Maximum request packet size, in bytes */
978 uint16_t max_request_packet_size;
979
980 /* Maximum response packet size, in bytes */
981 uint16_t max_response_packet_size;
982
983 /* Flags; see EC_PROTOCOL_INFO_* */
984 uint32_t flags;
6f1c0430
SG
985};
986
987
988/*****************************************************************************/
989/* Get/Set miscellaneous values */
990
991/* The upper byte of .flags tells what to do (nothing means "get") */
992#define EC_GSV_SET 0x80000000
993
994/* The lower three bytes of .flags identifies the parameter, if that has
995 meaning for an individual command. */
996#define EC_GSV_PARAM_MASK 0x00ffffff
997
998struct __ec_align4 ec_params_get_set_value {
999 uint32_t flags;
1000 uint32_t value;
1001};
1002
1003struct __ec_align4 ec_response_get_set_value {
1004 uint32_t flags;
1005 uint32_t value;
1006};
1007
1008/* More than one command can use these structs to get/set parameters. */
1009#define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1010
1011/*****************************************************************************/
1012/* List the features supported by the firmware */
1013#define EC_CMD_GET_FEATURES 0x000D
1014
1015/* Supported features */
1016enum ec_feature_code {
1017 /*
1018 * This image contains a limited set of features. Another image
1019 * in RW partition may support more features.
1020 */
1021 EC_FEATURE_LIMITED = 0,
1022 /*
1023 * Commands for probing/reading/writing/erasing the flash in the
1024 * EC are present.
1025 */
1026 EC_FEATURE_FLASH = 1,
1027 /*
1028 * Can control the fan speed directly.
1029 */
1030 EC_FEATURE_PWM_FAN = 2,
1031 /*
1032 * Can control the intensity of the keyboard backlight.
1033 */
1034 EC_FEATURE_PWM_KEYB = 3,
1035 /*
1036 * Support Google lightbar, introduced on Pixel.
1037 */
1038 EC_FEATURE_LIGHTBAR = 4,
1039 /* Control of LEDs */
1040 EC_FEATURE_LED = 5,
1041 /* Exposes an interface to control gyro and sensors.
1042 * The host goes through the EC to access these sensors.
1043 * In addition, the EC may provide composite sensors, like lid angle.
1044 */
1045 EC_FEATURE_MOTION_SENSE = 6,
1046 /* The keyboard is controlled by the EC */
1047 EC_FEATURE_KEYB = 7,
1048 /* The AP can use part of the EC flash as persistent storage. */
1049 EC_FEATURE_PSTORE = 8,
1050 /* The EC monitors BIOS port 80h, and can return POST codes. */
1051 EC_FEATURE_PORT80 = 9,
1052 /*
1053 * Thermal management: include TMP specific commands.
1054 * Higher level than direct fan control.
1055 */
1056 EC_FEATURE_THERMAL = 10,
1057 /* Can switch the screen backlight on/off */
1058 EC_FEATURE_BKLIGHT_SWITCH = 11,
1059 /* Can switch the wifi module on/off */
1060 EC_FEATURE_WIFI_SWITCH = 12,
1061 /* Monitor host events, through for example SMI or SCI */
1062 EC_FEATURE_HOST_EVENTS = 13,
1063 /* The EC exposes GPIO commands to control/monitor connected devices. */
1064 EC_FEATURE_GPIO = 14,
1065 /* The EC can send i2c messages to downstream devices. */
1066 EC_FEATURE_I2C = 15,
1067 /* Command to control charger are included */
1068 EC_FEATURE_CHARGER = 16,
1069 /* Simple battery support. */
1070 EC_FEATURE_BATTERY = 17,
1071 /*
1072 * Support Smart battery protocol
1073 * (Common Smart Battery System Interface Specification)
1074 */
1075 EC_FEATURE_SMART_BATTERY = 18,
1076 /* EC can detect when the host hangs. */
1077 EC_FEATURE_HANG_DETECT = 19,
1078 /* Report power information, for pit only */
1079 EC_FEATURE_PMU = 20,
1080 /* Another Cros EC device is present downstream of this one */
1081 EC_FEATURE_SUB_MCU = 21,
1082 /* Support USB Power delivery (PD) commands */
1083 EC_FEATURE_USB_PD = 22,
1084 /* Control USB multiplexer, for audio through USB port for instance. */
1085 EC_FEATURE_USB_MUX = 23,
1086 /* Motion Sensor code has an internal software FIFO */
1087 EC_FEATURE_MOTION_SENSE_FIFO = 24,
1088 /* Support temporary secure vstore */
1089 EC_FEATURE_VSTORE = 25,
1090 /* EC decides on USB-C SS mux state, muxes configured by host */
1091 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1092 /* EC has RTC feature that can be controlled by host commands */
1093 EC_FEATURE_RTC = 27,
1094 /* The MCU exposes a Fingerprint sensor */
1095 EC_FEATURE_FINGERPRINT = 28,
1096 /* The MCU exposes a Touchpad */
1097 EC_FEATURE_TOUCHPAD = 29,
1098 /* The MCU has RWSIG task enabled */
1099 EC_FEATURE_RWSIG = 30,
1100 /* EC has device events support */
1101 EC_FEATURE_DEVICE_EVENT = 31,
1102 /* EC supports the unified wake masks for LPC/eSPI systems */
1103 EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1104};
1105
1106#define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32))
1107#define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32))
1108struct __ec_align4 ec_response_get_features {
1109 uint32_t flags[2];
1110};
1111
1112/*****************************************************************************/
1113/* Get the board's SKU ID from EC */
1114#define EC_CMD_GET_SKU_ID 0x000E
1115
1116/* Set SKU ID from AP */
1117#define EC_CMD_SET_SKU_ID 0x000F
1118
1119struct __ec_align4 ec_sku_id_info {
1120 uint32_t sku_id;
1121};
88364387
HT
1122
1123/*****************************************************************************/
1124/* Flash commands */
1125
1126/* Get flash info */
6f1c0430
SG
1127#define EC_CMD_FLASH_INFO 0x0010
1128#define EC_VER_FLASH_INFO 2
88364387 1129
6f1c0430
SG
1130/* Version 0 returns these fields */
1131struct __ec_align4 ec_response_flash_info {
88364387
HT
1132 /* Usable flash size, in bytes */
1133 uint32_t flash_size;
1134 /*
1135 * Write block size. Write offset and size must be a multiple
1136 * of this.
1137 */
1138 uint32_t write_block_size;
1139 /*
1140 * Erase block size. Erase offset and size must be a multiple
1141 * of this.
1142 */
1143 uint32_t erase_block_size;
1144 /*
1145 * Protection block size. Protection offset and size must be a
1146 * multiple of this.
1147 */
1148 uint32_t protect_block_size;
6f1c0430
SG
1149};
1150
1151/* Flags for version 1+ flash info command */
1152/* EC flash erases bits to 0 instead of 1 */
1153#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
1154
1155/* Flash must be selected for read/write/erase operations to succeed. This may
1156 * be necessary on a chip where write/erase can be corrupted by other board
1157 * activity, or where the chip needs to enable some sort of programming voltage,
1158 * or where the read/write/erase operations require cleanly suspending other
1159 * chip functionality. */
1160#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1)
88364387
HT
1161
1162/*
6f1c0430
SG
1163 * Version 1 returns the same initial fields as version 0, with additional
1164 * fields following.
88364387 1165 *
6f1c0430
SG
1166 * gcc anonymous structs don't seem to get along with the __packed directive;
1167 * if they did we'd define the version 0 structure as a sub-structure of this
1168 * one.
1169 *
1170 * Version 2 supports flash banks of different sizes:
1171 * The caller specified the number of banks it has preallocated
1172 * (num_banks_desc)
1173 * The EC returns the number of banks describing the flash memory.
1174 * It adds banks descriptions up to num_banks_desc.
88364387 1175 */
6f1c0430
SG
1176struct __ec_align4 ec_response_flash_info_1 {
1177 /* Version 0 fields; see above for description */
1178 uint32_t flash_size;
1179 uint32_t write_block_size;
1180 uint32_t erase_block_size;
1181 uint32_t protect_block_size;
88364387 1182
6f1c0430
SG
1183 /* Version 1 adds these fields: */
1184 /*
1185 * Ideal write size in bytes. Writes will be fastest if size is
1186 * exactly this and offset is a multiple of this. For example, an EC
1187 * may have a write buffer which can do half-page operations if data is
1188 * aligned, and a slower word-at-a-time write mode.
1189 */
1190 uint32_t write_ideal_size;
88364387 1191
6f1c0430
SG
1192 /* Flags; see EC_FLASH_INFO_* */
1193 uint32_t flags;
1194};
836bb6e8 1195
6f1c0430
SG
1196struct __ec_align4 ec_params_flash_info_2 {
1197 /* Number of banks to describe */
1198 uint16_t num_banks_desc;
1199 /* Reserved; set 0; ignore on read */
1200 uint8_t reserved[2];
1201};
1202
1203struct ec_flash_bank {
1204 /* Number of sector is in this bank. */
1205 uint16_t count;
1206 /* Size in power of 2 of each sector (8 --> 256 bytes) */
1207 uint8_t size_exp;
1208 /* Minimal write size for the sectors in this bank */
1209 uint8_t write_size_exp;
1210 /* Erase size for the sectors in this bank */
1211 uint8_t erase_size_exp;
1212 /* Size for write protection, usually identical to erase size. */
1213 uint8_t protect_size_exp;
1214 /* Reserved; set 0; ignore on read */
1215 uint8_t reserved[2];
1216};
1217
1218struct __ec_align4 ec_response_flash_info_2 {
1219 /* Total flash in the EC. */
1220 uint32_t flash_size;
1221 /* Flags; see EC_FLASH_INFO_* */
1222 uint32_t flags;
1223 /* Maximum size to use to send data to write to the EC. */
1224 uint32_t write_ideal_size;
1225 /* Number of banks present in the EC. */
1226 uint16_t num_banks_total;
1227 /* Number of banks described in banks array. */
1228 uint16_t num_banks_desc;
1229 struct ec_flash_bank banks[0];
1230};
1231
1232/*
1233 * Read flash
1234 *
1235 * Response is params.size bytes of data.
1236 */
1237#define EC_CMD_FLASH_READ 0x0011
1238
1239struct __ec_align4 ec_params_flash_read {
1240 uint32_t offset; /* Byte offset to read */
1241 uint32_t size; /* Size to read in bytes */
1242};
1243
1244/* Write flash */
1245#define EC_CMD_FLASH_WRITE 0x0012
1246#define EC_VER_FLASH_WRITE 1
1247
1248/* Version 0 of the flash command supported only 64 bytes of data */
836bb6e8 1249#define EC_FLASH_WRITE_VER0_SIZE 64
88364387 1250
6f1c0430 1251struct __ec_align4 ec_params_flash_write {
88364387
HT
1252 uint32_t offset; /* Byte offset to write */
1253 uint32_t size; /* Size to write in bytes */
836bb6e8 1254 /* Followed by data to write */
6f1c0430 1255};
88364387
HT
1256
1257/* Erase flash */
6f1c0430 1258#define EC_CMD_FLASH_ERASE 0x0013
88364387 1259
6f1c0430
SG
1260/* v0 */
1261struct __ec_align4 ec_params_flash_erase {
88364387
HT
1262 uint32_t offset; /* Byte offset to erase */
1263 uint32_t size; /* Size to erase in bytes */
6f1c0430
SG
1264};
1265
1266
1267#define EC_VER_FLASH_WRITE 1
1268/* v1 add async erase:
1269 * subcommands can returns:
1270 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1271 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1272 * EC_RES_ERROR : other errors.
1273 * EC_RES_BUSY : an existing erase operation is in progress.
1274 * EC_RES_ACCESS_DENIED: Trying to erase running image.
1275 *
1276 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1277 * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1278 * the proper result.
1279 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1280 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1281 * ERASE_GET_RESULT command may timeout on EC where flash access is not
1282 * permitted while erasing. (For instance, STM32F4).
1283 */
1284enum ec_flash_erase_cmd {
1285 FLASH_ERASE_SECTOR, /* Erase and wait for result */
1286 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */
1287 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */
1288};
1289
1290struct __ec_align4 ec_params_flash_erase_v1 {
1291 /* One of ec_flash_erase_cmd. */
1292 uint8_t cmd;
1293 /* Pad byte; currently always contains 0 */
1294 uint8_t reserved;
1295 /* No flags defined yet; set to 0 */
1296 uint16_t flag;
1297 /* Same as v0 parameters. */
1298 struct ec_params_flash_erase params;
1299};
88364387
HT
1300
1301/*
1302 * Get/set flash protection.
1303 *
1304 * If mask!=0, sets/clear the requested bits of flags. Depending on the
1305 * firmware write protect GPIO, not all flags will take effect immediately;
1306 * some flags require a subsequent hard reset to take effect. Check the
1307 * returned flags bits to see what actually happened.
1308 *
1309 * If mask=0, simply returns the current flags state.
1310 */
6f1c0430 1311#define EC_CMD_FLASH_PROTECT 0x0015
88364387
HT
1312#define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
1313
1314/* Flags for flash protection */
1315/* RO flash code protected when the EC boots */
1316#define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0)
1317/*
1318 * RO flash code protected now. If this bit is set, at-boot status cannot
1319 * be changed.
1320 */
1321#define EC_FLASH_PROTECT_RO_NOW (1 << 1)
1322/* Entire flash code protected now, until reboot. */
1323#define EC_FLASH_PROTECT_ALL_NOW (1 << 2)
1324/* Flash write protect GPIO is asserted now */
1325#define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3)
1326/* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1327#define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4)
1328/*
1329 * Error - flash protection is in inconsistent state. At least one bank of
1330 * flash which should be protected is not protected. Usually fixed by
1331 * re-requesting the desired flags, or by a hard reset if that fails.
1332 */
1333#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
6f1c0430 1334/* Entire flash code protected when the EC boots */
88364387 1335#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)
6f1c0430
SG
1336/* RW flash code protected when the EC boots */
1337#define EC_FLASH_PROTECT_RW_AT_BOOT (1 << 7)
1338/* RW flash code protected now. */
1339#define EC_FLASH_PROTECT_RW_NOW (1 << 8)
1340/* Rollback information flash region protected when the EC boots */
1341#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT (1 << 9)
1342/* Rollback information flash region protected now */
1343#define EC_FLASH_PROTECT_ROLLBACK_NOW (1 << 10)
1344
1345struct __ec_align4 ec_params_flash_protect {
88364387
HT
1346 uint32_t mask; /* Bits in flags to apply */
1347 uint32_t flags; /* New flags to apply */
6f1c0430 1348};
88364387 1349
6f1c0430 1350struct __ec_align4 ec_response_flash_protect {
88364387
HT
1351 /* Current value of flash protect flags */
1352 uint32_t flags;
1353 /*
1354 * Flags which are valid on this platform. This allows the caller
1355 * to distinguish between flags which aren't set vs. flags which can't
1356 * be set on this platform.
1357 */
1358 uint32_t valid_flags;
1359 /* Flags which can be changed given the current protection state */
1360 uint32_t writable_flags;
6f1c0430 1361};
88364387
HT
1362
1363/*
1364 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1365 * write protect. These commands may be reused with version > 0.
1366 */
1367
1368/* Get the region offset/size */
6f1c0430 1369#define EC_CMD_FLASH_REGION_INFO 0x0016
88364387
HT
1370#define EC_VER_FLASH_REGION_INFO 1
1371
1372enum ec_flash_region {
1373 /* Region which holds read-only EC image */
cecb19c0 1374 EC_FLASH_REGION_RO = 0,
6f1c0430
SG
1375 /* Region which holds active rewritable EC image */
1376 EC_FLASH_REGION_ACTIVE,
88364387
HT
1377 /*
1378 * Region which should be write-protected in the factory (a superset of
1379 * EC_FLASH_REGION_RO)
1380 */
1381 EC_FLASH_REGION_WP_RO,
6f1c0430
SG
1382 /* Region which holds updatable image */
1383 EC_FLASH_REGION_UPDATE,
cecb19c0
SG
1384 /* Number of regions */
1385 EC_FLASH_REGION_COUNT,
88364387
HT
1386};
1387
6f1c0430 1388struct __ec_align4 ec_params_flash_region_info {
88364387 1389 uint32_t region; /* enum ec_flash_region */
6f1c0430 1390};
88364387 1391
6f1c0430 1392struct __ec_align4 ec_response_flash_region_info {
88364387
HT
1393 uint32_t offset;
1394 uint32_t size;
6f1c0430 1395};
88364387
HT
1396
1397/* Read/write VbNvContext */
6f1c0430 1398#define EC_CMD_VBNV_CONTEXT 0x0017
88364387
HT
1399#define EC_VER_VBNV_CONTEXT 1
1400#define EC_VBNV_BLOCK_SIZE 16
6f1c0430 1401#define EC_VBNV_BLOCK_SIZE_V2 64
88364387
HT
1402
1403enum ec_vbnvcontext_op {
1404 EC_VBNV_CONTEXT_OP_READ,
1405 EC_VBNV_CONTEXT_OP_WRITE,
1406};
1407
6f1c0430 1408struct __ec_align4 ec_params_vbnvcontext {
88364387 1409 uint32_t op;
6f1c0430
SG
1410 uint8_t block[EC_VBNV_BLOCK_SIZE_V2];
1411};
1412
1413struct __ec_align4 ec_response_vbnvcontext {
1414 uint8_t block[EC_VBNV_BLOCK_SIZE_V2];
1415};
1416
1417
1418/* Get SPI flash information */
1419#define EC_CMD_FLASH_SPI_INFO 0x0018
1420
1421struct __ec_align1 ec_response_flash_spi_info {
1422 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1423 uint8_t jedec[3];
1424
1425 /* Pad byte; currently always contains 0 */
1426 uint8_t reserved0;
1427
1428 /* Manufacturer / device ID from command 0x90 */
1429 uint8_t mfr_dev_id[2];
1430
1431 /* Status registers from command 0x05 and 0x35 */
1432 uint8_t sr1, sr2;
1433};
1434
88364387 1435
6f1c0430
SG
1436/* Select flash during flash operations */
1437#define EC_CMD_FLASH_SELECT 0x0019
1438
1439struct __ec_align4 ec_params_flash_select {
1440 /* 1 to select flash, 0 to deselect flash */
1441 uint8_t select;
1442};
88364387
HT
1443
1444/*****************************************************************************/
1445/* PWM commands */
1446
1447/* Get fan target RPM */
6f1c0430 1448#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
88364387 1449
6f1c0430 1450struct __ec_align4 ec_response_pwm_get_fan_rpm {
88364387 1451 uint32_t rpm;
6f1c0430 1452};
88364387
HT
1453
1454/* Set target fan RPM */
6f1c0430
SG
1455#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1456
1457/* Version 0 of input params */
1458struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 {
1459 uint32_t rpm;
1460};
88364387 1461
6f1c0430
SG
1462/* Version 1 of input params */
1463struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 {
88364387 1464 uint32_t rpm;
6f1c0430
SG
1465 uint8_t fan_idx;
1466};
88364387
HT
1467
1468/* Get keyboard backlight */
6f1c0430
SG
1469/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1470#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
88364387 1471
6f1c0430 1472struct __ec_align1 ec_response_pwm_get_keyboard_backlight {
88364387
HT
1473 uint8_t percent;
1474 uint8_t enabled;
6f1c0430 1475};
88364387
HT
1476
1477/* Set keyboard backlight */
6f1c0430
SG
1478/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1479#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
88364387 1480
6f1c0430 1481struct __ec_align1 ec_params_pwm_set_keyboard_backlight {
88364387 1482 uint8_t percent;
6f1c0430 1483};
88364387
HT
1484
1485/* Set target fan PWM duty cycle */
6f1c0430
SG
1486#define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1487
1488/* Version 0 of input params */
1489struct __ec_align4 ec_params_pwm_set_fan_duty_v0 {
1490 uint32_t percent;
1491};
88364387 1492
6f1c0430
SG
1493/* Version 1 of input params */
1494struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 {
88364387 1495 uint32_t percent;
6f1c0430
SG
1496 uint8_t fan_idx;
1497};
1498
1499#define EC_CMD_PWM_SET_DUTY 0x0025
1500/* 16 bit duty cycle, 0xffff = 100% */
1501#define EC_PWM_MAX_DUTY 0xffff
1502
1503enum ec_pwm_type {
1504 /* All types, indexed by board-specific enum pwm_channel */
1505 EC_PWM_TYPE_GENERIC = 0,
1506 /* Keyboard backlight */
1507 EC_PWM_TYPE_KB_LIGHT,
1508 /* Display backlight */
1509 EC_PWM_TYPE_DISPLAY_LIGHT,
1510 EC_PWM_TYPE_COUNT,
1511};
1512
1513struct __ec_align4 ec_params_pwm_set_duty {
1514 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1515 uint8_t pwm_type; /* ec_pwm_type */
1516 uint8_t index; /* Type-specific index, or 0 if unique */
1517};
1518
1519#define EC_CMD_PWM_GET_DUTY 0x0026
1520
1521struct __ec_align1 ec_params_pwm_get_duty {
1522 uint8_t pwm_type; /* ec_pwm_type */
1523 uint8_t index; /* Type-specific index, or 0 if unique */
1524};
1525
1526struct __ec_align2 ec_response_pwm_get_duty {
1527 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1528};
88364387
HT
1529
1530/*****************************************************************************/
1531/*
1532 * Lightbar commands. This looks worse than it is. Since we only use one HOST
1533 * command to say "talk to the lightbar", we put the "and tell it to do X" part
1534 * into a subcommand. We'll make separate structs for subcommands with
1535 * different input args, so that we know how much to expect.
1536 */
6f1c0430 1537#define EC_CMD_LIGHTBAR_CMD 0x0028
88364387 1538
6f1c0430 1539struct __ec_todo_unpacked rgb_s {
88364387
HT
1540 uint8_t r, g, b;
1541};
1542
1543#define LB_BATTERY_LEVELS 4
1544/* List of tweakable parameters. NOTE: It's __packed so it can be sent in a
1545 * host command, but the alignment is the same regardless. Keep it that way.
1546 */
6f1c0430 1547struct __ec_todo_packed lightbar_params_v0 {
88364387 1548 /* Timing */
6f1c0430
SG
1549 int32_t google_ramp_up;
1550 int32_t google_ramp_down;
1551 int32_t s3s0_ramp_up;
1552 int32_t s0_tick_delay[2]; /* AC=0/1 */
1553 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1554 int32_t s0s3_ramp_down;
1555 int32_t s3_sleep_for;
1556 int32_t s3_ramp_up;
1557 int32_t s3_ramp_down;
88364387
HT
1558
1559 /* Oscillation */
1560 uint8_t new_s0;
1561 uint8_t osc_min[2]; /* AC=0/1 */
1562 uint8_t osc_max[2]; /* AC=0/1 */
1563 uint8_t w_ofs[2]; /* AC=0/1 */
1564
1565 /* Brightness limits based on the backlight and AC. */
1566 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1567 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1568 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1569
1570 /* Battery level thresholds */
1571 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1572
1573 /* Map [AC][battery_level] to color index */
1574 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1575 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1576
1577 /* Color palette */
1578 struct rgb_s color[8]; /* 0-3 are Google colors */
6f1c0430
SG
1579};
1580
1581struct __ec_todo_packed lightbar_params_v1 {
1582 /* Timing */
1583 int32_t google_ramp_up;
1584 int32_t google_ramp_down;
1585 int32_t s3s0_ramp_up;
1586 int32_t s0_tick_delay[2]; /* AC=0/1 */
1587 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1588 int32_t s0s3_ramp_down;
1589 int32_t s3_sleep_for;
1590 int32_t s3_ramp_up;
1591 int32_t s3_ramp_down;
1592 int32_t s5_ramp_up;
1593 int32_t s5_ramp_down;
1594 int32_t tap_tick_delay;
1595 int32_t tap_gate_delay;
1596 int32_t tap_display_time;
1597
1598 /* Tap-for-battery params */
1599 uint8_t tap_pct_red;
1600 uint8_t tap_pct_green;
1601 uint8_t tap_seg_min_on;
1602 uint8_t tap_seg_max_on;
1603 uint8_t tap_seg_osc;
1604 uint8_t tap_idx[3];
1605
1606 /* Oscillation */
1607 uint8_t osc_min[2]; /* AC=0/1 */
1608 uint8_t osc_max[2]; /* AC=0/1 */
1609 uint8_t w_ofs[2]; /* AC=0/1 */
1610
1611 /* Brightness limits based on the backlight and AC. */
1612 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1613 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1614 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1615
1616 /* Battery level thresholds */
1617 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1618
1619 /* Map [AC][battery_level] to color index */
1620 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1621 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1622
1623 /* s5: single color pulse on inhibited power-up */
1624 uint8_t s5_idx;
1625
1626 /* Color palette */
1627 struct rgb_s color[8]; /* 0-3 are Google colors */
1628};
1629
1630/* Lightbar command params v2
1631 * crbug.com/467716
1632 *
1633 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
1634 * logical groups to make it more manageable ( < 120 bytes).
1635 *
1636 * NOTE: Each of these groups must be less than 120 bytes.
1637 */
1638
1639struct __ec_todo_packed lightbar_params_v2_timing {
1640 /* Timing */
1641 int32_t google_ramp_up;
1642 int32_t google_ramp_down;
1643 int32_t s3s0_ramp_up;
1644 int32_t s0_tick_delay[2]; /* AC=0/1 */
1645 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1646 int32_t s0s3_ramp_down;
1647 int32_t s3_sleep_for;
1648 int32_t s3_ramp_up;
1649 int32_t s3_ramp_down;
1650 int32_t s5_ramp_up;
1651 int32_t s5_ramp_down;
1652 int32_t tap_tick_delay;
1653 int32_t tap_gate_delay;
1654 int32_t tap_display_time;
1655};
1656
1657struct __ec_todo_packed lightbar_params_v2_tap {
1658 /* Tap-for-battery params */
1659 uint8_t tap_pct_red;
1660 uint8_t tap_pct_green;
1661 uint8_t tap_seg_min_on;
1662 uint8_t tap_seg_max_on;
1663 uint8_t tap_seg_osc;
1664 uint8_t tap_idx[3];
1665};
1666
1667struct __ec_todo_packed lightbar_params_v2_oscillation {
1668 /* Oscillation */
1669 uint8_t osc_min[2]; /* AC=0/1 */
1670 uint8_t osc_max[2]; /* AC=0/1 */
1671 uint8_t w_ofs[2]; /* AC=0/1 */
1672};
1673
1674struct __ec_todo_packed lightbar_params_v2_brightness {
1675 /* Brightness limits based on the backlight and AC. */
1676 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1677 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1678 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1679};
1680
1681struct __ec_todo_packed lightbar_params_v2_thresholds {
1682 /* Battery level thresholds */
1683 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1684};
1685
1686struct __ec_todo_packed lightbar_params_v2_colors {
1687 /* Map [AC][battery_level] to color index */
1688 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1689 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1690
1691 /* s5: single color pulse on inhibited power-up */
1692 uint8_t s5_idx;
1693
1694 /* Color palette */
1695 struct rgb_s color[8]; /* 0-3 are Google colors */
1696};
1697
1698/* Lightbyte program. */
1699#define EC_LB_PROG_LEN 192
1700struct __ec_todo_unpacked lightbar_program {
1701 uint8_t size;
1702 uint8_t data[EC_LB_PROG_LEN];
1703};
88364387 1704
6f1c0430 1705struct __ec_todo_packed ec_params_lightbar {
88364387
HT
1706 uint8_t cmd; /* Command (see enum lightbar_command) */
1707 union {
6f1c0430 1708 struct __ec_todo_unpacked {
88364387 1709 /* no args */
6f1c0430
SG
1710 } dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1711 version, get_brightness, get_demo, suspend, resume,
1712 get_params_v2_timing, get_params_v2_tap,
1713 get_params_v2_osc, get_params_v2_bright,
1714 get_params_v2_thlds, get_params_v2_colors;
88364387 1715
6f1c0430 1716 struct __ec_todo_unpacked {
88364387 1717 uint8_t num;
6f1c0430 1718 } set_brightness, seq, demo;
88364387 1719
6f1c0430 1720 struct __ec_todo_unpacked {
88364387
HT
1721 uint8_t ctrl, reg, value;
1722 } reg;
1723
6f1c0430 1724 struct __ec_todo_unpacked {
88364387 1725 uint8_t led, red, green, blue;
6f1c0430
SG
1726 } set_rgb;
1727
1728 struct __ec_todo_unpacked {
1729 uint8_t led;
1730 } get_rgb;
88364387 1731
6f1c0430
SG
1732 struct __ec_todo_unpacked {
1733 uint8_t enable;
1734 } manual_suspend_ctrl;
1735
1736 struct lightbar_params_v0 set_params_v0;
1737 struct lightbar_params_v1 set_params_v1;
1738
1739 struct lightbar_params_v2_timing set_v2par_timing;
1740 struct lightbar_params_v2_tap set_v2par_tap;
1741 struct lightbar_params_v2_oscillation set_v2par_osc;
1742 struct lightbar_params_v2_brightness set_v2par_bright;
1743 struct lightbar_params_v2_thresholds set_v2par_thlds;
1744 struct lightbar_params_v2_colors set_v2par_colors;
1745
1746 struct lightbar_program set_program;
88364387 1747 };
6f1c0430 1748};
88364387 1749
6f1c0430 1750struct __ec_todo_packed ec_response_lightbar {
88364387 1751 union {
6f1c0430
SG
1752 struct __ec_todo_unpacked {
1753 struct __ec_todo_unpacked {
88364387
HT
1754 uint8_t reg;
1755 uint8_t ic0;
1756 uint8_t ic1;
1757 } vals[23];
1758 } dump;
1759
6f1c0430 1760 struct __ec_todo_unpacked {
88364387 1761 uint8_t num;
6f1c0430 1762 } get_seq, get_brightness, get_demo;
88364387 1763
6f1c0430
SG
1764 struct lightbar_params_v0 get_params_v0;
1765 struct lightbar_params_v1 get_params_v1;
88364387 1766
6f1c0430
SG
1767
1768 struct lightbar_params_v2_timing get_params_v2_timing;
1769 struct lightbar_params_v2_tap get_params_v2_tap;
1770 struct lightbar_params_v2_oscillation get_params_v2_osc;
1771 struct lightbar_params_v2_brightness get_params_v2_bright;
1772 struct lightbar_params_v2_thresholds get_params_v2_thlds;
1773 struct lightbar_params_v2_colors get_params_v2_colors;
1774
1775 struct __ec_todo_unpacked {
1776 uint32_t num;
1777 uint32_t flags;
1778 } version;
1779
1780 struct __ec_todo_unpacked {
1781 uint8_t red, green, blue;
1782 } get_rgb;
1783
1784 struct __ec_todo_unpacked {
88364387 1785 /* no return params */
6f1c0430
SG
1786 } off, on, init, set_brightness, seq, reg, set_rgb,
1787 demo, set_params_v0, set_params_v1,
1788 set_program, manual_suspend_ctrl, suspend, resume,
1789 set_v2par_timing, set_v2par_tap,
1790 set_v2par_osc, set_v2par_bright, set_v2par_thlds,
1791 set_v2par_colors;
88364387 1792 };
6f1c0430 1793};
88364387
HT
1794
1795/* Lightbar commands */
1796enum lightbar_command {
1797 LIGHTBAR_CMD_DUMP = 0,
1798 LIGHTBAR_CMD_OFF = 1,
1799 LIGHTBAR_CMD_ON = 2,
1800 LIGHTBAR_CMD_INIT = 3,
6f1c0430 1801 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
88364387
HT
1802 LIGHTBAR_CMD_SEQ = 5,
1803 LIGHTBAR_CMD_REG = 6,
6f1c0430 1804 LIGHTBAR_CMD_SET_RGB = 7,
88364387
HT
1805 LIGHTBAR_CMD_GET_SEQ = 8,
1806 LIGHTBAR_CMD_DEMO = 9,
6f1c0430
SG
1807 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
1808 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
1809 LIGHTBAR_CMD_VERSION = 12,
1810 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
1811 LIGHTBAR_CMD_GET_RGB = 14,
1812 LIGHTBAR_CMD_GET_DEMO = 15,
1813 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
1814 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
1815 LIGHTBAR_CMD_SET_PROGRAM = 18,
1816 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
1817 LIGHTBAR_CMD_SUSPEND = 20,
1818 LIGHTBAR_CMD_RESUME = 21,
1819 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
1820 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
1821 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
1822 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
1823 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
1824 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
1825 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
1826 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
1827 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
1828 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
1829 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
1830 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
88364387
HT
1831 LIGHTBAR_NUM_CMDS
1832};
1833
836bb6e8
SG
1834/*****************************************************************************/
1835/* LED control commands */
1836
6f1c0430 1837#define EC_CMD_LED_CONTROL 0x0029
836bb6e8
SG
1838
1839enum ec_led_id {
6f1c0430 1840 /* LED to indicate battery state of charge */
836bb6e8 1841 EC_LED_ID_BATTERY_LED = 0,
6f1c0430
SG
1842 /*
1843 * LED to indicate system power state (on or in suspend).
1844 * May be on power button or on C-panel.
1845 */
1846 EC_LED_ID_POWER_LED,
1847 /* LED on power adapter or its plug */
836bb6e8 1848 EC_LED_ID_ADAPTER_LED,
6f1c0430
SG
1849 /* LED to indicate left side */
1850 EC_LED_ID_LEFT_LED,
1851 /* LED to indicate right side */
1852 EC_LED_ID_RIGHT_LED,
1853 /* LED to indicate recovery mode with HW_REINIT */
1854 EC_LED_ID_RECOVERY_HW_REINIT_LED,
1855 /* LED to indicate sysrq debug mode. */
1856 EC_LED_ID_SYSRQ_DEBUG_LED,
1857
1858 EC_LED_ID_COUNT
836bb6e8
SG
1859};
1860
1861/* LED control flags */
1862#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */
1863#define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */
1864
1865enum ec_led_colors {
1866 EC_LED_COLOR_RED = 0,
1867 EC_LED_COLOR_GREEN,
1868 EC_LED_COLOR_BLUE,
1869 EC_LED_COLOR_YELLOW,
1870 EC_LED_COLOR_WHITE,
6f1c0430 1871 EC_LED_COLOR_AMBER,
836bb6e8
SG
1872
1873 EC_LED_COLOR_COUNT
1874};
1875
6f1c0430 1876struct __ec_align1 ec_params_led_control {
836bb6e8
SG
1877 uint8_t led_id; /* Which LED to control */
1878 uint8_t flags; /* Control flags */
1879
1880 uint8_t brightness[EC_LED_COLOR_COUNT];
6f1c0430 1881};
836bb6e8 1882
6f1c0430 1883struct __ec_align1 ec_response_led_control {
836bb6e8
SG
1884 /*
1885 * Available brightness value range.
1886 *
1887 * Range 0 means color channel not present.
1888 * Range 1 means on/off control.
1889 * Other values means the LED is control by PWM.
1890 */
1891 uint8_t brightness_range[EC_LED_COLOR_COUNT];
6f1c0430 1892};
836bb6e8 1893
88364387
HT
1894/*****************************************************************************/
1895/* Verified boot commands */
1896
1897/*
1898 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
1899 * reused for other purposes with version > 0.
1900 */
1901
1902/* Verified boot hash command */
6f1c0430 1903#define EC_CMD_VBOOT_HASH 0x002A
88364387 1904
6f1c0430 1905struct __ec_align4 ec_params_vboot_hash {
88364387
HT
1906 uint8_t cmd; /* enum ec_vboot_hash_cmd */
1907 uint8_t hash_type; /* enum ec_vboot_hash_type */
1908 uint8_t nonce_size; /* Nonce size; may be 0 */
1909 uint8_t reserved0; /* Reserved; set 0 */
1910 uint32_t offset; /* Offset in flash to hash */
1911 uint32_t size; /* Number of bytes to hash */
1912 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */
6f1c0430 1913};
88364387 1914
6f1c0430 1915struct __ec_align4 ec_response_vboot_hash {
88364387
HT
1916 uint8_t status; /* enum ec_vboot_hash_status */
1917 uint8_t hash_type; /* enum ec_vboot_hash_type */
1918 uint8_t digest_size; /* Size of hash digest in bytes */
1919 uint8_t reserved0; /* Ignore; will be 0 */
1920 uint32_t offset; /* Offset in flash which was hashed */
1921 uint32_t size; /* Number of bytes hashed */
1922 uint8_t hash_digest[64]; /* Hash digest data */
6f1c0430 1923};
88364387
HT
1924
1925enum ec_vboot_hash_cmd {
1926 EC_VBOOT_HASH_GET = 0, /* Get current hash status */
1927 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */
1928 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */
1929 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */
1930};
1931
1932enum ec_vboot_hash_type {
1933 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
1934};
1935
1936enum ec_vboot_hash_status {
1937 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
1938 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
1939 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
1940};
1941
1942/*
1943 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
1944 * If one of these is specified, the EC will automatically update offset and
1945 * size to the correct values for the specified image (RO or RW).
1946 */
6f1c0430
SG
1947#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
1948#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
1949#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
88364387
HT
1950
1951/*****************************************************************************/
6f1c0430
SG
1952/*
1953 * Motion sense commands. We'll make separate structs for sub-commands with
1954 * different input args, so that we know how much to expect.
1955 */
1956#define EC_CMD_MOTION_SENSE_CMD 0x002B
88364387 1957
6f1c0430
SG
1958/* Motion sense commands */
1959enum motionsense_command {
1960 /*
1961 * Dump command returns all motion sensor data including motion sense
1962 * module flags and individual sensor flags.
1963 */
1964 MOTIONSENSE_CMD_DUMP = 0,
88364387 1965
6f1c0430
SG
1966 /*
1967 * Info command returns data describing the details of a given sensor,
1968 * including enum motionsensor_type, enum motionsensor_location, and
1969 * enum motionsensor_chip.
1970 */
1971 MOTIONSENSE_CMD_INFO = 1,
88364387 1972
6f1c0430
SG
1973 /*
1974 * EC Rate command is a setter/getter command for the EC sampling rate
1975 * in milliseconds.
1976 * It is per sensor, the EC run sample task at the minimum of all
1977 * sensors EC_RATE.
1978 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
1979 * to collect all the sensor samples.
1980 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
1981 * to process of all motion sensors in milliseconds.
1982 */
1983 MOTIONSENSE_CMD_EC_RATE = 2,
88364387 1984
6f1c0430
SG
1985 /*
1986 * Sensor ODR command is a setter/getter command for the output data
1987 * rate of a specific motion sensor in millihertz.
1988 */
1989 MOTIONSENSE_CMD_SENSOR_ODR = 3,
88364387 1990
6f1c0430
SG
1991 /*
1992 * Sensor range command is a setter/getter command for the range of
1993 * a specified motion sensor in +/-G's or +/- deg/s.
1994 */
1995 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
88364387 1996
6f1c0430
SG
1997 /*
1998 * Setter/getter command for the keyboard wake angle. When the lid
1999 * angle is greater than this value, keyboard wake is disabled in S3,
2000 * and when the lid angle goes less than this value, keyboard wake is
2001 * enabled. Note, the lid angle measurement is an approximate,
2002 * un-calibrated value, hence the wake angle isn't exact.
2003 */
2004 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
88364387 2005
6f1c0430
SG
2006 /*
2007 * Returns a single sensor data.
2008 */
2009 MOTIONSENSE_CMD_DATA = 6,
88364387 2010
6f1c0430
SG
2011 /*
2012 * Return sensor fifo info.
2013 */
2014 MOTIONSENSE_CMD_FIFO_INFO = 7,
88364387 2015
6f1c0430
SG
2016 /*
2017 * Insert a flush element in the fifo and return sensor fifo info.
2018 * The host can use that element to synchronize its operation.
2019 */
2020 MOTIONSENSE_CMD_FIFO_FLUSH = 8,
88364387 2021
6f1c0430
SG
2022 /*
2023 * Return a portion of the fifo.
2024 */
2025 MOTIONSENSE_CMD_FIFO_READ = 9,
88364387 2026
6f1c0430
SG
2027 /*
2028 * Perform low level calibration.
2029 * On sensors that support it, ask to do offset calibration.
2030 */
2031 MOTIONSENSE_CMD_PERFORM_CALIB = 10,
88364387 2032
6f1c0430
SG
2033 /*
2034 * Sensor Offset command is a setter/getter command for the offset
2035 * used for calibration.
2036 * The offsets can be calculated by the host, or via
2037 * PERFORM_CALIB command.
2038 */
2039 MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
88364387 2040
6f1c0430
SG
2041 /*
2042 * List available activities for a MOTION sensor.
2043 * Indicates if they are enabled or disabled.
2044 */
2045 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
88364387 2046
6f1c0430
SG
2047 /*
2048 * Activity management
2049 * Enable/Disable activity recognition.
2050 */
2051 MOTIONSENSE_CMD_SET_ACTIVITY = 13,
88364387 2052
6f1c0430
SG
2053 /*
2054 * Lid Angle
2055 */
2056 MOTIONSENSE_CMD_LID_ANGLE = 14,
88364387 2057
6f1c0430
SG
2058 /*
2059 * Allow the FIFO to trigger interrupt via MKBP events.
2060 * By default the FIFO does not send interrupt to process the FIFO
2061 * until the AP is ready or it is coming from a wakeup sensor.
2062 */
2063 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
88364387 2064
6f1c0430
SG
2065 /*
2066 * Spoof the readings of the sensors. The spoofed readings can be set
2067 * to arbitrary values, or will lock to the last read actual values.
2068 */
2069 MOTIONSENSE_CMD_SPOOF = 16,
88364387 2070
6f1c0430
SG
2071 /* Number of motionsense sub-commands. */
2072 MOTIONSENSE_NUM_CMDS
2073};
88364387 2074
6f1c0430
SG
2075/* List of motion sensor types. */
2076enum motionsensor_type {
2077 MOTIONSENSE_TYPE_ACCEL = 0,
2078 MOTIONSENSE_TYPE_GYRO = 1,
2079 MOTIONSENSE_TYPE_MAG = 2,
2080 MOTIONSENSE_TYPE_PROX = 3,
2081 MOTIONSENSE_TYPE_LIGHT = 4,
2082 MOTIONSENSE_TYPE_ACTIVITY = 5,
2083 MOTIONSENSE_TYPE_BARO = 6,
2084 MOTIONSENSE_TYPE_MAX,
2085};
88364387 2086
6f1c0430
SG
2087/* List of motion sensor locations. */
2088enum motionsensor_location {
2089 MOTIONSENSE_LOC_BASE = 0,
2090 MOTIONSENSE_LOC_LID = 1,
2091 MOTIONSENSE_LOC_MAX,
2092};
88364387 2093
6f1c0430
SG
2094/* List of motion sensor chips. */
2095enum motionsensor_chip {
2096 MOTIONSENSE_CHIP_KXCJ9 = 0,
2097 MOTIONSENSE_CHIP_LSM6DS0 = 1,
2098 MOTIONSENSE_CHIP_BMI160 = 2,
2099 MOTIONSENSE_CHIP_SI1141 = 3,
2100 MOTIONSENSE_CHIP_SI1142 = 4,
2101 MOTIONSENSE_CHIP_SI1143 = 5,
2102 MOTIONSENSE_CHIP_KX022 = 6,
2103 MOTIONSENSE_CHIP_L3GD20H = 7,
2104 MOTIONSENSE_CHIP_BMA255 = 8,
2105 MOTIONSENSE_CHIP_BMP280 = 9,
2106 MOTIONSENSE_CHIP_OPT3001 = 10,
2107};
88364387 2108
6f1c0430
SG
2109struct __ec_todo_packed ec_response_motion_sensor_data {
2110 /* Flags for each sensor. */
2111 uint8_t flags;
2112 /* sensor number the data comes from */
2113 uint8_t sensor_num;
2114 /* Each sensor is up to 3-axis. */
2115 union {
2116 int16_t data[3];
2117 struct __ec_todo_packed {
2118 uint16_t reserved;
2119 uint32_t timestamp;
2120 };
2121 struct __ec_todo_unpacked {
2122 uint8_t activity; /* motionsensor_activity */
2123 uint8_t state;
2124 int16_t add_info[2];
2125 };
2126 };
2127};
88364387 2128
6f1c0430
SG
2129/* Note: used in ec_response_get_next_data */
2130struct __ec_todo_packed ec_response_motion_sense_fifo_info {
2131 /* Size of the fifo */
2132 uint16_t size;
2133 /* Amount of space used in the fifo */
2134 uint16_t count;
2135 /* Timestamp recorded in us */
2136 uint32_t timestamp;
2137 /* Total amount of vector lost */
2138 uint16_t total_lost;
2139 /* Lost events since the last fifo_info, per sensors */
2140 uint16_t lost[0];
2141};
88364387 2142
6f1c0430
SG
2143struct __ec_todo_packed ec_response_motion_sense_fifo_data {
2144 uint32_t number_data;
2145 struct ec_response_motion_sensor_data data[0];
2146};
88364387 2147
6f1c0430
SG
2148/* List supported activity recognition */
2149enum motionsensor_activity {
2150 MOTIONSENSE_ACTIVITY_RESERVED = 0,
2151 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2152 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2153};
88364387 2154
6f1c0430
SG
2155struct __ec_todo_unpacked ec_motion_sense_activity {
2156 uint8_t sensor_num;
2157 uint8_t activity; /* one of enum motionsensor_activity */
2158 uint8_t enable; /* 1: enable, 0: disable */
2159 uint8_t reserved;
2160 uint16_t parameters[3]; /* activity dependent parameters */
2161};
88364387 2162
6f1c0430
SG
2163/* Module flag masks used for the dump sub-command. */
2164#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
88364387 2165
6f1c0430
SG
2166/* Sensor flag masks used for the dump sub-command. */
2167#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
88364387 2168
6f1c0430
SG
2169/*
2170 * Flush entry for synchronization.
2171 * data contains time stamp
2172 */
2173#define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0)
2174#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1)
2175#define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2)
2176#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3)
88364387 2177
6f1c0430
SG
2178/*
2179 * Send this value for the data element to only perform a read. If you
2180 * send any other value, the EC will interpret it as data to set and will
2181 * return the actual value set.
2182 */
2183#define EC_MOTION_SENSE_NO_VALUE -1
88364387 2184
6f1c0430
SG
2185#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2186
2187/* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
2188/* Set Calibration information */
2189#define MOTION_SENSE_SET_OFFSET 1
2190
2191#define LID_ANGLE_UNRELIABLE 500
2192
2193enum motionsense_spoof_mode {
2194 /* Disable spoof mode. */
2195 MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2196
2197 /* Enable spoof mode, but use provided component values. */
2198 MOTIONSENSE_SPOOF_MODE_CUSTOM,
2199
2200 /* Enable spoof mode, but use the current sensor values. */
2201 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2202
2203 /* Query the current spoof mode status for the sensor. */
2204 MOTIONSENSE_SPOOF_MODE_QUERY,
2205};
2206
2207struct __ec_todo_packed ec_params_motion_sense {
2208 uint8_t cmd;
2209 union {
2210 /* Used for MOTIONSENSE_CMD_DUMP */
2211 struct __ec_todo_unpacked {
2212 /*
2213 * Maximal number of sensor the host is expecting.
2214 * 0 means the host is only interested in the number
2215 * of sensors controlled by the EC.
2216 */
2217 uint8_t max_sensor_count;
2218 } dump;
2219
2220 /*
2221 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
2222 */
2223 struct __ec_todo_unpacked {
2224 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
2225 * kb_wake_angle: angle to wakup AP.
2226 */
2227 int16_t data;
2228 } kb_wake_angle;
2229
2230 /* Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
2231 * and MOTIONSENSE_CMD_PERFORM_CALIB. */
2232 struct __ec_todo_unpacked {
2233 uint8_t sensor_num;
2234 } info, info_3, data, fifo_flush, perform_calib,
2235 list_activities;
2236
2237 /*
2238 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
2239 * and MOTIONSENSE_CMD_SENSOR_RANGE.
2240 */
2241 struct __ec_todo_unpacked {
2242 uint8_t sensor_num;
2243
2244 /* Rounding flag, true for round-up, false for down. */
2245 uint8_t roundup;
2246
2247 uint16_t reserved;
2248
2249 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
2250 int32_t data;
2251 } ec_rate, sensor_odr, sensor_range;
2252
2253 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2254 struct __ec_todo_packed {
2255 uint8_t sensor_num;
2256
2257 /*
2258 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2259 * the calibration information in the EC.
2260 * If unset, just retrieve calibration information.
2261 */
2262 uint16_t flags;
2263
2264 /*
2265 * Temperature at calibration, in units of 0.01 C
2266 * 0x8000: invalid / unknown.
2267 * 0x0: 0C
2268 * 0x7fff: +327.67C
2269 */
2270 int16_t temp;
2271
2272 /*
2273 * Offset for calibration.
2274 * Unit:
2275 * Accelerometer: 1/1024 g
2276 * Gyro: 1/1024 deg/s
2277 * Compass: 1/16 uT
2278 */
2279 int16_t offset[3];
2280 } sensor_offset;
2281
2282 /* Used for MOTIONSENSE_CMD_FIFO_INFO */
2283 struct __ec_todo_unpacked {
2284 } fifo_info;
2285
2286 /* Used for MOTIONSENSE_CMD_FIFO_READ */
2287 struct __ec_todo_unpacked {
2288 /*
2289 * Number of expected vector to return.
2290 * EC may return less or 0 if none available.
2291 */
2292 uint32_t max_data_vector;
2293 } fifo_read;
2294
2295 struct ec_motion_sense_activity set_activity;
2296
2297 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
2298 struct __ec_todo_unpacked {
2299 } lid_angle;
2300
2301 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
2302 struct __ec_todo_unpacked {
2303 /*
2304 * 1: enable, 0 disable fifo,
2305 * EC_MOTION_SENSE_NO_VALUE return value.
2306 */
2307 int8_t enable;
2308 } fifo_int_enable;
2309
2310 /* Used for MOTIONSENSE_CMD_SPOOF */
2311 struct __ec_todo_packed {
2312 uint8_t sensor_id;
2313
2314 /* See enum motionsense_spoof_mode. */
2315 uint8_t spoof_enable;
2316
2317 /* Ignored, used for alignment. */
2318 uint8_t reserved;
2319
2320 /* Individual component values to spoof. */
2321 int16_t components[3];
2322 } spoof;
2323 };
2324};
2325
2326struct __ec_todo_packed ec_response_motion_sense {
2327 union {
2328 /* Used for MOTIONSENSE_CMD_DUMP */
2329 struct __ec_todo_unpacked {
2330 /* Flags representing the motion sensor module. */
2331 uint8_t module_flags;
2332
2333 /* Number of sensors managed directly by the EC */
2334 uint8_t sensor_count;
2335
2336 /*
2337 * sensor data is truncated if response_max is too small
2338 * for holding all the data.
2339 */
2340 struct ec_response_motion_sensor_data sensor[0];
2341 } dump;
2342
2343 /* Used for MOTIONSENSE_CMD_INFO. */
2344 struct __ec_todo_unpacked {
2345 /* Should be element of enum motionsensor_type. */
2346 uint8_t type;
2347
2348 /* Should be element of enum motionsensor_location. */
2349 uint8_t location;
2350
2351 /* Should be element of enum motionsensor_chip. */
2352 uint8_t chip;
2353 } info;
2354
2355 /* Used for MOTIONSENSE_CMD_INFO version 3 */
2356 struct __ec_todo_unpacked {
2357 /* Should be element of enum motionsensor_type. */
2358 uint8_t type;
2359
2360 /* Should be element of enum motionsensor_location. */
2361 uint8_t location;
2362
2363 /* Should be element of enum motionsensor_chip. */
2364 uint8_t chip;
2365
2366 /* Minimum sensor sampling frequency */
2367 uint32_t min_frequency;
2368
2369 /* Maximum sensor sampling frequency */
2370 uint32_t max_frequency;
2371
2372 /* Max number of sensor events that could be in fifo */
2373 uint32_t fifo_max_event_count;
2374 } info_3;
2375
2376 /* Used for MOTIONSENSE_CMD_DATA */
2377 struct ec_response_motion_sensor_data data;
2378
2379 /*
2380 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
2381 * MOTIONSENSE_CMD_SENSOR_RANGE,
2382 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
2383 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
2384 * MOTIONSENSE_CMD_SPOOF.
2385 */
2386 struct __ec_todo_unpacked {
2387 /* Current value of the parameter queried. */
2388 int32_t ret;
2389 } ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2390 fifo_int_enable, spoof;
2391
2392 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2393 struct __ec_todo_unpacked {
2394 int16_t temp;
2395 int16_t offset[3];
2396 } sensor_offset, perform_calib;
2397
2398 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2399
2400 struct ec_response_motion_sense_fifo_data fifo_read;
2401
2402 struct __ec_todo_packed {
2403 uint16_t reserved;
2404 uint32_t enabled;
2405 uint32_t disabled;
2406 } list_activities;
2407
2408 struct __ec_todo_unpacked {
2409 } set_activity;
2410
2411 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
2412 struct __ec_todo_unpacked {
2413 /*
2414 * Angle between 0 and 360 degree if available,
2415 * LID_ANGLE_UNRELIABLE otherwise.
2416 */
2417 uint16_t value;
2418 } lid_angle;
2419 };
2420};
2421
2422/*****************************************************************************/
2423/* Force lid open command */
2424
2425/* Make lid event always open */
2426#define EC_CMD_FORCE_LID_OPEN 0x002C
2427
2428struct __ec_align1 ec_params_force_lid_open {
2429 uint8_t enabled;
2430};
2431
2432/*****************************************************************************/
2433/* Configure the behavior of the power button */
2434#define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2435
2436enum ec_config_power_button_flags {
2437 /* Enable/Disable power button pulses for x86 devices */
2438 EC_POWER_BUTTON_ENABLE_PULSE = (1 << 0),
2439};
2440
2441struct __ec_align1 ec_params_config_power_button {
2442 /* See enum ec_config_power_button_flags */
2443 uint8_t flags;
2444};
2445
2446/*****************************************************************************/
2447/* USB charging control commands */
2448
2449/* Set USB port charging mode */
2450#define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2451
2452struct __ec_align1 ec_params_usb_charge_set_mode {
2453 uint8_t usb_port_id;
2454 uint8_t mode;
2455};
2456
2457/*****************************************************************************/
2458/* Persistent storage for host */
2459
2460/* Maximum bytes that can be read/written in a single command */
2461#define EC_PSTORE_SIZE_MAX 64
2462
2463/* Get persistent storage info */
2464#define EC_CMD_PSTORE_INFO 0x0040
2465
2466struct __ec_align4 ec_response_pstore_info {
2467 /* Persistent storage size, in bytes */
2468 uint32_t pstore_size;
2469 /* Access size; read/write offset and size must be a multiple of this */
2470 uint32_t access_size;
2471};
2472
2473/*
2474 * Read persistent storage
2475 *
2476 * Response is params.size bytes of data.
2477 */
2478#define EC_CMD_PSTORE_READ 0x0041
2479
2480struct __ec_align4 ec_params_pstore_read {
2481 uint32_t offset; /* Byte offset to read */
2482 uint32_t size; /* Size to read in bytes */
2483};
2484
2485/* Write persistent storage */
2486#define EC_CMD_PSTORE_WRITE 0x0042
2487
2488struct __ec_align4 ec_params_pstore_write {
2489 uint32_t offset; /* Byte offset to write */
2490 uint32_t size; /* Size to write in bytes */
2491 uint8_t data[EC_PSTORE_SIZE_MAX];
2492};
2493
2494/*****************************************************************************/
2495/* Real-time clock */
2496
2497/* RTC params and response structures */
2498struct __ec_align4 ec_params_rtc {
2499 uint32_t time;
2500};
2501
2502struct __ec_align4 ec_response_rtc {
2503 uint32_t time;
2504};
2505
2506/* These use ec_response_rtc */
2507#define EC_CMD_RTC_GET_VALUE 0x0044
2508#define EC_CMD_RTC_GET_ALARM 0x0045
2509
2510/* These all use ec_params_rtc */
2511#define EC_CMD_RTC_SET_VALUE 0x0046
2512#define EC_CMD_RTC_SET_ALARM 0x0047
2513
2514/* Pass as time param to SET_ALARM to clear the current alarm */
2515#define EC_RTC_ALARM_CLEAR 0
2516
2517/*****************************************************************************/
2518/* Port80 log access */
2519
2520/* Maximum entries that can be read/written in a single command */
2521#define EC_PORT80_SIZE_MAX 32
2522
2523/* Get last port80 code from previous boot */
2524#define EC_CMD_PORT80_LAST_BOOT 0x0048
2525#define EC_CMD_PORT80_READ 0x0048
2526
2527enum ec_port80_subcmd {
2528 EC_PORT80_GET_INFO = 0,
2529 EC_PORT80_READ_BUFFER,
2530};
2531
2532struct __ec_todo_packed ec_params_port80_read {
2533 uint16_t subcmd;
2534 union {
2535 struct __ec_todo_unpacked {
2536 uint32_t offset;
2537 uint32_t num_entries;
2538 } read_buffer;
2539 };
2540};
2541
2542struct __ec_todo_packed ec_response_port80_read {
2543 union {
2544 struct __ec_todo_unpacked {
2545 uint32_t writes;
2546 uint32_t history_size;
2547 uint32_t last_boot;
2548 } get_info;
2549 struct __ec_todo_unpacked {
2550 uint16_t codes[EC_PORT80_SIZE_MAX];
2551 } data;
2552 };
2553};
2554
2555struct __ec_align2 ec_response_port80_last_boot {
2556 uint16_t code;
2557};
2558
2559/*****************************************************************************/
2560/* Temporary secure storage for host verified boot use */
2561
2562/* Number of bytes in a vstore slot */
2563#define EC_VSTORE_SLOT_SIZE 64
2564
2565/* Maximum number of vstore slots */
2566#define EC_VSTORE_SLOT_MAX 32
2567
2568/* Get persistent storage info */
2569#define EC_CMD_VSTORE_INFO 0x0049
2570struct __ec_align_size1 ec_response_vstore_info {
2571 /* Indicates which slots are locked */
2572 uint32_t slot_locked;
2573 /* Total number of slots available */
2574 uint8_t slot_count;
2575};
2576
2577/*
2578 * Read temporary secure storage
2579 *
2580 * Response is EC_VSTORE_SLOT_SIZE bytes of data.
2581 */
2582#define EC_CMD_VSTORE_READ 0x004A
2583
2584struct __ec_align1 ec_params_vstore_read {
2585 uint8_t slot; /* Slot to read from */
2586};
2587
2588struct __ec_align1 ec_response_vstore_read {
2589 uint8_t data[EC_VSTORE_SLOT_SIZE];
2590};
2591
2592/*
2593 * Write temporary secure storage and lock it.
2594 */
2595#define EC_CMD_VSTORE_WRITE 0x004B
2596
2597struct __ec_align1 ec_params_vstore_write {
2598 uint8_t slot; /* Slot to write to */
2599 uint8_t data[EC_VSTORE_SLOT_SIZE];
2600};
2601
2602/*****************************************************************************/
2603/* Thermal engine commands. Note that there are two implementations. We'll
2604 * reuse the command number, but the data and behavior is incompatible.
2605 * Version 0 is what originally shipped on Link.
2606 * Version 1 separates the CPU thermal limits from the fan control.
2607 */
2608
2609#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2610#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2611
2612/* The version 0 structs are opaque. You have to know what they are for
2613 * the get/set commands to make any sense.
2614 */
2615
2616/* Version 0 - set */
2617struct __ec_align2 ec_params_thermal_set_threshold {
2618 uint8_t sensor_type;
2619 uint8_t threshold_id;
2620 uint16_t value;
2621};
2622
2623/* Version 0 - get */
2624struct __ec_align1 ec_params_thermal_get_threshold {
2625 uint8_t sensor_type;
2626 uint8_t threshold_id;
2627};
2628
2629struct __ec_align2 ec_response_thermal_get_threshold {
2630 uint16_t value;
2631};
2632
2633
2634/* The version 1 structs are visible. */
2635enum ec_temp_thresholds {
2636 EC_TEMP_THRESH_WARN = 0,
2637 EC_TEMP_THRESH_HIGH,
2638 EC_TEMP_THRESH_HALT,
2639
2640 EC_TEMP_THRESH_COUNT
2641};
2642
2643/*
2644 * Thermal configuration for one temperature sensor. Temps are in degrees K.
2645 * Zero values will be silently ignored by the thermal task.
2646 *
2647 * Note that this structure is a sub-structure of
2648 * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
2649 */
2650struct __ec_align4 ec_thermal_config {
2651 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
2652 uint32_t temp_fan_off; /* no active cooling needed */
2653 uint32_t temp_fan_max; /* max active cooling needed */
2654};
2655
2656/* Version 1 - get config for one sensor. */
2657struct __ec_align4 ec_params_thermal_get_threshold_v1 {
2658 uint32_t sensor_num;
2659};
2660/* This returns a struct ec_thermal_config */
2661
2662/* Version 1 - set config for one sensor.
2663 * Use read-modify-write for best results! */
2664struct __ec_align4 ec_params_thermal_set_threshold_v1 {
2665 uint32_t sensor_num;
2666 struct ec_thermal_config cfg;
2667};
2668/* This returns no data */
2669
2670/****************************************************************************/
2671
2672/* Toggle automatic fan control */
2673#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
2674
2675/* Version 1 of input params */
2676struct __ec_align1 ec_params_auto_fan_ctrl_v1 {
2677 uint8_t fan_idx;
2678};
2679
2680/* Get/Set TMP006 calibration data */
2681#define EC_CMD_TMP006_GET_CALIBRATION 0x0053
2682#define EC_CMD_TMP006_SET_CALIBRATION 0x0054
2683
2684/*
2685 * The original TMP006 calibration only needed four params, but now we need
2686 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
2687 * the params opaque. The v1 "get" response will include the algorithm number
2688 * and how many params it requires. That way we can change the EC code without
2689 * needing to update this file. We can also use a different algorithm on each
2690 * sensor.
2691 */
2692
2693/* This is the same struct for both v0 and v1. */
2694struct __ec_align1 ec_params_tmp006_get_calibration {
2695 uint8_t index;
2696};
2697
2698/* Version 0 */
2699struct __ec_align4 ec_response_tmp006_get_calibration_v0 {
2700 float s0;
2701 float b0;
2702 float b1;
2703 float b2;
2704};
2705
2706struct __ec_align4 ec_params_tmp006_set_calibration_v0 {
2707 uint8_t index;
2708 uint8_t reserved[3];
2709 float s0;
2710 float b0;
2711 float b1;
2712 float b2;
2713};
2714
2715/* Version 1 */
2716struct __ec_align4 ec_response_tmp006_get_calibration_v1 {
2717 uint8_t algorithm;
2718 uint8_t num_params;
2719 uint8_t reserved[2];
2720 float val[0];
2721};
2722
2723struct __ec_align4 ec_params_tmp006_set_calibration_v1 {
2724 uint8_t index;
2725 uint8_t algorithm;
2726 uint8_t num_params;
2727 uint8_t reserved;
2728 float val[0];
2729};
2730
2731
2732/* Read raw TMP006 data */
2733#define EC_CMD_TMP006_GET_RAW 0x0055
2734
2735struct __ec_align1 ec_params_tmp006_get_raw {
2736 uint8_t index;
2737};
2738
2739struct __ec_align4 ec_response_tmp006_get_raw {
2740 int32_t t; /* In 1/100 K */
2741 int32_t v; /* In nV */
2742};
2743
2744/*****************************************************************************/
2745/* MKBP - Matrix KeyBoard Protocol */
88364387
HT
2746
2747/*
2748 * Read key state
2749 *
836bb6e8 2750 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
88364387 2751 * expected response size.
6f1c0430
SG
2752 *
2753 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish
2754 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
2755 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
88364387 2756 */
6f1c0430
SG
2757#define EC_CMD_MKBP_STATE 0x0060
2758
2759/*
2760 * Provide information about various MKBP things. See enum ec_mkbp_info_type.
2761 */
2762#define EC_CMD_MKBP_INFO 0x0061
2763
2764struct __ec_align_size1 ec_response_mkbp_info {
2765 uint32_t rows;
2766 uint32_t cols;
2767 /* Formerly "switches", which was 0. */
2768 uint8_t reserved;
2769};
2770
2771struct __ec_align1 ec_params_mkbp_info {
2772 uint8_t info_type;
2773 uint8_t event_type;
2774};
2775
2776enum ec_mkbp_info_type {
2777 /*
2778 * Info about the keyboard matrix: number of rows and columns.
2779 *
2780 * Returns struct ec_response_mkbp_info.
2781 */
2782 EC_MKBP_INFO_KBD = 0,
2783
2784 /*
2785 * For buttons and switches, info about which specifically are
2786 * supported. event_type must be set to one of the values in enum
2787 * ec_mkbp_event.
2788 *
2789 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
2790 * bitmask indicating which buttons or switches are present. See the
2791 * bit inidices below.
2792 */
2793 EC_MKBP_INFO_SUPPORTED = 1,
2794
2795 /*
2796 * Instantaneous state of buttons and switches.
2797 *
2798 * event_type must be set to one of the values in enum ec_mkbp_event.
2799 *
2800 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
2801 * indicating the current state of the keyboard matrix.
2802 *
2803 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
2804 * event state.
2805 *
2806 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
2807 * state of supported buttons.
2808 *
2809 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
2810 * state of supported switches.
2811 */
2812 EC_MKBP_INFO_CURRENT = 2,
2813};
2814
2815/* Simulate key press */
2816#define EC_CMD_MKBP_SIMULATE_KEY 0x0062
2817
2818struct __ec_align1 ec_params_mkbp_simulate_key {
2819 uint8_t col;
2820 uint8_t row;
2821 uint8_t pressed;
2822};
2823
2824/* Configure keyboard scanning */
2825#define EC_CMD_MKBP_SET_CONFIG 0x0064
2826#define EC_CMD_MKBP_GET_CONFIG 0x0065
2827
2828/* flags */
2829enum mkbp_config_flags {
2830 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */
2831};
2832
2833enum mkbp_config_valid {
2834 EC_MKBP_VALID_SCAN_PERIOD = 1 << 0,
2835 EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1,
2836 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3,
2837 EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4,
2838 EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5,
2839 EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6,
2840 EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7,
2841};
2842
2843/*
2844 * Configuration for our key scanning algorithm.
2845 *
2846 * Note that this is used as a sub-structure of
2847 * ec_{params/response}_mkbp_get_config.
2848 */
2849struct __ec_align_size1 ec_mkbp_config {
2850 uint32_t valid_mask; /* valid fields */
2851 uint8_t flags; /* some flags (enum mkbp_config_flags) */
2852 uint8_t valid_flags; /* which flags are valid */
2853 uint16_t scan_period_us; /* period between start of scans */
2854 /* revert to interrupt mode after no activity for this long */
2855 uint32_t poll_timeout_us;
2856 /*
2857 * minimum post-scan relax time. Once we finish a scan we check
2858 * the time until we are due to start the next one. If this time is
2859 * shorter this field, we use this instead.
2860 */
2861 uint16_t min_post_scan_delay_us;
2862 /* delay between setting up output and waiting for it to settle */
2863 uint16_t output_settle_us;
2864 uint16_t debounce_down_us; /* time for debounce on key down */
2865 uint16_t debounce_up_us; /* time for debounce on key up */
2866 /* maximum depth to allow for fifo (0 = no keyscan output) */
2867 uint8_t fifo_max_depth;
2868};
2869
2870struct __ec_align_size1 ec_params_mkbp_set_config {
2871 struct ec_mkbp_config config;
2872};
2873
2874struct __ec_align_size1 ec_response_mkbp_get_config {
2875 struct ec_mkbp_config config;
2876};
2877
2878/* Run the key scan emulation */
2879#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
2880
2881enum ec_keyscan_seq_cmd {
2882 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */
2883 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */
2884 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */
2885 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */
2886 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */
2887};
2888
2889enum ec_collect_flags {
2890 /*
2891 * Indicates this scan was processed by the EC. Due to timing, some
2892 * scans may be skipped.
2893 */
2894 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0,
2895};
2896
2897struct __ec_align1 ec_collect_item {
2898 uint8_t flags; /* some flags (enum ec_collect_flags) */
2899};
2900
2901struct __ec_todo_packed ec_params_keyscan_seq_ctrl {
2902 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */
2903 union {
2904 struct __ec_align1 {
2905 uint8_t active; /* still active */
2906 uint8_t num_items; /* number of items */
2907 /* Current item being presented */
2908 uint8_t cur_item;
2909 } status;
2910 struct __ec_todo_unpacked {
2911 /*
2912 * Absolute time for this scan, measured from the
2913 * start of the sequence.
2914 */
2915 uint32_t time_us;
2916 uint8_t scan[0]; /* keyscan data */
2917 } add;
2918 struct __ec_align1 {
2919 uint8_t start_item; /* First item to return */
2920 uint8_t num_items; /* Number of items to return */
2921 } collect;
2922 };
2923};
2924
2925struct __ec_todo_packed ec_result_keyscan_seq_ctrl {
2926 union {
2927 struct __ec_todo_unpacked {
2928 uint8_t num_items; /* Number of items */
2929 /* Data for each item */
2930 struct ec_collect_item item[0];
2931 } collect;
2932 };
2933};
2934
2935/*
2936 * Get the next pending MKBP event.
2937 *
2938 * Returns EC_RES_UNAVAILABLE if there is no event pending.
2939 */
2940#define EC_CMD_GET_NEXT_EVENT 0x0067
2941
2942enum ec_mkbp_event {
2943 /* Keyboard matrix changed. The event data is the new matrix state. */
2944 EC_MKBP_EVENT_KEY_MATRIX = 0,
2945
2946 /* New host event. The event data is 4 bytes of host event flags. */
2947 EC_MKBP_EVENT_HOST_EVENT = 1,
2948
2949 /* New Sensor FIFO data. The event data is fifo_info structure. */
2950 EC_MKBP_EVENT_SENSOR_FIFO = 2,
2951
2952 /* The state of the non-matrixed buttons have changed. */
2953 EC_MKBP_EVENT_BUTTON = 3,
2954
2955 /* The state of the switches have changed. */
2956 EC_MKBP_EVENT_SWITCH = 4,
2957
2958 /* New Fingerprint sensor event, the event data is fp_events bitmap. */
2959 EC_MKBP_EVENT_FINGERPRINT = 5,
2960
2961 /*
2962 * Sysrq event: send emulated sysrq. The event data is sysrq,
2963 * corresponding to the key to be pressed.
2964 */
2965 EC_MKBP_EVENT_SYSRQ = 6,
2966
2967 /* Number of MKBP events */
2968 EC_MKBP_EVENT_COUNT,
2969};
2970
2971union __ec_align_offset1 ec_response_get_next_data {
2972 uint8_t key_matrix[13];
2973
2974 /* Unaligned */
2975 uint32_t host_event;
2976
2977 struct __ec_todo_unpacked {
2978 /* For aligning the fifo_info */
2979 uint8_t reserved[3];
2980 struct ec_response_motion_sense_fifo_info info;
2981 } sensor_fifo;
2982
2983 uint32_t buttons;
2984
2985 uint32_t switches;
2986
2987 uint32_t fp_events;
2988
2989 uint32_t sysrq;
2990};
2991
2992struct __ec_align1 ec_response_get_next_event {
2993 uint8_t event_type;
2994 /* Followed by event data if any */
2995 union ec_response_get_next_data data;
2996};
2997
2998/* Bit indices for buttons and switches.*/
2999/* Buttons */
3000#define EC_MKBP_POWER_BUTTON 0
3001#define EC_MKBP_VOL_UP 1
3002#define EC_MKBP_VOL_DOWN 2
3003#define EC_MKBP_RECOVERY 3
3004
3005/* Switches */
3006#define EC_MKBP_LID_OPEN 0
3007#define EC_MKBP_TABLET_MODE 1
3008
3009/* Run keyboard factory test scanning */
3010#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3011
3012struct __ec_align2 ec_response_keyboard_factory_test {
3013 uint16_t shorted; /* Keyboard pins are shorted */
3014};
3015
3016/* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
3017#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3018#define EC_MKBP_FP_FINGER_DOWN (1 << 29)
3019#define EC_MKBP_FP_FINGER_UP (1 << 30)
3020#define EC_MKBP_FP_IMAGE_READY (1 << 31)
3021
3022/*****************************************************************************/
3023/* Temperature sensor commands */
3024
3025/* Read temperature sensor info */
3026#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3027
3028struct __ec_align1 ec_params_temp_sensor_get_info {
3029 uint8_t id;
3030};
3031
3032struct __ec_align1 ec_response_temp_sensor_get_info {
3033 char sensor_name[32];
3034 uint8_t sensor_type;
3035};
3036
3037/*****************************************************************************/
3038
3039/*
3040 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3041 * commands accidentally sent to the wrong interface. See the ACPI section
3042 * below.
3043 */
3044
3045/*****************************************************************************/
3046/* Host event commands */
3047
3048
3049/* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */
3050/*
3051 * Host event mask params and response structures, shared by all of the host
3052 * event commands below.
3053 */
3054struct __ec_align4 ec_params_host_event_mask {
3055 uint32_t mask;
3056};
3057
3058struct __ec_align4 ec_response_host_event_mask {
3059 uint32_t mask;
3060};
3061
3062/* These all use ec_response_host_event_mask */
3063#define EC_CMD_HOST_EVENT_GET_B 0x0087
3064#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
3065#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
3066#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3067
3068/* These all use ec_params_host_event_mask */
3069#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
3070#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
3071#define EC_CMD_HOST_EVENT_CLEAR 0x008C
3072#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3073#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
3074
3075/*
3076 * Unified host event programming interface - Should be used by newer versions
3077 * of BIOS/OS to program host events and masks
3078 */
3079
3080struct __ec_align4 ec_params_host_event {
3081
3082 /* Action requested by host - one of enum ec_host_event_action. */
3083 uint8_t action;
3084
3085 /*
3086 * Mask type that the host requested the action on - one of
3087 * enum ec_host_event_mask_type.
3088 */
3089 uint8_t mask_type;
3090
3091 /* Set to 0, ignore on read */
3092 uint16_t reserved;
3093
3094 /* Value to be used in case of set operations. */
3095 uint64_t value;
3096};
3097
3098/*
3099 * Response structure returned by EC_CMD_HOST_EVENT.
3100 * Update the value on a GET request. Set to 0 on GET/CLEAR
3101 */
3102
3103struct __ec_align4 ec_response_host_event {
3104
3105 /* Mask value in case of get operation */
3106 uint64_t value;
3107};
3108
3109enum ec_host_event_action {
3110 /*
3111 * params.value is ignored. Value of mask_type populated
3112 * in response.value
3113 */
3114 EC_HOST_EVENT_GET,
3115
3116 /* Bits in params.value are set */
3117 EC_HOST_EVENT_SET,
3118
3119 /* Bits in params.value are cleared */
3120 EC_HOST_EVENT_CLEAR,
3121};
3122
3123enum ec_host_event_mask_type {
3124
3125 /* Main host event copy */
3126 EC_HOST_EVENT_MAIN,
3127
3128 /* Copy B of host events */
3129 EC_HOST_EVENT_B,
3130
3131 /* SCI Mask */
3132 EC_HOST_EVENT_SCI_MASK,
3133
3134 /* SMI Mask */
3135 EC_HOST_EVENT_SMI_MASK,
3136
3137 /* Mask of events that should be always reported in hostevents */
3138 EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3139
3140 /* Active wake mask */
3141 EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3142
3143 /* Lazy wake mask for S0ix */
3144 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3145
3146 /* Lazy wake mask for S3 */
3147 EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3148
3149 /* Lazy wake mask for S5 */
3150 EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3151};
3152
3153#define EC_CMD_HOST_EVENT 0x00A4
3154
3155/*****************************************************************************/
3156/* Switch commands */
3157
3158/* Enable/disable LCD backlight */
3159#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3160
3161struct __ec_align1 ec_params_switch_enable_backlight {
3162 uint8_t enabled;
3163};
3164
3165/* Enable/disable WLAN/Bluetooth */
3166#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3167#define EC_VER_SWITCH_ENABLE_WIRELESS 1
3168
3169/* Version 0 params; no response */
3170struct __ec_align1 ec_params_switch_enable_wireless_v0 {
3171 uint8_t enabled;
3172};
3173
3174/* Version 1 params */
3175struct __ec_align1 ec_params_switch_enable_wireless_v1 {
3176 /* Flags to enable now */
3177 uint8_t now_flags;
3178
3179 /* Which flags to copy from now_flags */
3180 uint8_t now_mask;
3181
3182 /*
3183 * Flags to leave enabled in S3, if they're on at the S0->S3
3184 * transition. (Other flags will be disabled by the S0->S3
3185 * transition.)
3186 */
3187 uint8_t suspend_flags;
3188
3189 /* Which flags to copy from suspend_flags */
3190 uint8_t suspend_mask;
3191};
3192
3193/* Version 1 response */
3194struct __ec_align1 ec_response_switch_enable_wireless_v1 {
3195 /* Flags to enable now */
3196 uint8_t now_flags;
3197
3198 /* Flags to leave enabled in S3 */
3199 uint8_t suspend_flags;
3200};
3201
3202/*****************************************************************************/
3203/* GPIO commands. Only available on EC if write protect has been disabled. */
3204
3205/* Set GPIO output value */
3206#define EC_CMD_GPIO_SET 0x0092
3207
3208struct __ec_align1 ec_params_gpio_set {
3209 char name[32];
3210 uint8_t val;
3211};
3212
3213/* Get GPIO value */
3214#define EC_CMD_GPIO_GET 0x0093
3215
3216/* Version 0 of input params and response */
3217struct __ec_align1 ec_params_gpio_get {
3218 char name[32];
3219};
3220
3221struct __ec_align1 ec_response_gpio_get {
3222 uint8_t val;
3223};
3224
3225/* Version 1 of input params and response */
3226struct __ec_align1 ec_params_gpio_get_v1 {
3227 uint8_t subcmd;
3228 union {
3229 struct __ec_align1 {
3230 char name[32];
3231 } get_value_by_name;
3232 struct __ec_align1 {
3233 uint8_t index;
3234 } get_info;
3235 };
3236};
3237
3238struct __ec_todo_packed ec_response_gpio_get_v1 {
3239 union {
3240 struct __ec_align1 {
3241 uint8_t val;
3242 } get_value_by_name, get_count;
3243 struct __ec_todo_unpacked {
3244 uint8_t val;
3245 char name[32];
3246 uint32_t flags;
3247 } get_info;
3248 };
3249};
3250
3251enum gpio_get_subcmd {
3252 EC_GPIO_GET_BY_NAME = 0,
3253 EC_GPIO_GET_COUNT = 1,
3254 EC_GPIO_GET_INFO = 2,
3255};
3256
3257/*****************************************************************************/
3258/* I2C commands. Only available when flash write protect is unlocked. */
3259
3260/*
3261 * CAUTION: These commands are deprecated, and are not supported anymore in EC
3262 * builds >= 8398.0.0 (see crosbug.com/p/23570).
3263 *
3264 * Use EC_CMD_I2C_PASSTHRU instead.
3265 */
3266
3267/* Read I2C bus */
3268#define EC_CMD_I2C_READ 0x0094
3269
3270struct __ec_align_size1 ec_params_i2c_read {
3271 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3272 uint8_t read_size; /* Either 8 or 16. */
3273 uint8_t port;
3274 uint8_t offset;
3275};
3276
3277struct __ec_align2 ec_response_i2c_read {
3278 uint16_t data;
3279};
3280
3281/* Write I2C bus */
3282#define EC_CMD_I2C_WRITE 0x0095
3283
3284struct __ec_align_size1 ec_params_i2c_write {
3285 uint16_t data;
3286 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3287 uint8_t write_size; /* Either 8 or 16. */
3288 uint8_t port;
3289 uint8_t offset;
3290};
3291
3292/*****************************************************************************/
3293/* Charge state commands. Only available when flash write protect unlocked. */
3294
3295/* Force charge state machine to stop charging the battery or force it to
3296 * discharge the battery.
3297 */
3298#define EC_CMD_CHARGE_CONTROL 0x0096
3299#define EC_VER_CHARGE_CONTROL 1
3300
3301enum ec_charge_control_mode {
3302 CHARGE_CONTROL_NORMAL = 0,
3303 CHARGE_CONTROL_IDLE,
3304 CHARGE_CONTROL_DISCHARGE,
3305};
3306
3307struct __ec_align4 ec_params_charge_control {
3308 uint32_t mode; /* enum charge_control_mode */
3309};
3310
3311/*****************************************************************************/
3312/* Console commands. Only available when flash write protect is unlocked. */
3313
3314/* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
3315#define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3316
3317/*
3318 * Read data from the saved snapshot. If the subcmd parameter is
3319 * CONSOLE_READ_NEXT, this will return data starting from the beginning of
3320 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
3321 * end of the previous snapshot.
3322 *
3323 * The params are only looked at in version >= 1 of this command. Prior
3324 * versions will just default to CONSOLE_READ_NEXT behavior.
3325 *
3326 * Response is null-terminated string. Empty string, if there is no more
3327 * remaining output.
3328 */
3329#define EC_CMD_CONSOLE_READ 0x0098
3330
3331enum ec_console_read_subcmd {
3332 CONSOLE_READ_NEXT = 0,
3333 CONSOLE_READ_RECENT
3334};
3335
3336struct __ec_align1 ec_params_console_read_v1 {
3337 uint8_t subcmd; /* enum ec_console_read_subcmd */
3338};
3339
3340/*****************************************************************************/
3341
3342/*
3343 * Cut off battery power immediately or after the host has shut down.
3344 *
3345 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
3346 * EC_RES_SUCCESS if the command was successful.
3347 * EC_RES_ERROR if the cut off command failed.
3348 */
3349#define EC_CMD_BATTERY_CUT_OFF 0x0099
3350
3351#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0)
3352
3353struct __ec_align1 ec_params_battery_cutoff {
3354 uint8_t flags;
3355};
3356
3357/*****************************************************************************/
3358/* USB port mux control. */
3359
3360/*
3361 * Switch USB mux or return to automatic switching.
3362 */
3363#define EC_CMD_USB_MUX 0x009A
3364
3365struct __ec_align1 ec_params_usb_mux {
3366 uint8_t mux;
3367};
3368
3369/*****************************************************************************/
3370/* LDOs / FETs control. */
3371
3372enum ec_ldo_state {
3373 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
3374 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */
3375};
3376
3377/*
3378 * Switch on/off a LDO.
3379 */
3380#define EC_CMD_LDO_SET 0x009B
3381
3382struct __ec_align1 ec_params_ldo_set {
3383 uint8_t index;
3384 uint8_t state;
3385};
3386
3387/*
3388 * Get LDO state.
3389 */
3390#define EC_CMD_LDO_GET 0x009C
3391
3392struct __ec_align1 ec_params_ldo_get {
3393 uint8_t index;
3394};
3395
3396struct __ec_align1 ec_response_ldo_get {
3397 uint8_t state;
3398};
3399
3400/*****************************************************************************/
3401/* Power info. */
3402
3403/*
3404 * Get power info.
3405 */
3406#define EC_CMD_POWER_INFO 0x009D
3407
3408struct __ec_align4 ec_response_power_info {
3409 uint32_t usb_dev_type;
3410 uint16_t voltage_ac;
3411 uint16_t voltage_system;
3412 uint16_t current_system;
3413 uint16_t usb_current_limit;
3414};
3415
3416/*****************************************************************************/
3417/* I2C passthru command */
3418
3419#define EC_CMD_I2C_PASSTHRU 0x009E
3420
3421/* Read data; if not present, message is a write */
3422#define EC_I2C_FLAG_READ (1 << 15)
3423
3424/* Mask for address */
3425#define EC_I2C_ADDR_MASK 0x3ff
3426
3427#define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */
3428#define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */
3429
3430/* Any error */
3431#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3432
3433struct __ec_align2 ec_params_i2c_passthru_msg {
3434 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */
3435 uint16_t len; /* Number of bytes to read or write */
3436};
3437
3438struct __ec_align2 ec_params_i2c_passthru {
3439 uint8_t port; /* I2C port number */
3440 uint8_t num_msgs; /* Number of messages */
3441 struct ec_params_i2c_passthru_msg msg[];
3442 /* Data to write for all messages is concatenated here */
3443};
3444
3445struct __ec_align1 ec_response_i2c_passthru {
3446 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */
3447 uint8_t num_msgs; /* Number of messages processed */
3448 uint8_t data[]; /* Data read by messages concatenated here */
3449};
3450
3451/*****************************************************************************/
3452/* Power button hang detect */
3453
3454#define EC_CMD_HANG_DETECT 0x009F
3455
3456/* Reasons to start hang detection timer */
3457/* Power button pressed */
3458#define EC_HANG_START_ON_POWER_PRESS (1 << 0)
3459
3460/* Lid closed */
3461#define EC_HANG_START_ON_LID_CLOSE (1 << 1)
3462
3463 /* Lid opened */
3464#define EC_HANG_START_ON_LID_OPEN (1 << 2)
3465
3466/* Start of AP S3->S0 transition (booting or resuming from suspend) */
3467#define EC_HANG_START_ON_RESUME (1 << 3)
3468
3469/* Reasons to cancel hang detection */
3470
3471/* Power button released */
3472#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
3473
3474/* Any host command from AP received */
3475#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9)
3476
3477/* Stop on end of AP S0->S3 transition (suspending or shutting down) */
3478#define EC_HANG_STOP_ON_SUSPEND (1 << 10)
3479
3480/*
3481 * If this flag is set, all the other fields are ignored, and the hang detect
3482 * timer is started. This provides the AP a way to start the hang timer
3483 * without reconfiguring any of the other hang detect settings. Note that
3484 * you must previously have configured the timeouts.
3485 */
3486#define EC_HANG_START_NOW (1 << 30)
3487
3488/*
3489 * If this flag is set, all the other fields are ignored (including
3490 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer
3491 * without reconfiguring any of the other hang detect settings.
3492 */
3493#define EC_HANG_STOP_NOW (1 << 31)
3494
3495struct __ec_align4 ec_params_hang_detect {
3496 /* Flags; see EC_HANG_* */
3497 uint32_t flags;
3498
3499 /* Timeout in msec before generating host event, if enabled */
3500 uint16_t host_event_timeout_msec;
3501
3502 /* Timeout in msec before generating warm reboot, if enabled */
3503 uint16_t warm_reboot_timeout_msec;
3504};
3505
3506/*****************************************************************************/
3507/* Commands for battery charging */
3508
3509/*
3510 * This is the single catch-all host command to exchange data regarding the
3511 * charge state machine (v2 and up).
3512 */
3513#define EC_CMD_CHARGE_STATE 0x00A0
3514
3515/* Subcommands for this host command */
3516enum charge_state_command {
3517 CHARGE_STATE_CMD_GET_STATE,
3518 CHARGE_STATE_CMD_GET_PARAM,
3519 CHARGE_STATE_CMD_SET_PARAM,
3520 CHARGE_STATE_NUM_CMDS
3521};
3522
3523/*
3524 * Known param numbers are defined here. Ranges are reserved for board-specific
3525 * params, which are handled by the particular implementations.
3526 */
3527enum charge_state_params {
3528 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */
3529 CS_PARAM_CHG_CURRENT, /* charger current limit */
3530 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */
3531 CS_PARAM_CHG_STATUS, /* charger-specific status */
3532 CS_PARAM_CHG_OPTION, /* charger-specific options */
3533 CS_PARAM_LIMIT_POWER, /*
3534 * Check if power is limited due to
3535 * low battery and / or a weak external
3536 * charger. READ ONLY.
3537 */
3538 /* How many so far? */
3539 CS_NUM_BASE_PARAMS,
3540
3541 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
3542 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
3543 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
3544
3545 /* Other custom param ranges go here... */
3546};
3547
3548struct __ec_todo_packed ec_params_charge_state {
3549 uint8_t cmd; /* enum charge_state_command */
3550 union {
3551 struct __ec_align1 {
3552 /* no args */
3553 } get_state;
3554
3555 struct __ec_todo_unpacked {
3556 uint32_t param; /* enum charge_state_param */
3557 } get_param;
3558
3559 struct __ec_todo_unpacked {
3560 uint32_t param; /* param to set */
3561 uint32_t value; /* value to set */
3562 } set_param;
3563 };
3564};
3565
3566struct __ec_align4 ec_response_charge_state {
3567 union {
3568 struct __ec_align4 {
3569 int ac;
3570 int chg_voltage;
3571 int chg_current;
3572 int chg_input_current;
3573 int batt_state_of_charge;
3574 } get_state;
3575
3576 struct __ec_align4 {
3577 uint32_t value;
3578 } get_param;
3579 struct __ec_align4 {
3580 /* no return values */
3581 } set_param;
3582 };
3583};
3584
3585
3586/*
3587 * Set maximum battery charging current.
3588 */
3589#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
3590
3591struct __ec_align4 ec_params_current_limit {
3592 uint32_t limit; /* in mA */
3593};
3594
3595/*
3596 * Set maximum external voltage / current.
3597 */
3598#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
3599
3600/* Command v0 is used only on Spring and is obsolete + unsupported */
3601struct __ec_align2 ec_params_external_power_limit_v1 {
3602 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
3603 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
3604};
3605
3606#define EC_POWER_LIMIT_NONE 0xffff
3607
3608/*
3609 * Set maximum voltage & current of a dedicated charge port
3610 */
3611#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
3612
3613struct __ec_align2 ec_params_dedicated_charger_limit {
3614 uint16_t current_lim; /* in mA */
3615 uint16_t voltage_lim; /* in mV */
3616};
3617
3618/*****************************************************************************/
3619/* Hibernate/Deep Sleep Commands */
3620
3621/* Set the delay before going into hibernation. */
3622#define EC_CMD_HIBERNATION_DELAY 0x00A8
3623
3624struct __ec_align4 ec_params_hibernation_delay {
3625 /*
3626 * Seconds to wait in G3 before hibernate. Pass in 0 to read the
3627 * current settings without changing them.
3628 */
3629 uint32_t seconds;
3630};
3631
3632struct __ec_align4 ec_response_hibernation_delay {
3633 /*
3634 * The current time in seconds in which the system has been in the G3
3635 * state. This value is reset if the EC transitions out of G3.
3636 */
3637 uint32_t time_g3;
3638
3639 /*
3640 * The current time remaining in seconds until the EC should hibernate.
3641 * This value is also reset if the EC transitions out of G3.
3642 */
3643 uint32_t time_remaining;
3644
3645 /*
3646 * The current time in seconds that the EC should wait in G3 before
3647 * hibernating.
3648 */
3649 uint32_t hibernate_delay;
3650};
3651
3652/* Inform the EC when entering a sleep state */
3653#define EC_CMD_HOST_SLEEP_EVENT 0x00A9
3654
3655enum host_sleep_event {
3656 HOST_SLEEP_EVENT_S3_SUSPEND = 1,
3657 HOST_SLEEP_EVENT_S3_RESUME = 2,
3658 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
3659 HOST_SLEEP_EVENT_S0IX_RESUME = 4
3660};
3661
3662struct __ec_align1 ec_params_host_sleep_event {
3663 uint8_t sleep_event;
3664};
3665
3666/*****************************************************************************/
3667/* Device events */
3668#define EC_CMD_DEVICE_EVENT 0x00AA
3669
3670enum ec_device_event {
3671 EC_DEVICE_EVENT_TRACKPAD,
3672 EC_DEVICE_EVENT_DSP,
3673 EC_DEVICE_EVENT_WIFI,
3674};
3675
3676enum ec_device_event_param {
3677 /* Get and clear pending device events */
3678 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
3679 /* Get device event mask */
3680 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
3681 /* Set device event mask */
3682 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
3683};
3684
3685#define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32))
88364387 3686
6f1c0430
SG
3687struct __ec_align_size1 ec_params_device_event {
3688 uint32_t event_mask;
3689 uint8_t param;
3690};
88364387 3691
6f1c0430
SG
3692struct __ec_align4 ec_response_device_event {
3693 uint32_t event_mask;
3694};
88364387 3695
6f1c0430
SG
3696/*****************************************************************************/
3697/* Smart battery pass-through */
88364387 3698
6f1c0430
SG
3699/* Get / Set 16-bit smart battery registers */
3700#define EC_CMD_SB_READ_WORD 0x00B0
3701#define EC_CMD_SB_WRITE_WORD 0x00B1
88364387 3702
6f1c0430
SG
3703/* Get / Set string smart battery parameters
3704 * formatted as SMBUS "block".
3705 */
3706#define EC_CMD_SB_READ_BLOCK 0x00B2
3707#define EC_CMD_SB_WRITE_BLOCK 0x00B3
88364387 3708
6f1c0430
SG
3709struct __ec_align1 ec_params_sb_rd {
3710 uint8_t reg;
88364387
HT
3711};
3712
6f1c0430
SG
3713struct __ec_align2 ec_response_sb_rd_word {
3714 uint16_t value;
88364387
HT
3715};
3716
6f1c0430
SG
3717struct __ec_align1 ec_params_sb_wr_word {
3718 uint8_t reg;
3719 uint16_t value;
3720};
88364387 3721
6f1c0430
SG
3722struct __ec_align1 ec_response_sb_rd_block {
3723 uint8_t data[32];
3724};
88364387 3725
6f1c0430
SG
3726struct __ec_align1 ec_params_sb_wr_block {
3727 uint8_t reg;
3728 uint16_t data[32];
3729};
88364387 3730
6f1c0430
SG
3731/*****************************************************************************/
3732/* Battery vendor parameters
3733 *
3734 * Get or set vendor-specific parameters in the battery. Implementations may
3735 * differ between boards or batteries. On a set operation, the response
3736 * contains the actual value set, which may be rounded or clipped from the
3737 * requested value.
3738 */
88364387 3739
6f1c0430
SG
3740#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
3741
3742enum ec_battery_vendor_param_mode {
3743 BATTERY_VENDOR_PARAM_MODE_GET = 0,
3744 BATTERY_VENDOR_PARAM_MODE_SET,
88364387
HT
3745};
3746
6f1c0430
SG
3747struct __ec_align_size1 ec_params_battery_vendor_param {
3748 uint32_t param;
3749 uint32_t value;
3750 uint8_t mode;
88364387
HT
3751};
3752
6f1c0430
SG
3753struct __ec_align4 ec_response_battery_vendor_param {
3754 uint32_t value;
88364387
HT
3755};
3756
6f1c0430
SG
3757/*****************************************************************************/
3758/*
3759 * Smart Battery Firmware Update Commands
3760 */
3761#define EC_CMD_SB_FW_UPDATE 0x00B5
3762
3763enum ec_sb_fw_update_subcmd {
3764 EC_SB_FW_UPDATE_PREPARE = 0x0,
3765 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */
3766 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */
3767 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */
3768 EC_SB_FW_UPDATE_END = 0x4,
3769 EC_SB_FW_UPDATE_STATUS = 0x5,
3770 EC_SB_FW_UPDATE_PROTECT = 0x6,
3771 EC_SB_FW_UPDATE_MAX = 0x7,
3772};
3773
3774#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
3775#define SB_FW_UPDATE_CMD_STATUS_SIZE 2
3776#define SB_FW_UPDATE_CMD_INFO_SIZE 8
3777
3778struct __ec_align4 ec_sb_fw_update_header {
3779 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */
3780 uint16_t fw_id; /* firmware id */
3781};
3782
3783struct __ec_align4 ec_params_sb_fw_update {
3784 struct ec_sb_fw_update_header hdr;
88364387 3785 union {
6f1c0430
SG
3786 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */
3787 /* EC_SB_FW_UPDATE_INFO = 0x1 */
3788 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */
3789 /* EC_SB_FW_UPDATE_END = 0x4 */
3790 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
3791 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */
3792 struct __ec_align4 {
3793 /* no args */
3794 } dummy;
3795
3796 /* EC_SB_FW_UPDATE_WRITE = 0x3 */
3797 struct __ec_align4 {
3798 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
3799 } write;
88364387 3800 };
6f1c0430 3801};
88364387 3802
6f1c0430 3803struct __ec_align1 ec_response_sb_fw_update {
88364387 3804 union {
6f1c0430
SG
3805 /* EC_SB_FW_UPDATE_INFO = 0x1 */
3806 struct __ec_align1 {
3807 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
3808 } info;
3809
3810 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
3811 struct __ec_align1 {
3812 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
3813 } status;
88364387 3814 };
6f1c0430
SG
3815};
3816
3817/*
3818 * Entering Verified Boot Mode Command
3819 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
3820 * Valid Modes are: normal, developer, and recovery.
3821 */
3822#define EC_CMD_ENTERING_MODE 0x00B6
3823
3824struct __ec_align4 ec_params_entering_mode {
3825 int vboot_mode;
3826};
3827
3828#define VBOOT_MODE_NORMAL 0
3829#define VBOOT_MODE_DEVELOPER 1
3830#define VBOOT_MODE_RECOVERY 2
88364387
HT
3831
3832/*****************************************************************************/
6f1c0430
SG
3833/*
3834 * I2C passthru protection command: Protects I2C tunnels against access on
3835 * certain addresses (board-specific).
3836 */
3837#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
88364387 3838
6f1c0430
SG
3839enum ec_i2c_passthru_protect_subcmd {
3840 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
3841 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
3842};
88364387 3843
6f1c0430
SG
3844struct __ec_align1 ec_params_i2c_passthru_protect {
3845 uint8_t subcmd;
3846 uint8_t port; /* I2C port number */
3847};
88364387 3848
6f1c0430
SG
3849struct __ec_align1 ec_response_i2c_passthru_protect {
3850 uint8_t status; /* Status flags (0: unlocked, 1: locked) */
3851};
88364387
HT
3852
3853/*****************************************************************************/
6f1c0430 3854/* System commands */
88364387
HT
3855
3856/*
6f1c0430
SG
3857 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
3858 * necessarily reboot the EC. Rename to "image" or something similar?
88364387 3859 */
6f1c0430 3860#define EC_CMD_REBOOT_EC 0x00D2
88364387 3861
6f1c0430
SG
3862/* Command */
3863enum ec_reboot_cmd {
3864 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */
3865 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */
3866 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */
3867 /* (command 3 was jump to RW-B) */
3868 EC_REBOOT_COLD = 4, /* Cold-reboot */
3869 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */
3870 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */
3871 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */
3872};
3873
3874/* Flags for ec_params_reboot_ec.reboot_flags */
3875#define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */
3876#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */
3877#define EC_REBOOT_FLAG_SWITCH_RW_SLOT (1 << 2) /* Switch RW slot */
3878
3879struct __ec_align1 ec_params_reboot_ec {
3880 uint8_t cmd; /* enum ec_reboot_cmd */
3881 uint8_t flags; /* See EC_REBOOT_FLAG_* */
3882};
88364387
HT
3883
3884/*
6f1c0430
SG
3885 * Get information on last EC panic.
3886 *
3887 * Returns variable-length platform-dependent panic information. See panic.h
3888 * for details.
88364387 3889 */
6f1c0430 3890#define EC_CMD_GET_PANIC_INFO 0x00D3
88364387 3891
6f1c0430
SG
3892/*****************************************************************************/
3893/*
3894 * Special commands
3895 *
3896 * These do not follow the normal rules for commands. See each command for
3897 * details.
3898 */
88364387 3899
6f1c0430
SG
3900/*
3901 * Reboot NOW
3902 *
3903 * This command will work even when the EC LPC interface is busy, because the
3904 * reboot command is processed at interrupt level. Note that when the EC
3905 * reboots, the host will reboot too, so there is no response to this command.
3906 *
3907 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
3908 */
3909#define EC_CMD_REBOOT 0x00D1 /* Think "die" */
88364387 3910
6f1c0430
SG
3911/*
3912 * Resend last response (not supported on LPC).
3913 *
3914 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
3915 * there was no previous command, or the previous command's response was too
3916 * big to save.
3917 */
3918#define EC_CMD_RESEND_RESPONSE 0x00DB
3919
3920/*
3921 * This header byte on a command indicate version 0. Any header byte less
3922 * than this means that we are talking to an old EC which doesn't support
3923 * versioning. In that case, we assume version 0.
3924 *
3925 * Header bytes greater than this indicate a later version. For example,
3926 * EC_CMD_VERSION0 + 1 means we are using version 1.
3927 *
3928 * The old EC interface must not use commands 0xdc or higher.
3929 */
3930#define EC_CMD_VERSION0 0x00DC
88364387
HT
3931
3932/*****************************************************************************/
6f1c0430
SG
3933/*
3934 * PD commands
3935 *
3936 * These commands are for PD MCU communication.
3937 */
88364387 3938
6f1c0430
SG
3939/* EC to PD MCU exchange status command */
3940#define EC_CMD_PD_EXCHANGE_STATUS 0x0100
3941#define EC_VER_PD_EXCHANGE_STATUS 2
88364387 3942
6f1c0430
SG
3943enum pd_charge_state {
3944 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
3945 PD_CHARGE_NONE, /* No charging allowed */
3946 PD_CHARGE_5V, /* 5V charging only */
3947 PD_CHARGE_MAX /* Charge at max voltage */
3948};
88364387 3949
6f1c0430
SG
3950/* Status of EC being sent to PD */
3951#define EC_STATUS_HIBERNATING (1 << 0)
3952
3953struct __ec_align1 ec_params_pd_status {
3954 uint8_t status; /* EC status */
3955 int8_t batt_soc; /* battery state of charge */
3956 uint8_t charge_state; /* charging state (from enum pd_charge_state) */
3957};
3958
3959/* Status of PD being sent back to EC */
3960#define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */
3961#define PD_STATUS_IN_RW (1 << 1) /* Running RW image */
3962#define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */
3963#define PD_STATUS_TCPC_ALERT_0 (1 << 3) /* Alert active in port 0 TCPC */
3964#define PD_STATUS_TCPC_ALERT_1 (1 << 4) /* Alert active in port 1 TCPC */
3965#define PD_STATUS_TCPC_ALERT_2 (1 << 5) /* Alert active in port 2 TCPC */
3966#define PD_STATUS_TCPC_ALERT_3 (1 << 6) /* Alert active in port 3 TCPC */
3967#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \
3968 PD_STATUS_TCPC_ALERT_1 | \
3969 PD_STATUS_HOST_EVENT)
3970struct __ec_align_size1 ec_response_pd_status {
3971 uint32_t curr_lim_ma; /* input current limit */
3972 uint16_t status; /* PD MCU status */
3973 int8_t active_charge_port; /* active charging port */
3974};
3975
3976/* AP to PD MCU host event status command, cleared on read */
3977#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
3978
3979/* PD MCU host event status bits */
3980#define PD_EVENT_UPDATE_DEVICE (1 << 0)
3981#define PD_EVENT_POWER_CHANGE (1 << 1)
3982#define PD_EVENT_IDENTITY_RECEIVED (1 << 2)
3983#define PD_EVENT_DATA_SWAP (1 << 3)
3984struct __ec_align4 ec_response_host_event_status {
3985 uint32_t status; /* PD MCU host event status */
3986};
3987
3988/* Set USB type-C port role and muxes */
3989#define EC_CMD_USB_PD_CONTROL 0x0101
3990
3991enum usb_pd_control_role {
3992 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
3993 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
3994 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
3995 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
3996 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
3997 USB_PD_CTRL_ROLE_COUNT
3998};
3999
4000enum usb_pd_control_mux {
4001 USB_PD_CTRL_MUX_NO_CHANGE = 0,
4002 USB_PD_CTRL_MUX_NONE = 1,
4003 USB_PD_CTRL_MUX_USB = 2,
4004 USB_PD_CTRL_MUX_DP = 3,
4005 USB_PD_CTRL_MUX_DOCK = 4,
4006 USB_PD_CTRL_MUX_AUTO = 5,
4007 USB_PD_CTRL_MUX_COUNT
4008};
4009
4010enum usb_pd_control_swap {
4011 USB_PD_CTRL_SWAP_NONE = 0,
4012 USB_PD_CTRL_SWAP_DATA = 1,
4013 USB_PD_CTRL_SWAP_POWER = 2,
4014 USB_PD_CTRL_SWAP_VCONN = 3,
4015 USB_PD_CTRL_SWAP_COUNT
4016};
4017
4018struct __ec_align1 ec_params_usb_pd_control {
4019 uint8_t port;
4020 uint8_t role;
4021 uint8_t mux;
4022 uint8_t swap;
4023};
88364387 4024
6f1c0430
SG
4025#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */
4026#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */
4027#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */
4028
4029#define PD_CTRL_RESP_ROLE_POWER (1 << 0) /* 0=SNK/1=SRC */
4030#define PD_CTRL_RESP_ROLE_DATA (1 << 1) /* 0=UFP/1=DFP */
4031#define PD_CTRL_RESP_ROLE_VCONN (1 << 2) /* Vconn status */
4032#define PD_CTRL_RESP_ROLE_DR_POWER (1 << 3) /* Partner is dualrole power */
4033#define PD_CTRL_RESP_ROLE_DR_DATA (1 << 4) /* Partner is dualrole data */
4034#define PD_CTRL_RESP_ROLE_USB_COMM (1 << 5) /* Partner USB comm capable */
4035#define PD_CTRL_RESP_ROLE_EXT_POWERED (1 << 6) /* Partner externally powerd */
4036
4037struct __ec_align1 ec_response_usb_pd_control {
88364387 4038 uint8_t enabled;
6f1c0430
SG
4039 uint8_t role;
4040 uint8_t polarity;
4041 uint8_t state;
4042};
88364387 4043
6f1c0430
SG
4044struct __ec_align1 ec_response_usb_pd_control_v1 {
4045 uint8_t enabled;
4046 uint8_t role;
4047 uint8_t polarity;
4048 char state[32];
4049};
88364387 4050
6f1c0430 4051#define EC_CMD_USB_PD_PORTS 0x0102
88364387 4052
6f1c0430
SG
4053/* Maximum number of PD ports on a device, num_ports will be <= this */
4054#define EC_USB_PD_MAX_PORTS 8
88364387 4055
6f1c0430
SG
4056struct __ec_align1 ec_response_usb_pd_ports {
4057 uint8_t num_ports;
4058};
88364387 4059
6f1c0430
SG
4060#define EC_CMD_USB_PD_POWER_INFO 0x0103
4061
4062#define PD_POWER_CHARGING_PORT 0xff
4063struct __ec_align1 ec_params_usb_pd_power_info {
4064 uint8_t port;
4065};
4066
4067enum usb_chg_type {
4068 USB_CHG_TYPE_NONE,
4069 USB_CHG_TYPE_PD,
4070 USB_CHG_TYPE_C,
4071 USB_CHG_TYPE_PROPRIETARY,
4072 USB_CHG_TYPE_BC12_DCP,
4073 USB_CHG_TYPE_BC12_CDP,
4074 USB_CHG_TYPE_BC12_SDP,
4075 USB_CHG_TYPE_OTHER,
4076 USB_CHG_TYPE_VBUS,
4077 USB_CHG_TYPE_UNKNOWN,
4078};
4079enum usb_power_roles {
4080 USB_PD_PORT_POWER_DISCONNECTED,
4081 USB_PD_PORT_POWER_SOURCE,
4082 USB_PD_PORT_POWER_SINK,
4083 USB_PD_PORT_POWER_SINK_NOT_CHARGING,
4084};
4085
4086struct __ec_align2 usb_chg_measures {
4087 uint16_t voltage_max;
4088 uint16_t voltage_now;
4089 uint16_t current_max;
4090 uint16_t current_lim;
4091};
4092
4093struct __ec_align4 ec_response_usb_pd_power_info {
4094 uint8_t role;
4095 uint8_t type;
4096 uint8_t dualrole;
4097 uint8_t reserved1;
4098 struct usb_chg_measures meas;
4099 uint32_t max_power;
4100};
4101
4102/* Write USB-PD device FW */
4103#define EC_CMD_USB_PD_FW_UPDATE 0x0110
4104
4105enum usb_pd_fw_update_cmds {
4106 USB_PD_FW_REBOOT,
4107 USB_PD_FW_FLASH_ERASE,
4108 USB_PD_FW_FLASH_WRITE,
4109 USB_PD_FW_ERASE_SIG,
4110};
4111
4112struct __ec_align4 ec_params_usb_pd_fw_update {
4113 uint16_t dev_id;
4114 uint8_t cmd;
4115 uint8_t port;
4116 uint32_t size; /* Size to write in bytes */
4117 /* Followed by data to write */
4118};
88364387 4119
6f1c0430
SG
4120/* Write USB-PD Accessory RW_HASH table entry */
4121#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
4122/* RW hash is first 20 bytes of SHA-256 of RW section */
4123#define PD_RW_HASH_SIZE 20
4124struct __ec_align1 ec_params_usb_pd_rw_hash_entry {
4125 uint16_t dev_id;
4126 uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
4127 uint8_t reserved; /* For alignment of current_image
4128 * TODO(rspangler) but it's not aligned!
4129 * Should have been reserved[2]. */
4130 uint32_t current_image; /* One of ec_current_image */
4131};
88364387 4132
6f1c0430
SG
4133/* Read USB-PD Accessory info */
4134#define EC_CMD_USB_PD_DEV_INFO 0x0112
88364387 4135
6f1c0430 4136struct __ec_align1 ec_params_usb_pd_info_request {
88364387 4137 uint8_t port;
6f1c0430 4138};
88364387 4139
6f1c0430
SG
4140/* Read USB-PD Device discovery info */
4141#define EC_CMD_USB_PD_DISCOVERY 0x0113
4142struct __ec_align_size1 ec_params_usb_pd_discovery_entry {
4143 uint16_t vid; /* USB-IF VID */
4144 uint16_t pid; /* USB-IF PID */
4145 uint8_t ptype; /* product type (hub,periph,cable,ama) */
4146};
88364387 4147
6f1c0430
SG
4148/* Override default charge behavior */
4149#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
88364387 4150
6f1c0430
SG
4151/* Negative port parameters have special meaning */
4152enum usb_pd_override_ports {
4153 OVERRIDE_DONT_CHARGE = -2,
4154 OVERRIDE_OFF = -1,
4155 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
4156};
88364387 4157
6f1c0430
SG
4158struct __ec_align2 ec_params_charge_port_override {
4159 int16_t override_port; /* Override port# */
4160};
88364387 4161
6f1c0430
SG
4162/* Read (and delete) one entry of PD event log */
4163#define EC_CMD_PD_GET_LOG_ENTRY 0x0115
88364387 4164
6f1c0430
SG
4165struct __ec_align4 ec_response_pd_log {
4166 uint32_t timestamp; /* relative timestamp in milliseconds */
4167 uint8_t type; /* event type : see PD_EVENT_xx below */
4168 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */
4169 uint16_t data; /* type-defined data payload */
4170 uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */
4171};
88364387 4172
6f1c0430
SG
4173
4174/* The timestamp is the microsecond counter shifted to get about a ms. */
4175#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
4176
4177#define PD_LOG_SIZE_MASK 0x1f
4178#define PD_LOG_PORT_MASK 0xe0
4179#define PD_LOG_PORT_SHIFT 5
4180#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
4181 ((size) & PD_LOG_SIZE_MASK))
4182#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
4183#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
4184
4185/* PD event log : entry types */
4186/* PD MCU events */
4187#define PD_EVENT_MCU_BASE 0x00
4188#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
4189#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
4190/* Reserved for custom board event */
4191#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
4192/* PD generic accessory events */
4193#define PD_EVENT_ACC_BASE 0x20
4194#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
4195#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
4196/* PD power supply events */
4197#define PD_EVENT_PS_BASE 0x40
4198#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
4199/* PD video dongles events */
4200#define PD_EVENT_VIDEO_BASE 0x60
4201#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
4202#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
4203/* Returned in the "type" field, when there is no entry available */
4204#define PD_EVENT_NO_ENTRY 0xff
88364387
HT
4205
4206/*
6f1c0430
SG
4207 * PD_EVENT_MCU_CHARGE event definition :
4208 * the payload is "struct usb_chg_measures"
4209 * the data field contains the port state flags as defined below :
88364387 4210 */
6f1c0430
SG
4211/* Port partner is a dual role device */
4212#define CHARGE_FLAGS_DUAL_ROLE (1 << 15)
4213/* Port is the pending override port */
4214#define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14)
4215/* Port is the override port */
4216#define CHARGE_FLAGS_OVERRIDE (1 << 13)
4217/* Charger type */
4218#define CHARGE_FLAGS_TYPE_SHIFT 3
4219#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
4220/* Power delivery role */
4221#define CHARGE_FLAGS_ROLE_MASK (7 << 0)
88364387
HT
4222
4223/*
6f1c0430 4224 * PD_EVENT_PS_FAULT data field flags definition :
88364387 4225 */
6f1c0430
SG
4226#define PS_FAULT_OCP 1
4227#define PS_FAULT_FAST_OCP 2
4228#define PS_FAULT_OVP 3
4229#define PS_FAULT_DISCH 4
88364387
HT
4230
4231/*
6f1c0430 4232 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
88364387 4233 */
6f1c0430
SG
4234struct __ec_align4 mcdp_version {
4235 uint8_t major;
4236 uint8_t minor;
4237 uint16_t build;
4238};
88364387 4239
6f1c0430
SG
4240struct __ec_align4 mcdp_info {
4241 uint8_t family[2];
4242 uint8_t chipid[2];
4243 struct mcdp_version irom;
4244 struct mcdp_version fw;
4245};
88364387 4246
6f1c0430
SG
4247/* struct mcdp_info field decoding */
4248#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
4249#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
88364387 4250
6f1c0430
SG
4251/* Get/Set USB-PD Alternate mode info */
4252#define EC_CMD_USB_PD_GET_AMODE 0x0116
4253struct __ec_align_size1 ec_params_usb_pd_get_mode_request {
4254 uint16_t svid_idx; /* SVID index to get */
4255 uint8_t port; /* port */
88364387
HT
4256};
4257
6f1c0430
SG
4258struct __ec_align4 ec_params_usb_pd_get_mode_response {
4259 uint16_t svid; /* SVID */
4260 uint16_t opos; /* Object Position */
4261 uint32_t vdo[6]; /* Mode VDOs */
4262};
88364387 4263
6f1c0430 4264#define EC_CMD_USB_PD_SET_AMODE 0x0117
88364387 4265
6f1c0430
SG
4266enum pd_mode_cmd {
4267 PD_EXIT_MODE = 0,
4268 PD_ENTER_MODE = 1,
4269 /* Not a command. Do NOT remove. */
4270 PD_MODE_CMD_COUNT,
4271};
88364387 4272
6f1c0430
SG
4273struct __ec_align4 ec_params_usb_pd_set_mode_request {
4274 uint32_t cmd; /* enum pd_mode_cmd */
4275 uint16_t svid; /* SVID to set */
4276 uint8_t opos; /* Object Position */
4277 uint8_t port; /* port */
4278};
88364387 4279
6f1c0430
SG
4280/* Ask the PD MCU to record a log of a requested type */
4281#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
88364387 4282
6f1c0430
SG
4283struct __ec_align1 ec_params_pd_write_log_entry {
4284 uint8_t type; /* event type : see PD_EVENT_xx above */
4285 uint8_t port; /* port#, or 0 for events unrelated to a given port */
4286};
836bb6e8 4287
836bb6e8 4288
6f1c0430
SG
4289/* Control USB-PD chip */
4290#define EC_CMD_PD_CONTROL 0x0119
836bb6e8 4291
6f1c0430
SG
4292enum ec_pd_control_cmd {
4293 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */
4294 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */
4295 PD_RESET, /* Force reset the PD chip */
4296 PD_CONTROL_DISABLE /* Disable further calls to this command */
4297};
836bb6e8 4298
6f1c0430
SG
4299struct __ec_align1 ec_params_pd_control {
4300 uint8_t chip; /* chip id (should be 0) */
4301 uint8_t subcmd;
4302};
836bb6e8 4303
6f1c0430
SG
4304/* Get info about USB-C SS muxes */
4305#define EC_CMD_USB_PD_MUX_INFO 0x011A
836bb6e8 4306
6f1c0430
SG
4307struct __ec_align1 ec_params_usb_pd_mux_info {
4308 uint8_t port; /* USB-C port number */
4309};
836bb6e8 4310
6f1c0430
SG
4311/* Flags representing mux state */
4312#define USB_PD_MUX_USB_ENABLED (1 << 0)
4313#define USB_PD_MUX_DP_ENABLED (1 << 1)
4314#define USB_PD_MUX_POLARITY_INVERTED (1 << 2)
4315#define USB_PD_MUX_HPD_IRQ (1 << 3)
836bb6e8 4316
6f1c0430
SG
4317struct __ec_align1 ec_response_usb_pd_mux_info {
4318 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
4319};
836bb6e8 4320
6f1c0430 4321#define EC_CMD_PD_CHIP_INFO 0x011B
836bb6e8 4322
6f1c0430
SG
4323struct __ec_align1 ec_params_pd_chip_info {
4324 uint8_t port; /* USB-C port number */
4325 uint8_t renew; /* Force renewal */
4326};
836bb6e8 4327
6f1c0430
SG
4328struct __ec_align2 ec_response_pd_chip_info {
4329 uint16_t vendor_id;
4330 uint16_t product_id;
4331 uint16_t device_id;
4332 union {
4333 uint8_t fw_version_string[8];
4334 uint64_t fw_version_number;
4335 };
4336};
836bb6e8 4337
6f1c0430
SG
4338/* Run RW signature verification and get status */
4339#define EC_CMD_RWSIG_CHECK_STATUS 0x011C
4340
4341struct __ec_align4 ec_response_rwsig_check_status {
4342 uint32_t status;
4343};
836bb6e8 4344
6f1c0430
SG
4345/* For controlling RWSIG task */
4346#define EC_CMD_RWSIG_ACTION 0x011D
836bb6e8 4347
6f1c0430
SG
4348enum rwsig_action {
4349 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */
4350 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */
4351};
4352
4353struct __ec_align4 ec_params_rwsig_action {
4354 uint32_t action;
4355};
4356
4357/* Run verification on a slot */
4358#define EC_CMD_EFS_VERIFY 0x011E
4359
4360struct __ec_align1 ec_params_efs_verify {
4361 uint8_t region; /* enum ec_flash_region */
4362};
88364387
HT
4363
4364/*
6f1c0430
SG
4365 * Retrieve info from Cros Board Info store. Response is based on the data
4366 * type. Integers return a uint32. Strings return a string, using the response
4367 * size to determine how big it is.
4368 */
4369#define EC_CMD_GET_CROS_BOARD_INFO 0x011F
4370/*
4371 * Write info into Cros Board Info on EEPROM. Write fails if the board has
4372 * hardware write-protect enabled.
88364387 4373 */
6f1c0430
SG
4374#define EC_CMD_SET_CROS_BOARD_INFO 0x0120
4375
4376enum cbi_data_tag {
4377 CBI_TAG_BOARD_VERSION = 0, /* uint16_t or uint8_t[] = {minor,major} */
4378 CBI_TAG_OEM_ID = 1, /* uint8_t */
4379 CBI_TAG_SKU_ID = 2, /* uint8_t */
4380 CBI_TAG_COUNT,
4381};
88364387
HT
4382
4383/*
6f1c0430
SG
4384 * Flags to control read operation
4385 *
4386 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify
4387 * write was successful without reboot.
88364387 4388 */
6f1c0430 4389#define CBI_GET_RELOAD (1 << 0)
88364387 4390
6f1c0430
SG
4391struct __ec_align4 ec_params_get_cbi {
4392 uint32_t type; /* enum cbi_data_tag */
4393 uint32_t flag; /* CBI_GET_* */
4394};
836bb6e8
SG
4395
4396/*
6f1c0430
SG
4397 * Flags to control write behavior.
4398 *
4399 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
4400 * useful when writing multiple fields in a row.
4401 * INIT: Needs to be set when creating a new CBI from scratch. All fields
4402 * will be initialized to zero first.
836bb6e8 4403 */
6f1c0430
SG
4404#define CBI_SET_NO_SYNC (1 << 0)
4405#define CBI_SET_INIT (1 << 1)
4406
4407struct __ec_align1 ec_params_set_cbi {
4408 uint32_t tag; /* enum cbi_data_tag */
4409 uint32_t flag; /* CBI_SET_* */
4410 uint32_t size; /* Data size */
4411 uint8_t data[]; /* For string and raw data */
4412};
836bb6e8 4413
6f1c0430
SG
4414/*****************************************************************************/
4415/* The command range 0x200-0x2FF is reserved for Rotor. */
88364387
HT
4416
4417/*****************************************************************************/
6f1c0430
SG
4418/*
4419 * Reserve a range of host commands for the CR51 firmware.
4420 */
4421#define EC_CMD_CR51_BASE 0x0300
4422#define EC_CMD_CR51_LAST 0x03FF
88364387 4423
6f1c0430
SG
4424/*****************************************************************************/
4425/* Fingerprint MCU commands: range 0x0400-0x040x */
88364387 4426
6f1c0430
SG
4427/* Fingerprint SPI sensor passthru command: prototyping ONLY */
4428#define EC_CMD_FP_PASSTHRU 0x0400
88364387 4429
6f1c0430 4430#define EC_FP_FLAG_NOT_COMPLETE 0x1
88364387 4431
6f1c0430
SG
4432struct __ec_align2 ec_params_fp_passthru {
4433 uint16_t len; /* Number of bytes to write then read */
4434 uint16_t flags; /* EC_FP_FLAG_xxx */
4435 uint8_t data[]; /* Data to send */
4436};
88364387 4437
6f1c0430
SG
4438/* Fingerprint sensor configuration command: prototyping ONLY */
4439#define EC_CMD_FP_SENSOR_CONFIG 0x0401
88364387 4440
6f1c0430 4441#define EC_FP_SENSOR_CONFIG_MAX_REGS 16
88364387 4442
6f1c0430
SG
4443struct __ec_align2 ec_params_fp_sensor_config {
4444 uint8_t count; /* Number of setup registers */
4445 /*
4446 * the value to send to each of the 'count' setup registers
4447 * is stored in the 'data' array for 'len' bytes just after
4448 * the previous one.
4449 */
4450 uint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS];
4451 uint8_t data[];
4452};
88364387 4453
6f1c0430
SG
4454/* Configure the Fingerprint MCU behavior */
4455#define EC_CMD_FP_MODE 0x0402
4456
4457/* Put the sensor in its lowest power mode */
4458#define FP_MODE_DEEPSLEEP (1<<0)
4459/* Wait to see a finger on the sensor */
4460#define FP_MODE_FINGER_DOWN (1<<1)
4461/* Poll until the finger has left the sensor */
4462#define FP_MODE_FINGER_UP (1<<2)
4463/* Capture the current finger image */
4464#define FP_MODE_CAPTURE (1<<3)
4465/* special value: don't change anything just read back current mode */
4466#define FP_MODE_DONT_CHANGE (1<<31)
4467
4468struct __ec_align4 ec_params_fp_mode {
4469 uint32_t mode; /* as defined by FP_MODE_ constants */
4470 /* TBD */
4471};
b5279249 4472
6f1c0430
SG
4473struct __ec_align4 ec_response_fp_mode {
4474 uint32_t mode; /* as defined by FP_MODE_ constants */
4475 /* TBD */
4476};
b5279249 4477
6f1c0430
SG
4478/* Retrieve Fingerprint sensor information */
4479#define EC_CMD_FP_INFO 0x0403
4480
4481struct __ec_align2 ec_response_fp_info {
4482 /* Sensor identification */
4483 uint32_t vendor_id;
4484 uint32_t product_id;
4485 uint32_t model_id;
4486 uint32_t version;
4487 /* Image frame characteristics */
4488 uint32_t frame_size;
4489 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
4490 uint16_t width;
4491 uint16_t height;
4492 uint16_t bpp;
4493};
4494
4495/* Get the last captured finger frame: TODO: will be AES-encrypted */
4496#define EC_CMD_FP_FRAME 0x0404
4497
4498struct __ec_align4 ec_params_fp_frame {
4499 uint32_t offset;
4500 uint32_t size;
4501};
b5279249 4502
88364387 4503/*****************************************************************************/
6f1c0430 4504/* Touchpad MCU commands: range 0x0500-0x05FF */
88364387 4505
6f1c0430
SG
4506/* Perform touchpad self test */
4507#define EC_CMD_TP_SELF_TEST 0x0500
88364387 4508
6f1c0430
SG
4509/* Get number of frame types, and the size of each type */
4510#define EC_CMD_TP_FRAME_INFO 0x0501
4511
4512struct __ec_align4 ec_response_tp_frame_info {
4513 uint32_t n_frames;
4514 uint32_t frame_sizes[0];
88364387
HT
4515};
4516
6f1c0430
SG
4517/* Create a snapshot of current frame readings */
4518#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
88364387 4519
6f1c0430
SG
4520/* Read the frame */
4521#define EC_CMD_TP_FRAME_GET 0x0503
88364387 4522
6f1c0430
SG
4523struct __ec_align4 ec_params_tp_frame_get {
4524 uint32_t frame_index;
4525 uint32_t offset;
4526 uint32_t size;
4527};
88364387
HT
4528
4529/*****************************************************************************/
4530/*
6f1c0430
SG
4531 * Reserve a range of host commands for board-specific, experimental, or
4532 * special purpose features. These can be (re)used without updating this file.
88364387 4533 *
6f1c0430
SG
4534 * CAUTION: Don't go nuts with this. Shipping products should document ALL
4535 * their EC commands for easier development, testing, debugging, and support.
88364387 4536 *
6f1c0430
SG
4537 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
4538 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
88364387 4539 *
6f1c0430 4540 * In your experimental code, you may want to do something like this:
88364387 4541 *
6f1c0430
SG
4542 * #define EC_CMD_MAGIC_FOO 0x0000
4543 * #define EC_CMD_MAGIC_BAR 0x0001
4544 * #define EC_CMD_MAGIC_HEY 0x0002
88364387 4545 *
6f1c0430
SG
4546 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
4547 * EC_VER_MASK(0);
88364387 4548 *
6f1c0430
SG
4549 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
4550 * EC_VER_MASK(0);
88364387 4551 *
6f1c0430
SG
4552 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
4553 * EC_VER_MASK(0);
88364387 4554 */
6f1c0430
SG
4555#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
4556#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
88364387 4557
88364387 4558/*
6f1c0430
SG
4559 * Given the private host command offset, calculate the true private host
4560 * command value.
88364387 4561 */
6f1c0430
SG
4562#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
4563 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
88364387
HT
4564
4565/*****************************************************************************/
4566/*
6f1c0430 4567 * Passthru commands
88364387 4568 *
6f1c0430 4569 * Some platforms have sub-processors chained to each other. For example.
88364387 4570 *
6f1c0430 4571 * AP <--> EC <--> PD MCU
88364387 4572 *
6f1c0430
SG
4573 * The top 2 bits of the command number are used to indicate which device the
4574 * command is intended for. Device 0 is always the device receiving the
4575 * command; other device mapping is board-specific.
88364387 4576 *
6f1c0430
SG
4577 * When a device receives a command to be passed to a sub-processor, it passes
4578 * it on with the device number set back to 0. This allows the sub-processor
4579 * to remain blissfully unaware of whether the command originated on the next
4580 * device up the chain, or was passed through from the AP.
4581 *
4582 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
4583 * AP sends command 0x4002 to the EC
4584 * EC sends command 0x0002 to the PD MCU
4585 * EC forwards PD MCU response back to the AP
88364387 4586 */
88364387 4587
6f1c0430
SG
4588/* Offset and max command number for sub-device n */
4589#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
4590#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
4591
4592/*****************************************************************************/
88364387 4593/*
6f1c0430
SG
4594 * Deprecated constants. These constants have been renamed for clarity. The
4595 * meaning and size has not changed. Programs that use the old names should
4596 * switch to the new names soon, as the old names may not be carried forward
4597 * forever.
88364387 4598 */
6f1c0430
SG
4599#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
4600#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
4601#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
88364387 4602
6f1c0430 4603#endif /* !__ACPI__ && !__KERNEL__ */
88364387
HT
4604
4605#endif /* __CROS_EC_COMMANDS_H */