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1/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
2 * Use of this source code is governed by a BSD-style license that can be
3 * found in the LICENSE file.
4 */
5
6/* Host communication command constants for Chrome EC */
7
8#ifndef __CROS_EC_COMMANDS_H
9#define __CROS_EC_COMMANDS_H
10
11/*
12 * Protocol overview
13 *
14 * request: CMD [ P0 P1 P2 ... Pn S ]
15 * response: ERR [ P0 P1 P2 ... Pn S ]
16 *
17 * where the bytes are defined as follow :
18 * - CMD is the command code. (defined by EC_CMD_ constants)
19 * - ERR is the error code. (defined by EC_RES_ constants)
20 * - Px is the optional payload.
21 * it is not sent if the error code is not success.
22 * (defined by ec_params_ and ec_response_ structures)
23 * - S is the checksum which is the sum of all payload bytes.
24 *
25 * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD
26 * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM.
27 * On I2C, all bytes are sent serially in the same message.
28 */
29
30/* Current version of this protocol */
31#define EC_PROTO_VERSION 0x00000002
32
33/* Command version mask */
34#define EC_VER_MASK(version) (1UL << (version))
35
36/* I/O addresses for ACPI commands */
37#define EC_LPC_ADDR_ACPI_DATA 0x62
38#define EC_LPC_ADDR_ACPI_CMD 0x66
39
40/* I/O addresses for host command */
41#define EC_LPC_ADDR_HOST_DATA 0x200
42#define EC_LPC_ADDR_HOST_CMD 0x204
43
44/* I/O addresses for host command args and params */
45#define EC_LPC_ADDR_HOST_ARGS 0x800
46#define EC_LPC_ADDR_HOST_PARAM 0x804
47#define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */
48
49/* I/O addresses for host command params, old interface */
50#define EC_LPC_ADDR_OLD_PARAM 0x880
51#define EC_OLD_PARAM_SIZE 0x080 /* Size of param area in bytes */
52
53/* EC command register bit functions */
54#define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
55#define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
56#define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */
57#define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */
58#define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */
59#define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */
60#define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */
61
62#define EC_LPC_ADDR_MEMMAP 0x900
63#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
64#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
65
66/* The offset address of each type of data in mapped memory. */
67#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */
68#define EC_MEMMAP_FAN 0x10 /* Fan speeds */
69#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */
70#define EC_MEMMAP_ID 0x20 /* 'E' 'C' */
71#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
72#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
73#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
74#define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
75#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
76#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */
77#define EC_MEMMAP_SWITCHES 0x30
78#define EC_MEMMAP_HOST_EVENTS 0x34
79#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
80#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
81#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
82#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */
83#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
84#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
85#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
86#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
87#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
88#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
89#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
90#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
91
92/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
93#define EC_TEMP_SENSOR_ENTRIES 16
94/*
95 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
96 *
97 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
98 */
99#define EC_TEMP_SENSOR_B_ENTRIES 8
100#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
101#define EC_TEMP_SENSOR_ERROR 0xfe
102#define EC_TEMP_SENSOR_NOT_POWERED 0xfd
103#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
104/*
105 * The offset of temperature value stored in mapped memory. This allows
106 * reporting a temperature range of 200K to 454K = -73C to 181C.
107 */
108#define EC_TEMP_SENSOR_OFFSET 200
109
110#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
111#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
112#define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
113
114/* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
115#define EC_BATT_FLAG_AC_PRESENT 0x01
116#define EC_BATT_FLAG_BATT_PRESENT 0x02
117#define EC_BATT_FLAG_DISCHARGING 0x04
118#define EC_BATT_FLAG_CHARGING 0x08
119#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
120
121/* Switch flags at EC_MEMMAP_SWITCHES */
122#define EC_SWITCH_LID_OPEN 0x01
123#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
124#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
125/* Recovery requested via keyboard */
126#define EC_SWITCH_KEYBOARD_RECOVERY 0x08
127/* Recovery requested via dedicated signal (from servo board) */
128#define EC_SWITCH_DEDICATED_RECOVERY 0x10
129/* Was fake developer mode switch; now unused. Remove in next refactor. */
130#define EC_SWITCH_IGNORE0 0x20
131
132/* Host command interface flags */
133/* Host command interface supports LPC args (LPC interface only) */
134#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
135
136/* Wireless switch flags */
137#define EC_WIRELESS_SWITCH_WLAN 0x01
138#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02
139
140/*
141 * This header file is used in coreboot both in C and ACPI code. The ACPI code
142 * is pre-processed to handle constants but the ASL compiler is unable to
143 * handle actual C code so keep it separate.
144 */
145#ifndef __ACPI__
146
147/*
148 * Define __packed if someone hasn't beat us to it. Linux kernel style
149 * checking prefers __packed over __attribute__((packed)).
150 */
151#ifndef __packed
152#define __packed __attribute__((packed))
153#endif
154
155/* LPC command status byte masks */
156/* EC has written a byte in the data register and host hasn't read it yet */
157#define EC_LPC_STATUS_TO_HOST 0x01
158/* Host has written a command/data byte and the EC hasn't read it yet */
159#define EC_LPC_STATUS_FROM_HOST 0x02
160/* EC is processing a command */
161#define EC_LPC_STATUS_PROCESSING 0x04
162/* Last write to EC was a command, not data */
163#define EC_LPC_STATUS_LAST_CMD 0x08
164/* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */
165#define EC_LPC_STATUS_BURST_MODE 0x10
166/* SCI event is pending (requesting SCI query) */
167#define EC_LPC_STATUS_SCI_PENDING 0x20
168/* SMI event is pending (requesting SMI query) */
169#define EC_LPC_STATUS_SMI_PENDING 0x40
170/* (reserved) */
171#define EC_LPC_STATUS_RESERVED 0x80
172
173/*
174 * EC is busy. This covers both the EC processing a command, and the host has
175 * written a new command but the EC hasn't picked it up yet.
176 */
177#define EC_LPC_STATUS_BUSY_MASK \
178 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
179
180/* Host command response codes */
181enum ec_status {
182 EC_RES_SUCCESS = 0,
183 EC_RES_INVALID_COMMAND = 1,
184 EC_RES_ERROR = 2,
185 EC_RES_INVALID_PARAM = 3,
186 EC_RES_ACCESS_DENIED = 4,
187 EC_RES_INVALID_RESPONSE = 5,
188 EC_RES_INVALID_VERSION = 6,
189 EC_RES_INVALID_CHECKSUM = 7,
190 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */
191 EC_RES_UNAVAILABLE = 9, /* No response available */
192 EC_RES_TIMEOUT = 10, /* We got a timeout */
193 EC_RES_OVERFLOW = 11, /* Table / data overflow */
194};
195
196/*
197 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
198 * EC command uses code 0 to mean "no event pending". We explicitly specify
199 * each value in the enum listing so they won't change if we delete/insert an
200 * item or rearrange the list (it needs to be stable across platforms, not
201 * just within a single compiled instance).
202 */
203enum host_event_code {
204 EC_HOST_EVENT_LID_CLOSED = 1,
205 EC_HOST_EVENT_LID_OPEN = 2,
206 EC_HOST_EVENT_POWER_BUTTON = 3,
207 EC_HOST_EVENT_AC_CONNECTED = 4,
208 EC_HOST_EVENT_AC_DISCONNECTED = 5,
209 EC_HOST_EVENT_BATTERY_LOW = 6,
210 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
211 EC_HOST_EVENT_BATTERY = 8,
212 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
213 EC_HOST_EVENT_THERMAL_OVERLOAD = 10,
214 EC_HOST_EVENT_THERMAL = 11,
215 EC_HOST_EVENT_USB_CHARGER = 12,
216 EC_HOST_EVENT_KEY_PRESSED = 13,
217 /*
218 * EC has finished initializing the host interface. The host can check
219 * for this event following sending a EC_CMD_REBOOT_EC command to
220 * determine when the EC is ready to accept subsequent commands.
221 */
222 EC_HOST_EVENT_INTERFACE_READY = 14,
223 /* Keyboard recovery combo has been pressed */
224 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
225
226 /* Shutdown due to thermal overload */
227 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
228 /* Shutdown due to battery level too low */
229 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
230
231 /*
232 * The high bit of the event mask is not used as a host event code. If
233 * it reads back as set, then the entire event mask should be
234 * considered invalid by the host. This can happen when reading the
235 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
236 * not initialized on the EC, or improperly configured on the host.
237 */
238 EC_HOST_EVENT_INVALID = 32
239};
240/* Host event mask */
241#define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1))
242
243/* Arguments at EC_LPC_ADDR_HOST_ARGS */
244struct ec_lpc_host_args {
245 uint8_t flags;
246 uint8_t command_version;
247 uint8_t data_size;
248 /*
249 * Checksum; sum of command + flags + command_version + data_size +
250 * all params/response data bytes.
251 */
252 uint8_t checksum;
253} __packed;
254
255/* Flags for ec_lpc_host_args.flags */
256/*
257 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
258 * params.
259 *
260 * If EC gets a command and this flag is not set, this is an old-style command.
261 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
262 * unknown length. EC must respond with an old-style response (that is,
263 * withouth setting EC_HOST_ARGS_FLAG_TO_HOST).
264 */
265#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
266/*
267 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
268 *
269 * If EC responds to a command and this flag is not set, this is an old-style
270 * response. Command version is 0 and response data from EC is at
271 * EC_LPC_ADDR_OLD_PARAM with unknown length.
272 */
273#define EC_HOST_ARGS_FLAG_TO_HOST 0x02
274
275/*
276 * Notes on commands:
277 *
278 * Each command is an 8-byte command value. Commands which take params or
279 * return response data specify structs for that data. If no struct is
280 * specified, the command does not input or output data, respectively.
281 * Parameter/response length is implicit in the structs. Some underlying
282 * communication protocols (I2C, SPI) may add length or checksum headers, but
283 * those are implementation-dependent and not defined here.
284 */
285
286/*****************************************************************************/
287/* General / test commands */
288
289/*
290 * Get protocol version, used to deal with non-backward compatible protocol
291 * changes.
292 */
293#define EC_CMD_PROTO_VERSION 0x00
294
295struct ec_response_proto_version {
296 uint32_t version;
297} __packed;
298
299/*
300 * Hello. This is a simple command to test the EC is responsive to
301 * commands.
302 */
303#define EC_CMD_HELLO 0x01
304
305struct ec_params_hello {
306 uint32_t in_data; /* Pass anything here */
307} __packed;
308
309struct ec_response_hello {
310 uint32_t out_data; /* Output will be in_data + 0x01020304 */
311} __packed;
312
313/* Get version number */
314#define EC_CMD_GET_VERSION 0x02
315
316enum ec_current_image {
317 EC_IMAGE_UNKNOWN = 0,
318 EC_IMAGE_RO,
319 EC_IMAGE_RW
320};
321
322struct ec_response_get_version {
323 /* Null-terminated version strings for RO, RW */
324 char version_string_ro[32];
325 char version_string_rw[32];
326 char reserved[32]; /* Was previously RW-B string */
327 uint32_t current_image; /* One of ec_current_image */
328} __packed;
329
330/* Read test */
331#define EC_CMD_READ_TEST 0x03
332
333struct ec_params_read_test {
334 uint32_t offset; /* Starting value for read buffer */
335 uint32_t size; /* Size to read in bytes */
336} __packed;
337
338struct ec_response_read_test {
339 uint32_t data[32];
340} __packed;
341
342/*
343 * Get build information
344 *
345 * Response is null-terminated string.
346 */
347#define EC_CMD_GET_BUILD_INFO 0x04
348
349/* Get chip info */
350#define EC_CMD_GET_CHIP_INFO 0x05
351
352struct ec_response_get_chip_info {
353 /* Null-terminated strings */
354 char vendor[32];
355 char name[32];
356 char revision[32]; /* Mask version */
357} __packed;
358
359/* Get board HW version */
360#define EC_CMD_GET_BOARD_VERSION 0x06
361
362struct ec_response_board_version {
363 uint16_t board_version; /* A monotonously incrementing number. */
364} __packed;
365
366/*
367 * Read memory-mapped data.
368 *
369 * This is an alternate interface to memory-mapped data for bus protocols
370 * which don't support direct-mapped memory - I2C, SPI, etc.
371 *
372 * Response is params.size bytes of data.
373 */
374#define EC_CMD_READ_MEMMAP 0x07
375
376struct ec_params_read_memmap {
377 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */
378 uint8_t size; /* Size to read in bytes */
379} __packed;
380
381/* Read versions supported for a command */
382#define EC_CMD_GET_CMD_VERSIONS 0x08
383
384struct ec_params_get_cmd_versions {
385 uint8_t cmd; /* Command to check */
386} __packed;
387
388struct ec_response_get_cmd_versions {
389 /*
390 * Mask of supported versions; use EC_VER_MASK() to compare with a
391 * desired version.
392 */
393 uint32_t version_mask;
394} __packed;
395
396/*
397 * Check EC communcations status (busy). This is needed on i2c/spi but not
398 * on lpc since it has its own out-of-band busy indicator.
399 *
400 * lpc must read the status from the command register. Attempting this on
401 * lpc will overwrite the args/parameter space and corrupt its data.
402 */
403#define EC_CMD_GET_COMMS_STATUS 0x09
404
405/* Avoid using ec_status which is for return values */
406enum ec_comms_status {
407 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */
408};
409
410struct ec_response_get_comms_status {
411 uint32_t flags; /* Mask of enum ec_comms_status */
412} __packed;
413
414
415/*****************************************************************************/
416/* Flash commands */
417
418/* Get flash info */
419#define EC_CMD_FLASH_INFO 0x10
420
421struct ec_response_flash_info {
422 /* Usable flash size, in bytes */
423 uint32_t flash_size;
424 /*
425 * Write block size. Write offset and size must be a multiple
426 * of this.
427 */
428 uint32_t write_block_size;
429 /*
430 * Erase block size. Erase offset and size must be a multiple
431 * of this.
432 */
433 uint32_t erase_block_size;
434 /*
435 * Protection block size. Protection offset and size must be a
436 * multiple of this.
437 */
438 uint32_t protect_block_size;
439} __packed;
440
441/*
442 * Read flash
443 *
444 * Response is params.size bytes of data.
445 */
446#define EC_CMD_FLASH_READ 0x11
447
448struct ec_params_flash_read {
449 uint32_t offset; /* Byte offset to read */
450 uint32_t size; /* Size to read in bytes */
451} __packed;
452
453/* Write flash */
454#define EC_CMD_FLASH_WRITE 0x12
455
456struct ec_params_flash_write {
457 uint32_t offset; /* Byte offset to write */
458 uint32_t size; /* Size to write in bytes */
459 /*
460 * Data to write. Could really use EC_PARAM_SIZE - 8, but tidiest to
461 * use a power of 2 so writes stay aligned.
462 */
463 uint8_t data[64];
464} __packed;
465
466/* Erase flash */
467#define EC_CMD_FLASH_ERASE 0x13
468
469struct ec_params_flash_erase {
470 uint32_t offset; /* Byte offset to erase */
471 uint32_t size; /* Size to erase in bytes */
472} __packed;
473
474/*
475 * Get/set flash protection.
476 *
477 * If mask!=0, sets/clear the requested bits of flags. Depending on the
478 * firmware write protect GPIO, not all flags will take effect immediately;
479 * some flags require a subsequent hard reset to take effect. Check the
480 * returned flags bits to see what actually happened.
481 *
482 * If mask=0, simply returns the current flags state.
483 */
484#define EC_CMD_FLASH_PROTECT 0x15
485#define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
486
487/* Flags for flash protection */
488/* RO flash code protected when the EC boots */
489#define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0)
490/*
491 * RO flash code protected now. If this bit is set, at-boot status cannot
492 * be changed.
493 */
494#define EC_FLASH_PROTECT_RO_NOW (1 << 1)
495/* Entire flash code protected now, until reboot. */
496#define EC_FLASH_PROTECT_ALL_NOW (1 << 2)
497/* Flash write protect GPIO is asserted now */
498#define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3)
499/* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
500#define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4)
501/*
502 * Error - flash protection is in inconsistent state. At least one bank of
503 * flash which should be protected is not protected. Usually fixed by
504 * re-requesting the desired flags, or by a hard reset if that fails.
505 */
506#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
507/* Entile flash code protected when the EC boots */
508#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)
509
510struct ec_params_flash_protect {
511 uint32_t mask; /* Bits in flags to apply */
512 uint32_t flags; /* New flags to apply */
513} __packed;
514
515struct ec_response_flash_protect {
516 /* Current value of flash protect flags */
517 uint32_t flags;
518 /*
519 * Flags which are valid on this platform. This allows the caller
520 * to distinguish between flags which aren't set vs. flags which can't
521 * be set on this platform.
522 */
523 uint32_t valid_flags;
524 /* Flags which can be changed given the current protection state */
525 uint32_t writable_flags;
526} __packed;
527
528/*
529 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
530 * write protect. These commands may be reused with version > 0.
531 */
532
533/* Get the region offset/size */
534#define EC_CMD_FLASH_REGION_INFO 0x16
535#define EC_VER_FLASH_REGION_INFO 1
536
537enum ec_flash_region {
538 /* Region which holds read-only EC image */
cecb19c0 539 EC_FLASH_REGION_RO = 0,
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540 /* Region which holds rewritable EC image */
541 EC_FLASH_REGION_RW,
542 /*
543 * Region which should be write-protected in the factory (a superset of
544 * EC_FLASH_REGION_RO)
545 */
546 EC_FLASH_REGION_WP_RO,
cecb19c0
SG
547 /* Number of regions */
548 EC_FLASH_REGION_COUNT,
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549};
550
551struct ec_params_flash_region_info {
552 uint32_t region; /* enum ec_flash_region */
553} __packed;
554
555struct ec_response_flash_region_info {
556 uint32_t offset;
557 uint32_t size;
558} __packed;
559
560/* Read/write VbNvContext */
561#define EC_CMD_VBNV_CONTEXT 0x17
562#define EC_VER_VBNV_CONTEXT 1
563#define EC_VBNV_BLOCK_SIZE 16
564
565enum ec_vbnvcontext_op {
566 EC_VBNV_CONTEXT_OP_READ,
567 EC_VBNV_CONTEXT_OP_WRITE,
568};
569
570struct ec_params_vbnvcontext {
571 uint32_t op;
572 uint8_t block[EC_VBNV_BLOCK_SIZE];
573} __packed;
574
575struct ec_response_vbnvcontext {
576 uint8_t block[EC_VBNV_BLOCK_SIZE];
577} __packed;
578
579/*****************************************************************************/
580/* PWM commands */
581
582/* Get fan target RPM */
583#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20
584
585struct ec_response_pwm_get_fan_rpm {
586 uint32_t rpm;
587} __packed;
588
589/* Set target fan RPM */
590#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21
591
592struct ec_params_pwm_set_fan_target_rpm {
593 uint32_t rpm;
594} __packed;
595
596/* Get keyboard backlight */
597#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22
598
599struct ec_response_pwm_get_keyboard_backlight {
600 uint8_t percent;
601 uint8_t enabled;
602} __packed;
603
604/* Set keyboard backlight */
605#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23
606
607struct ec_params_pwm_set_keyboard_backlight {
608 uint8_t percent;
609} __packed;
610
611/* Set target fan PWM duty cycle */
612#define EC_CMD_PWM_SET_FAN_DUTY 0x24
613
614struct ec_params_pwm_set_fan_duty {
615 uint32_t percent;
616} __packed;
617
618/*****************************************************************************/
619/*
620 * Lightbar commands. This looks worse than it is. Since we only use one HOST
621 * command to say "talk to the lightbar", we put the "and tell it to do X" part
622 * into a subcommand. We'll make separate structs for subcommands with
623 * different input args, so that we know how much to expect.
624 */
625#define EC_CMD_LIGHTBAR_CMD 0x28
626
627struct rgb_s {
628 uint8_t r, g, b;
629};
630
631#define LB_BATTERY_LEVELS 4
632/* List of tweakable parameters. NOTE: It's __packed so it can be sent in a
633 * host command, but the alignment is the same regardless. Keep it that way.
634 */
635struct lightbar_params {
636 /* Timing */
637 int google_ramp_up;
638 int google_ramp_down;
639 int s3s0_ramp_up;
640 int s0_tick_delay[2]; /* AC=0/1 */
641 int s0a_tick_delay[2]; /* AC=0/1 */
642 int s0s3_ramp_down;
643 int s3_sleep_for;
644 int s3_ramp_up;
645 int s3_ramp_down;
646
647 /* Oscillation */
648 uint8_t new_s0;
649 uint8_t osc_min[2]; /* AC=0/1 */
650 uint8_t osc_max[2]; /* AC=0/1 */
651 uint8_t w_ofs[2]; /* AC=0/1 */
652
653 /* Brightness limits based on the backlight and AC. */
654 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
655 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
656 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
657
658 /* Battery level thresholds */
659 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
660
661 /* Map [AC][battery_level] to color index */
662 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
663 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
664
665 /* Color palette */
666 struct rgb_s color[8]; /* 0-3 are Google colors */
667} __packed;
668
669struct ec_params_lightbar {
670 uint8_t cmd; /* Command (see enum lightbar_command) */
671 union {
672 struct {
673 /* no args */
674 } dump, off, on, init, get_seq, get_params;
675
676 struct num {
677 uint8_t num;
678 } brightness, seq, demo;
679
680 struct reg {
681 uint8_t ctrl, reg, value;
682 } reg;
683
684 struct rgb {
685 uint8_t led, red, green, blue;
686 } rgb;
687
688 struct lightbar_params set_params;
689 };
690} __packed;
691
692struct ec_response_lightbar {
693 union {
694 struct dump {
695 struct {
696 uint8_t reg;
697 uint8_t ic0;
698 uint8_t ic1;
699 } vals[23];
700 } dump;
701
702 struct get_seq {
703 uint8_t num;
704 } get_seq;
705
706 struct lightbar_params get_params;
707
708 struct {
709 /* no return params */
710 } off, on, init, brightness, seq, reg, rgb, demo, set_params;
711 };
712} __packed;
713
714/* Lightbar commands */
715enum lightbar_command {
716 LIGHTBAR_CMD_DUMP = 0,
717 LIGHTBAR_CMD_OFF = 1,
718 LIGHTBAR_CMD_ON = 2,
719 LIGHTBAR_CMD_INIT = 3,
720 LIGHTBAR_CMD_BRIGHTNESS = 4,
721 LIGHTBAR_CMD_SEQ = 5,
722 LIGHTBAR_CMD_REG = 6,
723 LIGHTBAR_CMD_RGB = 7,
724 LIGHTBAR_CMD_GET_SEQ = 8,
725 LIGHTBAR_CMD_DEMO = 9,
726 LIGHTBAR_CMD_GET_PARAMS = 10,
727 LIGHTBAR_CMD_SET_PARAMS = 11,
728 LIGHTBAR_NUM_CMDS
729};
730
731/*****************************************************************************/
732/* Verified boot commands */
733
734/*
735 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
736 * reused for other purposes with version > 0.
737 */
738
739/* Verified boot hash command */
740#define EC_CMD_VBOOT_HASH 0x2A
741
742struct ec_params_vboot_hash {
743 uint8_t cmd; /* enum ec_vboot_hash_cmd */
744 uint8_t hash_type; /* enum ec_vboot_hash_type */
745 uint8_t nonce_size; /* Nonce size; may be 0 */
746 uint8_t reserved0; /* Reserved; set 0 */
747 uint32_t offset; /* Offset in flash to hash */
748 uint32_t size; /* Number of bytes to hash */
749 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */
750} __packed;
751
752struct ec_response_vboot_hash {
753 uint8_t status; /* enum ec_vboot_hash_status */
754 uint8_t hash_type; /* enum ec_vboot_hash_type */
755 uint8_t digest_size; /* Size of hash digest in bytes */
756 uint8_t reserved0; /* Ignore; will be 0 */
757 uint32_t offset; /* Offset in flash which was hashed */
758 uint32_t size; /* Number of bytes hashed */
759 uint8_t hash_digest[64]; /* Hash digest data */
760} __packed;
761
762enum ec_vboot_hash_cmd {
763 EC_VBOOT_HASH_GET = 0, /* Get current hash status */
764 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */
765 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */
766 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */
767};
768
769enum ec_vboot_hash_type {
770 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
771};
772
773enum ec_vboot_hash_status {
774 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
775 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
776 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
777};
778
779/*
780 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
781 * If one of these is specified, the EC will automatically update offset and
782 * size to the correct values for the specified image (RO or RW).
783 */
784#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
785#define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd
786
787/*****************************************************************************/
788/* USB charging control commands */
789
790/* Set USB port charging mode */
791#define EC_CMD_USB_CHARGE_SET_MODE 0x30
792
793struct ec_params_usb_charge_set_mode {
794 uint8_t usb_port_id;
795 uint8_t mode;
796} __packed;
797
798/*****************************************************************************/
799/* Persistent storage for host */
800
801/* Maximum bytes that can be read/written in a single command */
802#define EC_PSTORE_SIZE_MAX 64
803
804/* Get persistent storage info */
805#define EC_CMD_PSTORE_INFO 0x40
806
807struct ec_response_pstore_info {
808 /* Persistent storage size, in bytes */
809 uint32_t pstore_size;
810 /* Access size; read/write offset and size must be a multiple of this */
811 uint32_t access_size;
812} __packed;
813
814/*
815 * Read persistent storage
816 *
817 * Response is params.size bytes of data.
818 */
819#define EC_CMD_PSTORE_READ 0x41
820
821struct ec_params_pstore_read {
822 uint32_t offset; /* Byte offset to read */
823 uint32_t size; /* Size to read in bytes */
824} __packed;
825
826/* Write persistent storage */
827#define EC_CMD_PSTORE_WRITE 0x42
828
829struct ec_params_pstore_write {
830 uint32_t offset; /* Byte offset to write */
831 uint32_t size; /* Size to write in bytes */
832 uint8_t data[EC_PSTORE_SIZE_MAX];
833} __packed;
834
835/*****************************************************************************/
836/* Real-time clock */
837
838/* RTC params and response structures */
839struct ec_params_rtc {
840 uint32_t time;
841} __packed;
842
843struct ec_response_rtc {
844 uint32_t time;
845} __packed;
846
847/* These use ec_response_rtc */
848#define EC_CMD_RTC_GET_VALUE 0x44
849#define EC_CMD_RTC_GET_ALARM 0x45
850
851/* These all use ec_params_rtc */
852#define EC_CMD_RTC_SET_VALUE 0x46
853#define EC_CMD_RTC_SET_ALARM 0x47
854
855/*****************************************************************************/
856/* Port80 log access */
857
858/* Get last port80 code from previous boot */
859#define EC_CMD_PORT80_LAST_BOOT 0x48
860
861struct ec_response_port80_last_boot {
862 uint16_t code;
863} __packed;
864
865/*****************************************************************************/
866/* Thermal engine commands */
867
868/* Set thershold value */
869#define EC_CMD_THERMAL_SET_THRESHOLD 0x50
870
871struct ec_params_thermal_set_threshold {
872 uint8_t sensor_type;
873 uint8_t threshold_id;
874 uint16_t value;
875} __packed;
876
877/* Get threshold value */
878#define EC_CMD_THERMAL_GET_THRESHOLD 0x51
879
880struct ec_params_thermal_get_threshold {
881 uint8_t sensor_type;
882 uint8_t threshold_id;
883} __packed;
884
885struct ec_response_thermal_get_threshold {
886 uint16_t value;
887} __packed;
888
889/* Toggle automatic fan control */
890#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52
891
892/* Get TMP006 calibration data */
893#define EC_CMD_TMP006_GET_CALIBRATION 0x53
894
895struct ec_params_tmp006_get_calibration {
896 uint8_t index;
897} __packed;
898
899struct ec_response_tmp006_get_calibration {
900 float s0;
901 float b0;
902 float b1;
903 float b2;
904} __packed;
905
906/* Set TMP006 calibration data */
907#define EC_CMD_TMP006_SET_CALIBRATION 0x54
908
909struct ec_params_tmp006_set_calibration {
910 uint8_t index;
911 uint8_t reserved[3]; /* Reserved; set 0 */
912 float s0;
913 float b0;
914 float b1;
915 float b2;
916} __packed;
917
918/*****************************************************************************/
919/* CROS_EC - Matrix KeyBoard Protocol */
920
921/*
922 * Read key state
923 *
924 * Returns raw data for keyboard cols; see ec_response_cros_ec_info.cols for
925 * expected response size.
926 */
927#define EC_CMD_CROS_EC_STATE 0x60
928
929/* Provide information about the matrix : number of rows and columns */
930#define EC_CMD_CROS_EC_INFO 0x61
931
932struct ec_response_cros_ec_info {
933 uint32_t rows;
934 uint32_t cols;
935 uint8_t switches;
936} __packed;
937
938/* Simulate key press */
939#define EC_CMD_CROS_EC_SIMULATE_KEY 0x62
940
941struct ec_params_cros_ec_simulate_key {
942 uint8_t col;
943 uint8_t row;
944 uint8_t pressed;
945} __packed;
946
947/* Configure keyboard scanning */
948#define EC_CMD_CROS_EC_SET_CONFIG 0x64
949#define EC_CMD_CROS_EC_GET_CONFIG 0x65
950
951/* flags */
952enum cros_ec_config_flags {
953 EC_CROS_EC_FLAGS_ENABLE = 1, /* Enable keyboard scanning */
954};
955
956enum cros_ec_config_valid {
957 EC_CROS_EC_VALID_SCAN_PERIOD = 1 << 0,
958 EC_CROS_EC_VALID_POLL_TIMEOUT = 1 << 1,
959 EC_CROS_EC_VALID_MIN_POST_SCAN_DELAY = 1 << 3,
960 EC_CROS_EC_VALID_OUTPUT_SETTLE = 1 << 4,
961 EC_CROS_EC_VALID_DEBOUNCE_DOWN = 1 << 5,
962 EC_CROS_EC_VALID_DEBOUNCE_UP = 1 << 6,
963 EC_CROS_EC_VALID_FIFO_MAX_DEPTH = 1 << 7,
964};
965
966/* Configuration for our key scanning algorithm */
967struct ec_cros_ec_config {
968 uint32_t valid_mask; /* valid fields */
969 uint8_t flags; /* some flags (enum cros_ec_config_flags) */
970 uint8_t valid_flags; /* which flags are valid */
971 uint16_t scan_period_us; /* period between start of scans */
972 /* revert to interrupt mode after no activity for this long */
973 uint32_t poll_timeout_us;
974 /*
975 * minimum post-scan relax time. Once we finish a scan we check
976 * the time until we are due to start the next one. If this time is
977 * shorter this field, we use this instead.
978 */
979 uint16_t min_post_scan_delay_us;
980 /* delay between setting up output and waiting for it to settle */
981 uint16_t output_settle_us;
982 uint16_t debounce_down_us; /* time for debounce on key down */
983 uint16_t debounce_up_us; /* time for debounce on key up */
984 /* maximum depth to allow for fifo (0 = no keyscan output) */
985 uint8_t fifo_max_depth;
986} __packed;
987
988struct ec_params_cros_ec_set_config {
989 struct ec_cros_ec_config config;
990} __packed;
991
992struct ec_response_cros_ec_get_config {
993 struct ec_cros_ec_config config;
994} __packed;
995
996/* Run the key scan emulation */
997#define EC_CMD_KEYSCAN_SEQ_CTRL 0x66
998
999enum ec_keyscan_seq_cmd {
1000 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */
1001 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */
1002 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */
1003 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */
1004 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */
1005};
1006
1007enum ec_collect_flags {
1008 /*
1009 * Indicates this scan was processed by the EC. Due to timing, some
1010 * scans may be skipped.
1011 */
1012 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0,
1013};
1014
1015struct ec_collect_item {
1016 uint8_t flags; /* some flags (enum ec_collect_flags) */
1017};
1018
1019struct ec_params_keyscan_seq_ctrl {
1020 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */
1021 union {
1022 struct {
1023 uint8_t active; /* still active */
1024 uint8_t num_items; /* number of items */
1025 /* Current item being presented */
1026 uint8_t cur_item;
1027 } status;
1028 struct {
1029 /*
1030 * Absolute time for this scan, measured from the
1031 * start of the sequence.
1032 */
1033 uint32_t time_us;
1034 uint8_t scan[0]; /* keyscan data */
1035 } add;
1036 struct {
1037 uint8_t start_item; /* First item to return */
1038 uint8_t num_items; /* Number of items to return */
1039 } collect;
1040 };
1041} __packed;
1042
1043struct ec_result_keyscan_seq_ctrl {
1044 union {
1045 struct {
1046 uint8_t num_items; /* Number of items */
1047 /* Data for each item */
1048 struct ec_collect_item item[0];
1049 } collect;
1050 };
1051} __packed;
1052
1053/*****************************************************************************/
1054/* Temperature sensor commands */
1055
1056/* Read temperature sensor info */
1057#define EC_CMD_TEMP_SENSOR_GET_INFO 0x70
1058
1059struct ec_params_temp_sensor_get_info {
1060 uint8_t id;
1061} __packed;
1062
1063struct ec_response_temp_sensor_get_info {
1064 char sensor_name[32];
1065 uint8_t sensor_type;
1066} __packed;
1067
1068/*****************************************************************************/
1069
1070/*
1071 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
1072 * commands accidentally sent to the wrong interface. See the ACPI section
1073 * below.
1074 */
1075
1076/*****************************************************************************/
1077/* Host event commands */
1078
1079/*
1080 * Host event mask params and response structures, shared by all of the host
1081 * event commands below.
1082 */
1083struct ec_params_host_event_mask {
1084 uint32_t mask;
1085} __packed;
1086
1087struct ec_response_host_event_mask {
1088 uint32_t mask;
1089} __packed;
1090
1091/* These all use ec_response_host_event_mask */
1092#define EC_CMD_HOST_EVENT_GET_B 0x87
1093#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88
1094#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89
1095#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d
1096
1097/* These all use ec_params_host_event_mask */
1098#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a
1099#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b
1100#define EC_CMD_HOST_EVENT_CLEAR 0x8c
1101#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e
1102#define EC_CMD_HOST_EVENT_CLEAR_B 0x8f
1103
1104/*****************************************************************************/
1105/* Switch commands */
1106
1107/* Enable/disable LCD backlight */
1108#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90
1109
1110struct ec_params_switch_enable_backlight {
1111 uint8_t enabled;
1112} __packed;
1113
1114/* Enable/disable WLAN/Bluetooth */
1115#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91
1116
1117struct ec_params_switch_enable_wireless {
1118 uint8_t enabled;
1119} __packed;
1120
1121/*****************************************************************************/
1122/* GPIO commands. Only available on EC if write protect has been disabled. */
1123
1124/* Set GPIO output value */
1125#define EC_CMD_GPIO_SET 0x92
1126
1127struct ec_params_gpio_set {
1128 char name[32];
1129 uint8_t val;
1130} __packed;
1131
1132/* Get GPIO value */
1133#define EC_CMD_GPIO_GET 0x93
1134
1135struct ec_params_gpio_get {
1136 char name[32];
1137} __packed;
1138struct ec_response_gpio_get {
1139 uint8_t val;
1140} __packed;
1141
1142/*****************************************************************************/
1143/* I2C commands. Only available when flash write protect is unlocked. */
1144
1145/* Read I2C bus */
1146#define EC_CMD_I2C_READ 0x94
1147
1148struct ec_params_i2c_read {
1149 uint16_t addr;
1150 uint8_t read_size; /* Either 8 or 16. */
1151 uint8_t port;
1152 uint8_t offset;
1153} __packed;
1154struct ec_response_i2c_read {
1155 uint16_t data;
1156} __packed;
1157
1158/* Write I2C bus */
1159#define EC_CMD_I2C_WRITE 0x95
1160
1161struct ec_params_i2c_write {
1162 uint16_t data;
1163 uint16_t addr;
1164 uint8_t write_size; /* Either 8 or 16. */
1165 uint8_t port;
1166 uint8_t offset;
1167} __packed;
1168
1169/*****************************************************************************/
1170/* Charge state commands. Only available when flash write protect unlocked. */
1171
1172/* Force charge state machine to stop in idle mode */
1173#define EC_CMD_CHARGE_FORCE_IDLE 0x96
1174
1175struct ec_params_force_idle {
1176 uint8_t enabled;
1177} __packed;
1178
1179/*****************************************************************************/
1180/* Console commands. Only available when flash write protect is unlocked. */
1181
1182/* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
1183#define EC_CMD_CONSOLE_SNAPSHOT 0x97
1184
1185/*
1186 * Read next chunk of data from saved snapshot.
1187 *
1188 * Response is null-terminated string. Empty string, if there is no more
1189 * remaining output.
1190 */
1191#define EC_CMD_CONSOLE_READ 0x98
1192
1193/*****************************************************************************/
1194
1195/*
1196 * Cut off battery power output if the battery supports.
1197 *
1198 * For unsupported battery, just don't implement this command and lets EC
1199 * return EC_RES_INVALID_COMMAND.
1200 */
1201#define EC_CMD_BATTERY_CUT_OFF 0x99
1202
1203/*****************************************************************************/
1204/* USB port mux control. */
1205
1206/*
1207 * Switch USB mux or return to automatic switching.
1208 */
1209#define EC_CMD_USB_MUX 0x9a
1210
1211struct ec_params_usb_mux {
1212 uint8_t mux;
1213} __packed;
1214
1215/*****************************************************************************/
1216/* LDOs / FETs control. */
1217
1218enum ec_ldo_state {
1219 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
1220 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */
1221};
1222
1223/*
1224 * Switch on/off a LDO.
1225 */
1226#define EC_CMD_LDO_SET 0x9b
1227
1228struct ec_params_ldo_set {
1229 uint8_t index;
1230 uint8_t state;
1231} __packed;
1232
1233/*
1234 * Get LDO state.
1235 */
1236#define EC_CMD_LDO_GET 0x9c
1237
1238struct ec_params_ldo_get {
1239 uint8_t index;
1240} __packed;
1241
1242struct ec_response_ldo_get {
1243 uint8_t state;
1244} __packed;
1245
1246/*****************************************************************************/
1247/* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */
1248
1249/*
1250 * Dump charge state machine context.
1251 *
1252 * Response is a binary dump of charge state machine context.
1253 */
1254#define EC_CMD_CHARGE_DUMP 0xa0
1255
1256/*
1257 * Set maximum battery charging current.
1258 */
1259#define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1
1260
1261struct ec_params_current_limit {
1262 uint32_t limit;
1263} __packed;
1264
1265/*****************************************************************************/
1266/* Smart battery pass-through */
1267
1268/* Get / Set 16-bit smart battery registers */
1269#define EC_CMD_SB_READ_WORD 0xb0
1270#define EC_CMD_SB_WRITE_WORD 0xb1
1271
1272/* Get / Set string smart battery parameters
1273 * formatted as SMBUS "block".
1274 */
1275#define EC_CMD_SB_READ_BLOCK 0xb2
1276#define EC_CMD_SB_WRITE_BLOCK 0xb3
1277
1278struct ec_params_sb_rd {
1279 uint8_t reg;
1280} __packed;
1281
1282struct ec_response_sb_rd_word {
1283 uint16_t value;
1284} __packed;
1285
1286struct ec_params_sb_wr_word {
1287 uint8_t reg;
1288 uint16_t value;
1289} __packed;
1290
1291struct ec_response_sb_rd_block {
1292 uint8_t data[32];
1293} __packed;
1294
1295struct ec_params_sb_wr_block {
1296 uint8_t reg;
1297 uint16_t data[32];
1298} __packed;
1299
1300/*****************************************************************************/
1301/* System commands */
1302
1303/*
1304 * TODO: this is a confusing name, since it doesn't necessarily reboot the EC.
1305 * Rename to "set image" or something similar.
1306 */
1307#define EC_CMD_REBOOT_EC 0xd2
1308
1309/* Command */
1310enum ec_reboot_cmd {
1311 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */
1312 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */
1313 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */
1314 /* (command 3 was jump to RW-B) */
1315 EC_REBOOT_COLD = 4, /* Cold-reboot */
1316 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */
1317 EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */
1318};
1319
1320/* Flags for ec_params_reboot_ec.reboot_flags */
1321#define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */
1322#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */
1323
1324struct ec_params_reboot_ec {
1325 uint8_t cmd; /* enum ec_reboot_cmd */
1326 uint8_t flags; /* See EC_REBOOT_FLAG_* */
1327} __packed;
1328
1329/*
1330 * Get information on last EC panic.
1331 *
1332 * Returns variable-length platform-dependent panic information. See panic.h
1333 * for details.
1334 */
1335#define EC_CMD_GET_PANIC_INFO 0xd3
1336
1337/*****************************************************************************/
1338/*
1339 * ACPI commands
1340 *
1341 * These are valid ONLY on the ACPI command/data port.
1342 */
1343
1344/*
1345 * ACPI Read Embedded Controller
1346 *
1347 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
1348 *
1349 * Use the following sequence:
1350 *
1351 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
1352 * - Wait for EC_LPC_CMDR_PENDING bit to clear
1353 * - Write address to EC_LPC_ADDR_ACPI_DATA
1354 * - Wait for EC_LPC_CMDR_DATA bit to set
1355 * - Read value from EC_LPC_ADDR_ACPI_DATA
1356 */
1357#define EC_CMD_ACPI_READ 0x80
1358
1359/*
1360 * ACPI Write Embedded Controller
1361 *
1362 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
1363 *
1364 * Use the following sequence:
1365 *
1366 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
1367 * - Wait for EC_LPC_CMDR_PENDING bit to clear
1368 * - Write address to EC_LPC_ADDR_ACPI_DATA
1369 * - Wait for EC_LPC_CMDR_PENDING bit to clear
1370 * - Write value to EC_LPC_ADDR_ACPI_DATA
1371 */
1372#define EC_CMD_ACPI_WRITE 0x81
1373
1374/*
1375 * ACPI Query Embedded Controller
1376 *
1377 * This clears the lowest-order bit in the currently pending host events, and
1378 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
1379 * event 0x80000000 = 32), or 0 if no event was pending.
1380 */
1381#define EC_CMD_ACPI_QUERY_EVENT 0x84
1382
1383/* Valid addresses in ACPI memory space, for read/write commands */
1384/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
1385#define EC_ACPI_MEM_VERSION 0x00
1386/*
1387 * Test location; writing value here updates test compliment byte to (0xff -
1388 * value).
1389 */
1390#define EC_ACPI_MEM_TEST 0x01
1391/* Test compliment; writes here are ignored. */
1392#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
1393/* Keyboard backlight brightness percent (0 - 100) */
1394#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
1395
1396/* Current version of ACPI memory address space */
1397#define EC_ACPI_MEM_VERSION_CURRENT 1
1398
1399
1400/*****************************************************************************/
1401/*
1402 * Special commands
1403 *
1404 * These do not follow the normal rules for commands. See each command for
1405 * details.
1406 */
1407
1408/*
1409 * Reboot NOW
1410 *
1411 * This command will work even when the EC LPC interface is busy, because the
1412 * reboot command is processed at interrupt level. Note that when the EC
1413 * reboots, the host will reboot too, so there is no response to this command.
1414 *
1415 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
1416 */
1417#define EC_CMD_REBOOT 0xd1 /* Think "die" */
1418
1419/*
1420 * Resend last response (not supported on LPC).
1421 *
1422 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
1423 * there was no previous command, or the previous command's response was too
1424 * big to save.
1425 */
1426#define EC_CMD_RESEND_RESPONSE 0xdb
1427
1428/*
1429 * This header byte on a command indicate version 0. Any header byte less
1430 * than this means that we are talking to an old EC which doesn't support
1431 * versioning. In that case, we assume version 0.
1432 *
1433 * Header bytes greater than this indicate a later version. For example,
1434 * EC_CMD_VERSION0 + 1 means we are using version 1.
1435 *
1436 * The old EC interface must not use commands 0dc or higher.
1437 */
1438#define EC_CMD_VERSION0 0xdc
1439
1440#endif /* !__ACPI__ */
1441
1442#endif /* __CROS_EC_COMMANDS_H */