[people/ms/u-boot.git] / include / fsl_esdhc.h

/*
 * FSL SD/MMC Defines
 *-------------------------------------------------------------------
 *
 * Copyright 2007-2008, Freescale Semiconductor, Inc
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 *-------------------------------------------------------------------
 *
 */

#ifndef  __FSL_ESDHC_H__
#define	__FSL_ESDHC_H__

/* FSL eSDHC-specific constants */
#define SYSCTL			0x0002e02c
#define SYSCTL_INITA		0x08000000
#define SYSCTL_TIMEOUT_MASK	0x000f0000
#define SYSCTL_CLOCK_MASK	0x00000fff
#define SYSCTL_PEREN		0x00000004
#define SYSCTL_HCKEN		0x00000002
#define SYSCTL_IPGEN		0x00000001

#define IRQSTAT			0x0002e030
#define IRQSTAT_DMAE		(0x10000000)
#define IRQSTAT_AC12E		(0x01000000)
#define IRQSTAT_DEBE		(0x00400000)
#define IRQSTAT_DCE		(0x00200000)
#define IRQSTAT_DTOE		(0x00100000)
#define IRQSTAT_CIE		(0x00080000)
#define IRQSTAT_CEBE		(0x00040000)
#define IRQSTAT_CCE		(0x00020000)
#define IRQSTAT_CTOE		(0x00010000)
#define IRQSTAT_CINT		(0x00000100)
#define IRQSTAT_CRM		(0x00000080)
#define IRQSTAT_CINS		(0x00000040)
#define IRQSTAT_BRR		(0x00000020)
#define IRQSTAT_BWR		(0x00000010)
#define IRQSTAT_DINT		(0x00000008)
#define IRQSTAT_BGE		(0x00000004)
#define IRQSTAT_TC		(0x00000002)
#define IRQSTAT_CC		(0x00000001)

#define CMD_ERR		(IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
#define DATA_ERR	(IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE)

#define IRQSTATEN		0x0002e034
#define IRQSTATEN_DMAE		(0x10000000)
#define IRQSTATEN_AC12E		(0x01000000)
#define IRQSTATEN_DEBE		(0x00400000)
#define IRQSTATEN_DCE		(0x00200000)
#define IRQSTATEN_DTOE		(0x00100000)
#define IRQSTATEN_CIE		(0x00080000)
#define IRQSTATEN_CEBE		(0x00040000)
#define IRQSTATEN_CCE		(0x00020000)
#define IRQSTATEN_CTOE		(0x00010000)
#define IRQSTATEN_CINT		(0x00000100)
#define IRQSTATEN_CRM		(0x00000080)
#define IRQSTATEN_CINS		(0x00000040)
#define IRQSTATEN_BRR		(0x00000020)
#define IRQSTATEN_BWR		(0x00000010)
#define IRQSTATEN_DINT		(0x00000008)
#define IRQSTATEN_BGE		(0x00000004)
#define IRQSTATEN_TC		(0x00000002)
#define IRQSTATEN_CC		(0x00000001)

#define PRSSTAT			0x0002e024
#define PRSSTAT_CLSL		(0x00800000)
#define PRSSTAT_WPSPL		(0x00080000)
#define PRSSTAT_CDPL		(0x00040000)
#define PRSSTAT_CINS		(0x00010000)
#define PRSSTAT_BREN		(0x00000800)
#define PRSSTAT_DLA		(0x00000004)
#define PRSSTAT_CICHB		(0x00000002)
#define PRSSTAT_CIDHB		(0x00000001)

#define PROCTL			0x0002e028
#define PROCTL_INIT		0x00000020
#define PROCTL_DTW_4		0x00000002
#define PROCTL_DTW_8		0x00000004

#define CMDARG			0x0002e008

#define XFERTYP			0x0002e00c
#define XFERTYP_CMD(x)		((x & 0x3f) << 24)
#define XFERTYP_CMDTYP_NORMAL	0x0
#define XFERTYP_CMDTYP_SUSPEND	0x00400000
#define XFERTYP_CMDTYP_RESUME	0x00800000
#define XFERTYP_CMDTYP_ABORT	0x00c00000
#define XFERTYP_DPSEL		0x00200000
#define XFERTYP_CICEN		0x00100000
#define XFERTYP_CCCEN		0x00080000
#define XFERTYP_RSPTYP_NONE	0
#define XFERTYP_RSPTYP_136	0x00010000
#define XFERTYP_RSPTYP_48	0x00020000
#define XFERTYP_RSPTYP_48_BUSY	0x00030000
#define XFERTYP_MSBSEL		0x00000020
#define XFERTYP_DTDSEL		0x00000010
#define XFERTYP_AC12EN		0x00000004
#define XFERTYP_BCEN		0x00000002
#define XFERTYP_DMAEN		0x00000001

#define CINS_TIMEOUT		1000

#define DSADDR		0x2e004

#define CMDRSP0		0x2e010
#define CMDRSP1		0x2e014
#define CMDRSP2		0x2e018
#define CMDRSP3		0x2e01c

#define DATPORT		0x2e020

#define WML		0x2e044
#define WML_WRITE	0x00010000

#define BLKATTR		0x2e004
#define BLKATTR_CNT(x)	((x & 0xffff) << 16)
#define BLKATTR_SIZE(x)	(x & 0x1fff)
#define MAX_BLK_CNT	0x7fff	/* so malloc will have enough room with 32M */

#define ESDHC_HOSTCAPBLT_VS18	0x04000000
#define ESDHC_HOSTCAPBLT_VS30	0x02000000
#define ESDHC_HOSTCAPBLT_VS33	0x01000000
#define ESDHC_HOSTCAPBLT_SRS	0x00800000
#define ESDHC_HOSTCAPBLT_DMAS	0x00400000
#define ESDHC_HOSTCAPBLT_HSS	0x00200000

int fsl_esdhc_mmc_init(bd_t *bis);

#endif  /* __FSL_ESDHC_H__ */
Commit	Line	Data
50586ef2 AF	1	/*
	2	* FSL SD/MMC Defines
	3	*-------------------------------------------------------------------
	4	*
	5	* Copyright 2007-2008, Freescale Semiconductor, Inc
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License as
	9	* published by the Free Software Foundation; either version 2 of
	10	* the License, or (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	20	* MA 02111-1307 USA
	21	*
	22	*-------------------------------------------------------------------
	23	*
	24	*/
	25
	26	#ifndef __FSL_ESDHC_H__
	27	#define __FSL_ESDHC_H__
	28
	29	/* FSL eSDHC-specific constants */
	30	#define SYSCTL 0x0002e02c
	31	#define SYSCTL_INITA 0x08000000
	32	#define SYSCTL_TIMEOUT_MASK 0x000f0000
	33	#define SYSCTL_CLOCK_MASK 0x00000fff
	34	#define SYSCTL_PEREN 0x00000004
	35	#define SYSCTL_HCKEN 0x00000002
	36	#define SYSCTL_IPGEN 0x00000001
	37
	38	#define IRQSTAT 0x0002e030
	39	#define IRQSTAT_DMAE (0x10000000)
	40	#define IRQSTAT_AC12E (0x01000000)
	41	#define IRQSTAT_DEBE (0x00400000)
	42	#define IRQSTAT_DCE (0x00200000)
	43	#define IRQSTAT_DTOE (0x00100000)
	44	#define IRQSTAT_CIE (0x00080000)
	45	#define IRQSTAT_CEBE (0x00040000)
	46	#define IRQSTAT_CCE (0x00020000)
	47	#define IRQSTAT_CTOE (0x00010000)
	48	#define IRQSTAT_CINT (0x00000100)
	49	#define IRQSTAT_CRM (0x00000080)
	50	#define IRQSTAT_CINS (0x00000040)
	51	#define IRQSTAT_BRR (0x00000020)
	52	#define IRQSTAT_BWR (0x00000010)
	53	#define IRQSTAT_DINT (0x00000008)
	54	#define IRQSTAT_BGE (0x00000004)
	55	#define IRQSTAT_TC (0x00000002)
	56	#define IRQSTAT_CC (0x00000001)
	57
	58	#define CMD_ERR (IRQSTAT_CIE \| IRQSTAT_CEBE \| IRQSTAT_CCE)
	59	#define DATA_ERR (IRQSTAT_DEBE \| IRQSTAT_DCE \| IRQSTAT_DTOE)
	60
	61	#define IRQSTATEN 0x0002e034
	62	#define IRQSTATEN_DMAE (0x10000000)
	63	#define IRQSTATEN_AC12E (0x01000000)
	64	#define IRQSTATEN_DEBE (0x00400000)
65	#define IRQSTATEN_DCE (0x00200000)
66	#define IRQSTATEN_DTOE (0x00100000)
67	#define IRQSTATEN_CIE (0x00080000)
68	#define IRQSTATEN_CEBE (0x00040000)
69	#define IRQSTATEN_CCE (0x00020000)
70	#define IRQSTATEN_CTOE (0x00010000)
71	#define IRQSTATEN_CINT (0x00000100)
72	#define IRQSTATEN_CRM (0x00000080)
73	#define IRQSTATEN_CINS (0x00000040)
74	#define IRQSTATEN_BRR (0x00000020)
75	#define IRQSTATEN_BWR (0x00000010)
76	#define IRQSTATEN_DINT (0x00000008)
77	#define IRQSTATEN_BGE (0x00000004)
78	#define IRQSTATEN_TC (0x00000002)
79	#define IRQSTATEN_CC (0x00000001)
80
81	#define PRSSTAT 0x0002e024
82	#define PRSSTAT_CLSL (0x00800000)
83	#define PRSSTAT_WPSPL (0x00080000)
84	#define PRSSTAT_CDPL (0x00040000)
85	#define PRSSTAT_CINS (0x00010000)
86	#define PRSSTAT_BREN (0x00000800)
87	#define PRSSTAT_DLA (0x00000004)
88	#define PRSSTAT_CICHB (0x00000002)
89	#define PRSSTAT_CIDHB (0x00000001)
90
91	#define PROCTL 0x0002e028
92	#define PROCTL_INIT 0x00000020
93	#define PROCTL_DTW_4 0x00000002
94	#define PROCTL_DTW_8 0x00000004
95
96	#define CMDARG 0x0002e008
97
98	#define XFERTYP 0x0002e00c
99	#define XFERTYP_CMD(x) ((x & 0x3f) << 24)
100	#define XFERTYP_CMDTYP_NORMAL 0x0
101	#define XFERTYP_CMDTYP_SUSPEND 0x00400000
102	#define XFERTYP_CMDTYP_RESUME 0x00800000
103	#define XFERTYP_CMDTYP_ABORT 0x00c00000
104	#define XFERTYP_DPSEL 0x00200000
105	#define XFERTYP_CICEN 0x00100000
106	#define XFERTYP_CCCEN 0x00080000
107	#define XFERTYP_RSPTYP_NONE 0
108	#define XFERTYP_RSPTYP_136 0x00010000
109	#define XFERTYP_RSPTYP_48 0x00020000
110	#define XFERTYP_RSPTYP_48_BUSY 0x00030000
111	#define XFERTYP_MSBSEL 0x00000020
112	#define XFERTYP_DTDSEL 0x00000010
113	#define XFERTYP_AC12EN 0x00000004
114	#define XFERTYP_BCEN 0x00000002
115	#define XFERTYP_DMAEN 0x00000001
116
117	#define CINS_TIMEOUT 1000
118
119	#define DSADDR 0x2e004
120
121	#define CMDRSP0 0x2e010
122	#define CMDRSP1 0x2e014
123	#define CMDRSP2 0x2e018
124	#define CMDRSP3 0x2e01c
125
126	#define DATPORT 0x2e020
127
128	#define WML 0x2e044
129	#define WML_WRITE 0x00010000
130
131	#define BLKATTR 0x2e004
132	#define BLKATTR_CNT(x) ((x & 0xffff) << 16)
133	#define BLKATTR_SIZE(x) (x & 0x1fff)
134	#define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */
135
136	#define ESDHC_HOSTCAPBLT_VS18 0x04000000
137	#define ESDHC_HOSTCAPBLT_VS30 0x02000000
138	#define ESDHC_HOSTCAPBLT_VS33 0x01000000
139	#define ESDHC_HOSTCAPBLT_SRS 0x00800000
140	#define ESDHC_HOSTCAPBLT_DMAS 0x00400000
141	#define ESDHC_HOSTCAPBLT_HSS 0x00200000
142
143	int fsl_esdhc_mmc_init(bd_t *bis);
144
145	#endif /* __FSL_ESDHC_H__ */