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40c642bc ML |
1 | /* |
2 | * | |
3 | * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com> | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __FSL_NFC_H | |
25 | #define __FSL_NFC_H | |
26 | ||
27 | /* | |
28 | * Register map and bit definitions for the Freescale NAND Flash | |
29 | * Controller present in i.MX31 and other devices. | |
30 | */ | |
31 | ||
32 | struct fsl_nfc_regs { | |
33 | u32 main_area0[128]; /* @0x000 */ | |
34 | u32 main_area1[128]; | |
35 | u32 main_area2[128]; | |
36 | u32 main_area3[128]; | |
37 | u32 spare_area0[4]; | |
38 | u32 spare_area1[4]; | |
39 | u32 spare_area2[4]; | |
40 | u32 spare_area3[4]; | |
41 | u32 reserved1[64 - 16 + 64 * 5]; | |
42 | u16 bufsiz; /* @ 0xe00 */ | |
43 | u16 reserved2; | |
44 | u16 buffer_address; | |
45 | u16 flash_add; | |
46 | u16 flash_cmd; | |
47 | u16 configuration; | |
48 | u16 ecc_status_result; | |
49 | u16 ecc_rslt_main_area; | |
50 | u16 ecc_rslt_spare_area; | |
51 | u16 nf_wr_prot; | |
52 | u16 unlock_start_blk_add; | |
53 | u16 unlock_end_blk_add; | |
54 | u16 nand_flash_wr_pr_st; | |
55 | u16 nand_flash_config1; | |
56 | u16 nand_flash_config2; | |
57 | }; | |
58 | ||
59 | /* | |
60 | * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command | |
61 | * operation | |
62 | */ | |
63 | #define NFC_CMD 0x1 | |
64 | ||
65 | /* | |
66 | * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address | |
67 | * operation | |
68 | */ | |
69 | #define NFC_ADDR 0x2 | |
70 | ||
71 | /* | |
72 | * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input | |
73 | * operation | |
74 | */ | |
75 | #define NFC_INPUT 0x4 | |
76 | ||
77 | /* | |
78 | * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data | |
79 | * Output operation | |
80 | */ | |
81 | #define NFC_OUTPUT 0x8 | |
82 | ||
83 | /* | |
84 | * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID | |
85 | * operation | |
86 | */ | |
87 | #define NFC_ID 0x10 | |
88 | ||
89 | /* | |
90 | * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read | |
91 | * Status operation | |
92 | */ | |
93 | #define NFC_STATUS 0x20 | |
94 | ||
95 | /* | |
96 | * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status | |
97 | * operation | |
98 | */ | |
99 | #define NFC_INT 0x8000 | |
100 | ||
101 | #define NFC_SP_EN (1 << 2) | |
102 | #define NFC_ECC_EN (1 << 3) | |
103 | #define NFC_INT_MSK (1 << 4) | |
104 | #define NFC_BIG (1 << 5) | |
105 | #define NFC_RST (1 << 6) | |
106 | #define NFC_CE (1 << 7) | |
107 | #define NFC_ONE_CYCLE (1 << 8) | |
108 | ||
109 | #endif /* __FSL_NFC_H */ |