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f6c98f92 HG |
1 | /* |
2 | * SCLP Support | |
3 | * | |
4 | * Copyright IBM, Corp. 2012 | |
5 | * | |
6 | * Authors: | |
7 | * Christian Borntraeger <borntraeger@de.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or (at your | |
10 | * option) any later version. See the COPYING file in the top-level directory. | |
11 | * | |
12 | */ | |
13 | ||
14 | #ifndef HW_S390_SCLP_H | |
15 | #define HW_S390_SCLP_H | |
16 | ||
a9c94277 MA |
17 | #include "hw/sysbus.h" |
18 | #include "hw/qdev.h" | |
f6c98f92 | 19 | |
5f04c14a JH |
20 | #define SCLP_CMD_CODE_MASK 0xffff00ff |
21 | ||
f6c98f92 HG |
22 | /* SCLP command codes */ |
23 | #define SCLP_CMDW_READ_SCP_INFO 0x00020001 | |
24 | #define SCLP_CMDW_READ_SCP_INFO_FORCED 0x00120001 | |
234eef51 MR |
25 | #define SCLP_READ_STORAGE_ELEMENT_INFO 0x00040001 |
26 | #define SCLP_ATTACH_STORAGE_ELEMENT 0x00080001 | |
27 | #define SCLP_ASSIGN_STORAGE 0x000D0001 | |
28 | #define SCLP_UNASSIGN_STORAGE 0x000C0001 | |
559a17a1 HG |
29 | #define SCLP_CMD_READ_EVENT_DATA 0x00770005 |
30 | #define SCLP_CMD_WRITE_EVENT_DATA 0x00760005 | |
559a17a1 | 31 | #define SCLP_CMD_WRITE_EVENT_MASK 0x00780005 |
f6c98f92 | 32 | |
234eef51 MR |
33 | /* SCLP Memory hotplug codes */ |
34 | #define SCLP_FC_ASSIGN_ATTACH_READ_STOR 0xE00000000000ULL | |
35 | #define SCLP_STARTING_SUBINCREMENT_ID 0x10001 | |
36 | #define SCLP_INCREMENT_UNIT 0x10000 | |
37 | #define MAX_AVAIL_SLOTS 32 | |
0844df77 | 38 | #define MAX_STORAGE_INCREMENTS 1020 |
234eef51 | 39 | |
5f04c14a JH |
40 | /* CPU hotplug SCLP codes */ |
41 | #define SCLP_HAS_CPU_INFO 0x0C00000000000000ULL | |
42 | #define SCLP_CMDW_READ_CPU_INFO 0x00010001 | |
43 | #define SCLP_CMDW_CONFIGURE_CPU 0x00110001 | |
44 | #define SCLP_CMDW_DECONFIGURE_CPU 0x00100001 | |
45 | ||
8cba80c3 FB |
46 | /* SCLP PCI codes */ |
47 | #define SCLP_HAS_PCI_RECONFIG 0x0000000040000000ULL | |
48 | #define SCLP_CMDW_CONFIGURE_PCI 0x001a0001 | |
49 | #define SCLP_CMDW_DECONFIGURE_PCI 0x001b0001 | |
50 | #define SCLP_RECONFIG_PCI_ATPYE 2 | |
51 | ||
f6c98f92 HG |
52 | /* SCLP response codes */ |
53 | #define SCLP_RC_NORMAL_READ_COMPLETION 0x0010 | |
559a17a1 | 54 | #define SCLP_RC_NORMAL_COMPLETION 0x0020 |
234eef51 | 55 | #define SCLP_RC_SCCB_BOUNDARY_VIOLATION 0x0100 |
8cba80c3 | 56 | #define SCLP_RC_NO_ACTION_REQUIRED 0x0120 |
f6c98f92 | 57 | #define SCLP_RC_INVALID_SCLP_COMMAND 0x01f0 |
559a17a1 HG |
58 | #define SCLP_RC_CONTAINED_EQUIPMENT_CHECK 0x0340 |
59 | #define SCLP_RC_INSUFFICIENT_SCCB_LENGTH 0x0300 | |
234eef51 | 60 | #define SCLP_RC_STANDBY_READ_COMPLETION 0x0410 |
5d1abf23 | 61 | #define SCLP_RC_ADAPTER_IN_RESERVED_STATE 0x05f0 |
8cba80c3 | 62 | #define SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED 0x09f0 |
559a17a1 HG |
63 | #define SCLP_RC_INVALID_FUNCTION 0x40f0 |
64 | #define SCLP_RC_NO_EVENT_BUFFERS_STORED 0x60f0 | |
65 | #define SCLP_RC_INVALID_SELECTION_MASK 0x70f0 | |
66 | #define SCLP_RC_INCONSISTENT_LENGTHS 0x72f0 | |
67 | #define SCLP_RC_EVENT_BUFFER_SYNTAX_ERROR 0x73f0 | |
68 | #define SCLP_RC_INVALID_MASK_LENGTH 0x74f0 | |
69 | ||
f6c98f92 HG |
70 | |
71 | /* Service Call Control Block (SCCB) and its elements */ | |
72 | ||
73 | #define SCCB_SIZE 4096 | |
74 | ||
559a17a1 HG |
75 | #define SCLP_VARIABLE_LENGTH_RESPONSE 0x80 |
76 | #define SCLP_EVENT_BUFFER_ACCEPTED 0x80 | |
77 | ||
78 | #define SCLP_FC_NORMAL_WRITE 0 | |
79 | ||
f6c98f92 HG |
80 | /* |
81 | * Normally packed structures are not the right thing to do, since all code | |
8367a14f | 82 | * must take care of endianness. We cannot use ldl_phys and friends for two |
f6c98f92 HG |
83 | * reasons, though: |
84 | * - some of the embedded structures below the SCCB can appear multiple times | |
85 | * at different locations, so there is no fixed offset | |
86 | * - we work on a private copy of the SCCB, since there are several length | |
87 | * fields, that would cause a security nightmare if we allow the guest to | |
88 | * alter the structure while we parse it. We cannot use ldl_p and friends | |
89 | * either without doing pointer arithmetics | |
90 | * So we have to double check that all users of sclp data structures use the | |
8367a14f | 91 | * right endianness wrappers. |
f6c98f92 HG |
92 | */ |
93 | typedef struct SCCBHeader { | |
94 | uint16_t length; | |
95 | uint8_t function_code; | |
96 | uint8_t control_mask[3]; | |
97 | uint16_t response_code; | |
98 | } QEMU_PACKED SCCBHeader; | |
99 | ||
100 | #define SCCB_DATA_LEN (SCCB_SIZE - sizeof(SCCBHeader)) | |
1c07e01b | 101 | #define SCCB_CPU_FEATURE_LEN 6 |
f6c98f92 | 102 | |
8cc3aecf JH |
103 | /* CPU information */ |
104 | typedef struct CPUEntry { | |
105 | uint8_t address; | |
1c07e01b DH |
106 | uint8_t reserved0; |
107 | uint8_t features[SCCB_CPU_FEATURE_LEN]; | |
108 | uint8_t reserved2[6]; | |
8cc3aecf JH |
109 | uint8_t type; |
110 | uint8_t reserved1; | |
111 | } QEMU_PACKED CPUEntry; | |
112 | ||
f6c98f92 HG |
113 | typedef struct ReadInfo { |
114 | SCCBHeader h; | |
115 | uint16_t rnmax; | |
116 | uint8_t rnsize; | |
8cc3aecf JH |
117 | uint8_t _reserved1[16 - 11]; /* 11-15 */ |
118 | uint16_t entries_cpu; /* 16-17 */ | |
119 | uint16_t offset_cpu; /* 18-19 */ | |
120 | uint8_t _reserved2[24 - 20]; /* 20-23 */ | |
121 | uint8_t loadparm[8]; /* 24-31 */ | |
122 | uint8_t _reserved3[48 - 32]; /* 32-47 */ | |
123 | uint64_t facilities; /* 48-55 */ | |
1c07e01b DH |
124 | uint8_t _reserved0[80 - 56]; /* 56-79 */ |
125 | uint8_t conf_char[96 - 80]; /* 80-95 */ | |
126 | uint8_t _reserved4[100 - 96]; /* 96-99 */ | |
8cc3aecf JH |
127 | uint32_t rnsize2; |
128 | uint64_t rnmax2; | |
1c07e01b DH |
129 | uint8_t _reserved6[116 - 112]; /* 112-115 */ |
130 | uint8_t conf_char_ext[120 - 116]; /* 116-119 */ | |
8cc3aecf JH |
131 | uint16_t highest_cpu; |
132 | uint8_t _reserved5[128 - 122]; /* 122-127 */ | |
133 | struct CPUEntry entries[0]; | |
f6c98f92 HG |
134 | } QEMU_PACKED ReadInfo; |
135 | ||
8cc3aecf JH |
136 | typedef struct ReadCpuInfo { |
137 | SCCBHeader h; | |
138 | uint16_t nr_configured; /* 8-9 */ | |
139 | uint16_t offset_configured; /* 10-11 */ | |
140 | uint16_t nr_standby; /* 12-13 */ | |
141 | uint16_t offset_standby; /* 14-15 */ | |
142 | uint8_t reserved0[24-16]; /* 16-23 */ | |
143 | struct CPUEntry entries[0]; | |
144 | } QEMU_PACKED ReadCpuInfo; | |
145 | ||
234eef51 MR |
146 | typedef struct ReadStorageElementInfo { |
147 | SCCBHeader h; | |
148 | uint16_t max_id; | |
149 | uint16_t assigned; | |
150 | uint16_t standby; | |
151 | uint8_t _reserved0[16 - 14]; /* 14-15 */ | |
152 | uint32_t entries[0]; | |
153 | } QEMU_PACKED ReadStorageElementInfo; | |
154 | ||
155 | typedef struct AttachStorageElement { | |
156 | SCCBHeader h; | |
157 | uint8_t _reserved0[10 - 8]; /* 8-9 */ | |
158 | uint16_t assigned; | |
159 | uint8_t _reserved1[16 - 12]; /* 12-15 */ | |
160 | uint32_t entries[0]; | |
161 | } QEMU_PACKED AttachStorageElement; | |
162 | ||
163 | typedef struct AssignStorage { | |
164 | SCCBHeader h; | |
165 | uint16_t rn; | |
166 | } QEMU_PACKED AssignStorage; | |
167 | ||
f6c98f92 HG |
168 | typedef struct SCCB { |
169 | SCCBHeader h; | |
170 | char data[SCCB_DATA_LEN]; | |
171 | } QEMU_PACKED SCCB; | |
172 | ||
515190d9 DH |
173 | #define TYPE_SCLP "sclp" |
174 | #define SCLP(obj) OBJECT_CHECK(SCLPDevice, (obj), TYPE_SCLP) | |
175 | #define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP) | |
176 | #define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP) | |
177 | ||
178 | typedef struct SCLPEventFacility SCLPEventFacility; | |
179 | ||
180 | typedef struct SCLPDevice { | |
181 | /* private */ | |
182 | DeviceState parent_obj; | |
183 | SCLPEventFacility *event_facility; | |
71a2fd35 | 184 | int increment_size; |
515190d9 DH |
185 | |
186 | /* public */ | |
187 | } SCLPDevice; | |
188 | ||
189 | typedef struct SCLPDeviceClass { | |
190 | /* private */ | |
191 | DeviceClass parent_class; | |
25a3c5af DH |
192 | void (*read_SCP_info)(SCLPDevice *sclp, SCCB *sccb); |
193 | void (*read_storage_element0_info)(SCLPDevice *sclp, SCCB *sccb); | |
194 | void (*read_storage_element1_info)(SCLPDevice *sclp, SCCB *sccb); | |
195 | void (*attach_storage_element)(SCLPDevice *sclp, SCCB *sccb, | |
196 | uint16_t element); | |
197 | void (*assign_storage)(SCLPDevice *sclp, SCCB *sccb); | |
198 | void (*unassign_storage)(SCLPDevice *sclp, SCCB *sccb); | |
199 | void (*read_cpu_info)(SCLPDevice *sclp, SCCB *sccb); | |
515190d9 DH |
200 | |
201 | /* public */ | |
25a3c5af | 202 | void (*execute)(SCLPDevice *sclp, SCCB *sccb, uint32_t code); |
1723a1b6 | 203 | void (*service_interrupt)(SCLPDevice *sclp, uint32_t sccb); |
515190d9 DH |
204 | } SCLPDeviceClass; |
205 | ||
0844df77 MR |
206 | typedef struct sclpMemoryHotplugDev sclpMemoryHotplugDev; |
207 | ||
208 | #define TYPE_SCLP_MEMORY_HOTPLUG_DEV "sclp-memory-hotplug-dev" | |
209 | #define SCLP_MEMORY_HOTPLUG_DEV(obj) \ | |
210 | OBJECT_CHECK(sclpMemoryHotplugDev, (obj), TYPE_SCLP_MEMORY_HOTPLUG_DEV) | |
211 | ||
212 | struct sclpMemoryHotplugDev { | |
213 | SysBusDevice parent; | |
214 | ram_addr_t standby_mem_size; | |
215 | ram_addr_t padded_ram_size; | |
216 | ram_addr_t pad_size; | |
217 | ram_addr_t standby_subregion_size; | |
218 | ram_addr_t rzm; | |
219 | int increment_size; | |
220 | char *standby_state_map; | |
221 | }; | |
222 | ||
559a17a1 HG |
223 | static inline int sccb_data_len(SCCB *sccb) |
224 | { | |
225 | return be16_to_cpu(sccb->h.length) - sizeof(sccb->h); | |
226 | } | |
227 | ||
f6c98f92 | 228 | |
559a17a1 | 229 | void s390_sclp_init(void); |
0844df77 MR |
230 | sclpMemoryHotplugDev *init_sclp_memory_hotplug_dev(void); |
231 | sclpMemoryHotplugDev *get_sclp_memory_hotplug_dev(void); | |
f6c98f92 | 232 | void sclp_service_interrupt(uint32_t sccb); |
49204458 | 233 | void raise_irq_cpu_hotplug(void); |
f6c98f92 HG |
234 | |
235 | #endif |