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1/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * The original I2C interface was
24 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
25 * AIRVENT SAM s.p.a - RIMINI(ITALY)
26 * but has been changed substantially.
27 */
28
29#ifndef _I2C_H_
30#define _I2C_H_
31
32/*
33 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
34 *
35 * The implementation MUST NOT use static or global variables if the
36 * I2C routines are used to read SDRAM configuration information
37 * because this is done before the memories are initialized. Limited
38 * use of stack-based variables are OK (the initial stack size is
39 * limited).
40 *
41 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
42 */
43
44/*
45 * Configuration items.
46 */
47#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
48
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49#ifdef CONFIG_I2C_MULTI_BUS
50#define MAX_I2C_BUS 2
51#define I2C_MULTI_BUS 1
79b2d0bb 52#else
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53#define MAX_I2C_BUS 1
54#define I2C_MULTI_BUS 0
55#endif
56
57#if !defined(CONFIG_SYS_MAX_I2C_BUS)
58#define CONFIG_SYS_MAX_I2C_BUS MAX_I2C_BUS
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59#endif
60
8c12045a 61/* define the I2C bus number for RTC and DTT if not already done */
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62#if !defined(CONFIG_SYS_RTC_BUS_NUM)
63#define CONFIG_SYS_RTC_BUS_NUM 0
8c12045a 64#endif
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65#if !defined(CONFIG_SYS_DTT_BUS_NUM)
66#define CONFIG_SYS_DTT_BUS_NUM 0
8c12045a 67#endif
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68#if !defined(CONFIG_SYS_SPD_BUS_NUM)
69#define CONFIG_SYS_SPD_BUS_NUM 0
d8a8ea5c 70#endif
8c12045a 71
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72#ifndef I2C_SOFT_DECLARATIONS
73# if defined(CONFIG_MPC8260)
6d0f6bcf 74# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
98aed379 75# elif defined(CONFIG_8xx)
6d0f6bcf 76# define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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77
78# elif (defined(CONFIG_AT91RM9200) || \
79 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
80 defined(CONFIG_AT91SAM9263)) && !defined(CONFIG_AT91_LEGACY)
78132275 81# define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
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82# else
83# define I2C_SOFT_DECLARATIONS
84# endif
85#endif
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86
87#ifdef CONFIG_8xx
9c90a2c8 88/* Set default value for the I2C bus speed on 8xx. In the
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89 * future, we'll define these in all 8xx board config files.
90 */
91#ifndef CONFIG_SYS_I2C_SPEED
92#define CONFIG_SYS_I2C_SPEED 50000
93#endif
9c90a2c8 94#endif
ecf5f077 95
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96/*
97 * Many boards/controllers/drivers don't support an I2C slave interface so
98 * provide a default slave address for them for use in common code. A real
99 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
100 * support a slave interface.
101 */
ecf5f077 102#ifndef CONFIG_SYS_I2C_SLAVE
9c90a2c8 103#define CONFIG_SYS_I2C_SLAVE 0xfe
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104#endif
105
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106/*
107 * Initialization, must be called once on start up, may be called
108 * repeatedly to change the speed and slave addresses.
109 */
110void i2c_init(int speed, int slaveaddr);
06d01dbe 111void i2c_init_board(void);
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112#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
113void i2c_board_late_init(void);
114#endif
1f045217 115
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116#if defined(CONFIG_I2C_MUX)
117
118typedef struct _mux {
119 uchar chip;
120 uchar channel;
121 char *name;
122 struct _mux *next;
123} I2C_MUX;
124
125typedef struct _mux_device {
126 int busid;
127 I2C_MUX *mux; /* List of muxes, to reach the device */
128 struct _mux_device *next;
129} I2C_MUX_DEVICE;
130
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131I2C_MUX_DEVICE *i2c_mux_search_device(int id);
132I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf);
133int i2x_mux_select_mux(int bus);
134int i2c_mux_ident_muxstring_f (uchar *buf);
135#endif
136
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137/*
138 * Probe the given I2C chip address. Returns 0 if a chip responded,
139 * not 0 on failure.
140 */
141int i2c_probe(uchar chip);
142
143/*
144 * Read/Write interface:
145 * chip: I2C chip address, range 0..127
146 * addr: Memory (register) address within the chip
147 * alen: Number of bytes to use for addr (typically 1, 2 for larger
148 * memories, 0 for register type devices with only one
149 * register)
150 * buffer: Where to read/write the data
151 * len: How many bytes to read/write
152 *
153 * Returns: 0 on success, not 0 on failure
154 */
155int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
156int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
157
158/*
159 * Utility routines to read/write registers.
160 */
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161static inline u8 i2c_reg_read(u8 addr, u8 reg)
162{
163 u8 buf;
164
165#ifdef CONFIG_8xx
166 /* MPC8xx needs this. Maybe one day we can get rid of it. */
167 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
168#endif
169
170#ifdef DEBUG
171 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
172#endif
173
ecf5f077 174 i2c_read(addr, reg, 1, &buf, 1);
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175
176 return buf;
177}
178
179static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
180{
181#ifdef CONFIG_8xx
182 /* MPC8xx needs this. Maybe one day we can get rid of it. */
183 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
184#endif
185
186#ifdef DEBUG
187 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
188 __func__, addr, reg, val);
189#endif
190
ecf5f077 191 i2c_write(addr, reg, 1, &val, 1);
ecf5f077 192}
1f045217 193
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194/*
195 * Functions for setting the current I2C bus and its speed
196 */
197
198/*
199 * i2c_set_bus_num:
200 *
201 * Change the active I2C bus. Subsequent read/write calls will
202 * go to this one.
203 *
53677ef1 204 * bus - bus index, zero based
bb99ad6d 205 *
53677ef1 206 * Returns: 0 on success, not 0 on failure
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207 *
208 */
9ca880a2 209int i2c_set_bus_num(unsigned int bus);
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210
211/*
212 * i2c_get_bus_num:
213 *
214 * Returns index of currently active I2C bus. Zero-based.
215 */
216
9ca880a2 217unsigned int i2c_get_bus_num(void);
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218
219/*
220 * i2c_set_bus_speed:
221 *
222 * Change the speed of the active I2C bus
223 *
53677ef1 224 * speed - bus speed in Hz
bb99ad6d 225 *
53677ef1 226 * Returns: 0 on success, not 0 on failure
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227 *
228 */
9ca880a2 229int i2c_set_bus_speed(unsigned int);
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230
231/*
232 * i2c_get_bus_speed:
233 *
234 * Returns speed of currently active I2C bus in Hz
235 */
236
9ca880a2 237unsigned int i2c_get_bus_speed(void);
bb99ad6d 238
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239/* NOTE: These two functions MUST be always_inline to avoid code growth! */
240static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
241static inline unsigned int I2C_GET_BUS(void)
242{
243 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
244}
245
246static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
247static inline void I2C_SET_BUS(unsigned int bus)
248{
249 if (I2C_MULTI_BUS)
250 i2c_set_bus_num(bus);
251}
252
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253/* Multi I2C definitions */
254enum {
255 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
256 I2C_8, I2C_9, I2C_10,
257};
258
259/* Multi I2C busses handling */
260#ifdef CONFIG_SOFT_I2C_MULTI_BUS
261extern int get_multi_scl_pin(void);
262extern int get_multi_sda_pin(void);
263extern int multi_i2c_init(void);
264#endif
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265
266/**
267 * Get FDT values for i2c bus.
268 *
269 * @param blob Device tree blbo
270 * @return the number of I2C bus
271 */
272void board_i2c_init(const void *blob);
273
274/**
275 * Find the I2C bus number by given a FDT I2C node.
276 *
277 * @param blob Device tree blbo
278 * @param node FDT I2C node to find
279 * @return the number of I2C bus (zero based), or -1 on error
280 */
281int i2c_get_bus_num_fdt(int node);
282
283/**
284 * Reset the I2C bus represented by the given a FDT I2C node.
285 *
286 * @param blob Device tree blbo
287 * @param node FDT I2C node to find
288 * @return 0 if port was reset, -1 if not found
289 */
290int i2c_reset_port_fdt(const void *blob, int node);
1f045217 291#endif /* _I2C_H_ */