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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
ffc664e8 | 2 | /* |
24b44844 DL |
3 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. |
4 | * Copyright 2003-2004 Jeff Garzik | |
ffc664e8 DL |
5 | * Copyright (C) 2008 Freescale Semiconductor, Inc. |
6 | * Dave Liu <daveliu@freescale.com> | |
7 | * port from libata of linux kernel | |
ffc664e8 DL |
8 | */ |
9 | ||
10 | #ifndef __LIBATA_H__ | |
11 | #define __LIBATA_H__ | |
12 | ||
ffc664e8 | 13 | |
24b44844 DL |
14 | enum { |
15 | /* various global constants */ | |
16 | ATA_MAX_DEVICES = 2, /* per bus/port */ | |
17 | ATA_MAX_PRD = 256, /* we could make these 256/256 */ | |
18 | ATA_SECT_SIZE = 512, | |
19 | ATA_MAX_SECTORS_128 = 128, | |
20 | ATA_MAX_SECTORS = 256, | |
21 | ATA_MAX_SECTORS_LBA48 = 65535, | |
22 | ATA_MAX_SECTORS_TAPE = 65535, | |
23 | ||
24 | ATA_ID_WORDS = 256, | |
25 | ATA_ID_SERNO = 10, | |
26 | ATA_ID_FW_REV = 23, | |
27 | ATA_ID_PROD = 27, | |
28 | ATA_ID_OLD_PIO_MODES = 51, | |
29 | ATA_ID_FIELD_VALID = 53, | |
30 | ATA_ID_LBA_SECTORS = 60, | |
31 | ATA_ID_MWDMA_MODES = 63, | |
32 | ATA_ID_PIO_MODES = 64, | |
33 | ATA_ID_EIDE_DMA_MIN = 65, | |
34 | ATA_ID_EIDE_PIO = 67, | |
35 | ATA_ID_EIDE_PIO_IORDY = 68, | |
36 | ATA_ID_PIO4 = (1 << 1), | |
37 | ATA_ID_QUEUE_DEPTH = 75, | |
38 | ATA_ID_SATA_CAP = 76, | |
39 | ATA_ID_SATA_FEATURES = 78, | |
40 | ATA_ID_SATA_FEATURES_EN = 79, | |
41 | ATA_ID_MAJOR_VER = 80, | |
42 | ATA_ID_MINOR_VER = 81, | |
43 | ATA_ID_UDMA_MODES = 88, | |
44 | ATA_ID_LBA48_SECTORS = 100, | |
45 | ||
46 | ATA_ID_SERNO_LEN = 20, | |
47 | ATA_ID_FW_REV_LEN = 8, | |
48 | ATA_ID_PROD_LEN = 40, | |
49 | ||
50 | ATA_PCI_CTL_OFS = 2, | |
51 | ||
52 | ATA_PIO0 = (1 << 0), | |
53 | ATA_PIO1 = ATA_PIO0 | (1 << 1), | |
54 | ATA_PIO2 = ATA_PIO1 | (1 << 2), | |
55 | ATA_PIO3 = ATA_PIO2 | (1 << 3), | |
56 | ATA_PIO4 = ATA_PIO3 | (1 << 4), | |
57 | ATA_PIO5 = ATA_PIO4 | (1 << 5), | |
58 | ATA_PIO6 = ATA_PIO5 | (1 << 6), | |
59 | ||
60 | ATA_SWDMA0 = (1 << 0), | |
61 | ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1), | |
62 | ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2), | |
63 | ||
64 | ATA_SWDMA2_ONLY = (1 << 2), | |
65 | ||
66 | ATA_MWDMA0 = (1 << 0), | |
67 | ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1), | |
68 | ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2), | |
69 | ||
70 | ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2), | |
71 | ATA_MWDMA2_ONLY = (1 << 2), | |
72 | ||
73 | ATA_UDMA0 = (1 << 0), | |
74 | ATA_UDMA1 = ATA_UDMA0 | (1 << 1), | |
75 | ATA_UDMA2 = ATA_UDMA1 | (1 << 2), | |
76 | ATA_UDMA3 = ATA_UDMA2 | (1 << 3), | |
77 | ATA_UDMA4 = ATA_UDMA3 | (1 << 4), | |
78 | ATA_UDMA5 = ATA_UDMA4 | (1 << 5), | |
79 | ATA_UDMA6 = ATA_UDMA5 | (1 << 6), | |
80 | ATA_UDMA7 = ATA_UDMA6 | (1 << 7), | |
81 | /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ | |
82 | ||
83 | ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ | |
84 | ||
85 | /* DMA-related */ | |
86 | ATA_PRD_SZ = 8, | |
87 | ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), | |
88 | ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ | |
89 | ||
90 | ATA_DMA_TABLE_OFS = 4, | |
91 | ATA_DMA_STATUS = 2, | |
92 | ATA_DMA_CMD = 0, | |
93 | ATA_DMA_WR = (1 << 3), | |
94 | ATA_DMA_START = (1 << 0), | |
95 | ATA_DMA_INTR = (1 << 2), | |
96 | ATA_DMA_ERR = (1 << 1), | |
97 | ATA_DMA_ACTIVE = (1 << 0), | |
98 | ||
99 | /* bits in ATA command block registers */ | |
100 | ATA_HOB = (1 << 7), /* LBA48 selector */ | |
101 | ATA_NIEN = (1 << 1), /* disable-irq flag */ | |
102 | ATA_LBA = (1 << 6), /* LBA28 selector */ | |
103 | ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ | |
104 | ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ | |
105 | ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ | |
106 | ATA_BUSY = (1 << 7), /* BSY status bit */ | |
107 | ATA_DRDY = (1 << 6), /* device ready */ | |
108 | ATA_DF = (1 << 5), /* device fault */ | |
109 | ATA_DRQ = (1 << 3), /* data request i/o */ | |
110 | ATA_ERR = (1 << 0), /* have an error */ | |
111 | ATA_SRST = (1 << 2), /* software reset */ | |
112 | ATA_ICRC = (1 << 7), /* interface CRC error */ | |
113 | ATA_UNC = (1 << 6), /* uncorrectable media error */ | |
114 | ATA_IDNF = (1 << 4), /* ID not found */ | |
115 | ATA_ABORTED = (1 << 2), /* command aborted */ | |
116 | ||
117 | /* ATA command block registers */ | |
118 | ATA_REG_DATA = 0x00, | |
119 | ATA_REG_ERR = 0x01, | |
120 | ATA_REG_NSECT = 0x02, | |
121 | ATA_REG_LBAL = 0x03, | |
122 | ATA_REG_LBAM = 0x04, | |
123 | ATA_REG_LBAH = 0x05, | |
124 | ATA_REG_DEVICE = 0x06, | |
125 | ATA_REG_STATUS = 0x07, | |
126 | ||
127 | ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ | |
128 | ATA_REG_CMD = ATA_REG_STATUS, | |
129 | ATA_REG_BYTEL = ATA_REG_LBAM, | |
130 | ATA_REG_BYTEH = ATA_REG_LBAH, | |
131 | ATA_REG_DEVSEL = ATA_REG_DEVICE, | |
132 | ATA_REG_IRQ = ATA_REG_NSECT, | |
133 | ||
134 | /* ATA device commands */ | |
f4a1426f HS |
135 | ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */ |
136 | ATA_CMD_PIO_READ = 0x20, /* Read sectors with retry */ | |
137 | ATA_CMD_PIO_READ_EXT = 0x24, | |
138 | ATA_CMD_READ_EXT = 0x25, | |
24b44844 | 139 | ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, |
f4a1426f HS |
140 | ATA_CMD_READ_MULTI_EXT = 0x29, |
141 | ATA_CMD_READ_LOG_EXT = 0x2f, | |
142 | ATA_CMD_PIO_WRITE = 0x30, /* write sectors with retry */ | |
143 | ATA_CMD_PIO_WRITE_EXT = 0x34, | |
144 | ATA_CMD_WRITE_EXT = 0x35, | |
145 | ATA_CMD_SET_MAX_EXT = 0x37, | |
146 | ATA_CMD_WRITE_MULTI_EXT = 0x39, | |
147 | ATA_CMD_WRITE_FUA_EXT = 0x3D, | |
148 | ATA_CMD_VERIFY = 0x40, /* read verify sectors with retry */ | |
149 | ATA_CMD_VERIFY_EXT = 0x42, | |
150 | ATA_CMD_FPDMA_READ = 0x60, | |
151 | ATA_CMD_FPDMA_WRITE = 0x61, | |
152 | ATA_CMD_EDD = 0x90, /* execute device diagnostic */ | |
153 | ATA_CMD_INIT_DEV_PARAMS = 0x91, /* initialize device parameters */ | |
154 | ATA_CMD_PACKET = 0xA0, /* ATAPI packet */ | |
155 | ATA_CMD_ID_ATAPI = 0xA1, /* ATAPI identify device */ | |
156 | ATA_CMD_CONF_OVERLAY = 0xB1, | |
157 | ATA_CMD_READ_MULTI = 0xC4, /* read multiple */ | |
158 | ATA_CMD_WRITE_MULTI = 0xC5, /* write multiple */ | |
159 | ATA_CMD_SET_MULTI = 0xC6, /* set multiple mode */ | |
160 | ATA_CMD_READ = 0xC8, /* read DMA with retry */ | |
161 | ATA_CMD_WRITE = 0xCA, /* write DMA with retry */ | |
162 | ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE, | |
163 | ATA_CMD_STANDBYNOW1 = 0xE0, /* standby immediate */ | |
164 | ATA_CMD_IDLEIMMEDIATE = 0xE1, /* idle immediate */ | |
165 | ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */ | |
166 | ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ | |
167 | ATA_CMD_PMP_READ = 0xE4, /* read buffer */ | |
168 | ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ | |
169 | ATA_CMD_SLEEP = 0xE6, /* sleep */ | |
170 | ATA_CMD_FLUSH = 0xE7, | |
171 | ATA_CMD_PMP_WRITE = 0xE8, /* write buffer */ | |
172 | ATA_CMD_FLUSH_EXT = 0xEA, | |
173 | ATA_CMD_ID_ATA = 0xEC, /* identify device */ | |
174 | ATA_CMD_SET_FEATURES = 0xEF, /* set features */ | |
175 | ATA_CMD_SEC_FREEZE_LOCK = 0xF5, /* security freeze */ | |
176 | ATA_CMD_READ_NATIVE_MAX = 0xF8, | |
177 | ATA_CMD_SET_MAX = 0xF9, | |
24b44844 DL |
178 | |
179 | /* READ_LOG_EXT pages */ | |
180 | ATA_LOG_SATA_NCQ = 0x10, | |
181 | ||
182 | /* READ/WRITE LONG (obsolete) */ | |
183 | ATA_CMD_READ_LONG = 0x22, | |
184 | ATA_CMD_READ_LONG_ONCE = 0x23, | |
185 | ATA_CMD_WRITE_LONG = 0x32, | |
186 | ATA_CMD_WRITE_LONG_ONCE = 0x33, | |
ffc664e8 | 187 | |
ffc664e8 DL |
188 | /* SETFEATURES stuff */ |
189 | SETFEATURES_XFER = 0x03, | |
190 | XFER_UDMA_7 = 0x47, | |
191 | XFER_UDMA_6 = 0x46, | |
192 | XFER_UDMA_5 = 0x45, | |
193 | XFER_UDMA_4 = 0x44, | |
194 | XFER_UDMA_3 = 0x43, | |
195 | XFER_UDMA_2 = 0x42, | |
196 | XFER_UDMA_1 = 0x41, | |
197 | XFER_UDMA_0 = 0x40, | |
24b44844 DL |
198 | XFER_MW_DMA_4 = 0x24, /* CFA only */ |
199 | XFER_MW_DMA_3 = 0x23, /* CFA only */ | |
ffc664e8 DL |
200 | XFER_MW_DMA_2 = 0x22, |
201 | XFER_MW_DMA_1 = 0x21, | |
202 | XFER_MW_DMA_0 = 0x20, | |
24b44844 DL |
203 | XFER_SW_DMA_2 = 0x12, |
204 | XFER_SW_DMA_1 = 0x11, | |
205 | XFER_SW_DMA_0 = 0x10, | |
206 | XFER_PIO_6 = 0x0E, /* CFA only */ | |
207 | XFER_PIO_5 = 0x0D, /* CFA only */ | |
ffc664e8 DL |
208 | XFER_PIO_4 = 0x0C, |
209 | XFER_PIO_3 = 0x0B, | |
210 | XFER_PIO_2 = 0x0A, | |
211 | XFER_PIO_1 = 0x09, | |
212 | XFER_PIO_0 = 0x08, | |
213 | XFER_PIO_SLOW = 0x00, | |
214 | ||
215 | SETFEATURES_WC_ON = 0x02, /* Enable write cache */ | |
216 | SETFEATURES_WC_OFF = 0x82, /* Disable write cache */ | |
217 | ||
218 | SETFEATURES_SPINUP = 0x07, /* Spin-up drive */ | |
24b44844 DL |
219 | |
220 | SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */ | |
221 | SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */ | |
222 | ||
223 | /* SETFEATURE Sector counts for SATA features */ | |
224 | SATA_AN = 0x05, /* Asynchronous Notification */ | |
225 | SATA_DIPM = 0x03, /* Device Initiated Power Management */ | |
226 | ||
227 | /* feature values for SET_MAX */ | |
228 | ATA_SET_MAX_ADDR = 0x00, | |
229 | ATA_SET_MAX_PASSWD = 0x01, | |
230 | ATA_SET_MAX_LOCK = 0x02, | |
231 | ATA_SET_MAX_UNLOCK = 0x03, | |
232 | ATA_SET_MAX_FREEZE_LOCK = 0x04, | |
233 | ||
234 | /* feature values for DEVICE CONFIGURATION OVERLAY */ | |
235 | ATA_DCO_RESTORE = 0xC0, | |
236 | ATA_DCO_FREEZE_LOCK = 0xC1, | |
237 | ATA_DCO_IDENTIFY = 0xC2, | |
238 | ATA_DCO_SET = 0xC3, | |
239 | ||
240 | /* ATAPI stuff */ | |
241 | ATAPI_PKT_DMA = (1 << 0), | |
242 | ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: | |
243 | 0=to device, 1=to host */ | |
244 | ATAPI_CDB_LEN = 16, | |
245 | ||
246 | /* PMP stuff */ | |
247 | SATA_PMP_MAX_PORTS = 15, | |
248 | SATA_PMP_CTRL_PORT = 15, | |
249 | ||
250 | SATA_PMP_GSCR_DWORDS = 128, | |
251 | SATA_PMP_GSCR_PROD_ID = 0, | |
252 | SATA_PMP_GSCR_REV = 1, | |
253 | SATA_PMP_GSCR_PORT_INFO = 2, | |
254 | SATA_PMP_GSCR_ERROR = 32, | |
255 | SATA_PMP_GSCR_ERROR_EN = 33, | |
256 | SATA_PMP_GSCR_FEAT = 64, | |
257 | SATA_PMP_GSCR_FEAT_EN = 96, | |
258 | ||
259 | SATA_PMP_PSCR_STATUS = 0, | |
260 | SATA_PMP_PSCR_ERROR = 1, | |
261 | SATA_PMP_PSCR_CONTROL = 2, | |
262 | ||
263 | SATA_PMP_FEAT_BIST = (1 << 0), | |
264 | SATA_PMP_FEAT_PMREQ = (1 << 1), | |
265 | SATA_PMP_FEAT_DYNSSC = (1 << 2), | |
266 | SATA_PMP_FEAT_NOTIFY = (1 << 3), | |
267 | ||
268 | /* cable types */ | |
269 | ATA_CBL_NONE = 0, | |
270 | ATA_CBL_PATA40 = 1, | |
271 | ATA_CBL_PATA80 = 2, | |
272 | ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ | |
273 | ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */ | |
274 | ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */ | |
275 | ATA_CBL_SATA = 6, | |
276 | ||
277 | /* SATA Status and Control Registers */ | |
278 | SCR_STATUS = 0, | |
279 | SCR_ERROR = 1, | |
280 | SCR_CONTROL = 2, | |
281 | SCR_ACTIVE = 3, | |
282 | SCR_NOTIFICATION = 4, | |
283 | ||
284 | /* SError bits */ | |
285 | SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */ | |
286 | SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */ | |
287 | SERR_DATA = (1 << 8), /* unrecovered data error */ | |
288 | SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */ | |
289 | SERR_PROTOCOL = (1 << 10), /* protocol violation */ | |
290 | SERR_INTERNAL = (1 << 11), /* host internal error */ | |
291 | SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */ | |
292 | SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */ | |
293 | SERR_COMM_WAKE = (1 << 18), /* Comm wake */ | |
294 | SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */ | |
295 | SERR_DISPARITY = (1 << 20), /* Disparity */ | |
296 | SERR_CRC = (1 << 21), /* CRC error */ | |
297 | SERR_HANDSHAKE = (1 << 22), /* Handshake error */ | |
298 | SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */ | |
299 | SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */ | |
300 | SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */ | |
301 | SERR_DEV_XCHG = (1 << 26), /* device exchanged */ | |
302 | ||
303 | /* struct ata_taskfile flags */ | |
304 | ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ | |
305 | ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ | |
306 | ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ | |
307 | ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ | |
308 | ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ | |
309 | ATA_TFLAG_FUA = (1 << 5), /* enable FUA */ | |
310 | ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */ | |
311 | ||
312 | /* protocol flags */ | |
313 | ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */ | |
314 | ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */ | |
315 | ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA, | |
316 | ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */ | |
317 | ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */ | |
ffc664e8 DL |
318 | }; |
319 | ||
24b44844 DL |
320 | enum ata_tf_protocols { |
321 | /* ATA taskfile protocols */ | |
322 | ATA_PROT_UNKNOWN, /* unknown/invalid */ | |
ffc664e8 DL |
323 | ATA_PROT_NODATA, /* no data */ |
324 | ATA_PROT_PIO, /* PIO data xfer */ | |
325 | ATA_PROT_DMA, /* DMA */ | |
326 | ATA_PROT_NCQ, /* NCQ */ | |
24b44844 DL |
327 | ATAPI_PROT_NODATA, /* packet command, no data */ |
328 | ATAPI_PROT_PIO, /* packet command, PIO data xfer*/ | |
329 | ATAPI_PROT_DMA, /* packet command with special DMA sauce */ | |
330 | }; | |
331 | ||
332 | enum ata_ioctls { | |
333 | ATA_IOC_GET_IO32 = 0x309, | |
334 | ATA_IOC_SET_IO32 = 0x324, | |
ffc664e8 DL |
335 | }; |
336 | ||
337 | enum ata_dev_typed { | |
338 | ATA_DEV_ATA, /* ATA device */ | |
339 | ATA_DEV_ATAPI, /* ATAPI device */ | |
340 | ATA_DEV_PMP, /* Port Multiplier Port */ | |
341 | ATA_DEV_UNKNOWN, /* unknown */ | |
342 | }; | |
343 | ||
24b44844 DL |
344 | struct ata_taskfile { |
345 | unsigned long flags; /* ATA_TFLAG_xxx */ | |
346 | u8 protocol; /* ATA_PROT_xxx */ | |
ffc664e8 | 347 | |
24b44844 | 348 | u8 ctl; /* control reg */ |
ffc664e8 | 349 | |
24b44844 DL |
350 | u8 hob_feature; /* additional data */ |
351 | u8 hob_nsect; /* to support LBA48 */ | |
352 | u8 hob_lbal; | |
353 | u8 hob_lbam; | |
354 | u8 hob_lbah; | |
ffc664e8 | 355 | |
24b44844 DL |
356 | u8 feature; |
357 | u8 nsect; | |
358 | u8 lbal; | |
359 | u8 lbam; | |
360 | u8 lbah; | |
ffc664e8 | 361 | |
24b44844 | 362 | u8 device; |
ffc664e8 | 363 | |
24b44844 | 364 | u8 command; /* IO operation */ |
ffc664e8 DL |
365 | }; |
366 | ||
24b44844 DL |
367 | /* |
368 | * protocol tests | |
369 | */ | |
370 | static inline unsigned int ata_prot_flags(u8 prot) | |
371 | { | |
372 | switch (prot) { | |
373 | case ATA_PROT_NODATA: | |
374 | return 0; | |
375 | case ATA_PROT_PIO: | |
376 | return ATA_PROT_FLAG_PIO; | |
377 | case ATA_PROT_DMA: | |
378 | return ATA_PROT_FLAG_DMA; | |
379 | case ATA_PROT_NCQ: | |
380 | return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ; | |
381 | case ATAPI_PROT_NODATA: | |
382 | return ATA_PROT_FLAG_ATAPI; | |
383 | case ATAPI_PROT_PIO: | |
384 | return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO; | |
385 | case ATAPI_PROT_DMA: | |
386 | return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA; | |
387 | } | |
388 | return 0; | |
389 | } | |
390 | ||
391 | static inline int ata_is_atapi(u8 prot) | |
392 | { | |
393 | return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI; | |
394 | } | |
395 | ||
396 | static inline int ata_is_nodata(u8 prot) | |
397 | { | |
398 | return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA); | |
399 | } | |
400 | ||
401 | static inline int ata_is_pio(u8 prot) | |
402 | { | |
403 | return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO; | |
404 | } | |
405 | ||
406 | static inline int ata_is_dma(u8 prot) | |
407 | { | |
408 | return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA; | |
409 | } | |
410 | ||
411 | static inline int ata_is_ncq(u8 prot) | |
412 | { | |
413 | return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ; | |
414 | } | |
415 | ||
416 | static inline int ata_is_data(u8 prot) | |
417 | { | |
418 | return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA; | |
419 | } | |
420 | ||
421 | /* | |
422 | * id tests | |
423 | */ | |
ffc664e8 | 424 | #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) |
ffc664e8 DL |
425 | #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) |
426 | #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) | |
427 | #define ata_id_has_ncq(id) ((id)[76] & (1 << 8)) | |
428 | #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1) | |
24b44844 DL |
429 | #define ata_id_removeable(id) ((id)[0] & (1 << 7)) |
430 | #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10)) | |
431 | #define ata_id_has_iordy(id) ((id)[49] & (1 << 11)) | |
ffc664e8 | 432 | |
d049cc7f WD |
433 | #define ata_id_u32(id,n) \ |
434 | (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)])) | |
435 | #define ata_id_u64(id,n) \ | |
436 | ( ((u64) (id)[(n) + 3] << 48) | \ | |
437 | ((u64) (id)[(n) + 2] << 32) | \ | |
438 | ((u64) (id)[(n) + 1] << 16) | \ | |
439 | ((u64) (id)[(n) + 0]) ) | |
ffc664e8 | 440 | |
24b44844 DL |
441 | #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20) |
442 | ||
443 | static inline int ata_id_has_fua(const u16 *id) | |
444 | { | |
445 | if ((id[84] & 0xC000) != 0x4000) | |
446 | return 0; | |
447 | return id[84] & (1 << 6); | |
448 | } | |
449 | ||
450 | static inline int ata_id_has_flush(const u16 *id) | |
451 | { | |
452 | if ((id[83] & 0xC000) != 0x4000) | |
453 | return 0; | |
454 | return id[83] & (1 << 12); | |
455 | } | |
456 | ||
457 | static inline int ata_id_has_flush_ext(const u16 *id) | |
458 | { | |
459 | if ((id[83] & 0xC000) != 0x4000) | |
460 | return 0; | |
461 | return id[83] & (1 << 13); | |
462 | } | |
463 | ||
464 | static inline int ata_id_has_lba48(const u16 *id) | |
465 | { | |
466 | if ((id[83] & 0xC000) != 0x4000) | |
467 | return 0; | |
468 | if (!ata_id_u64(id, 100)) | |
469 | return 0; | |
470 | return id[83] & (1 << 10); | |
471 | } | |
472 | ||
473 | static inline int ata_id_hpa_enabled(const u16 *id) | |
474 | { | |
475 | /* Yes children, word 83 valid bits cover word 82 data */ | |
476 | if ((id[83] & 0xC000) != 0x4000) | |
477 | return 0; | |
478 | /* And 87 covers 85-87 */ | |
479 | if ((id[87] & 0xC000) != 0x4000) | |
480 | return 0; | |
481 | /* Check command sets enabled as well as supported */ | |
482 | if ((id[85] & ( 1 << 10)) == 0) | |
483 | return 0; | |
484 | return id[82] & (1 << 10); | |
485 | } | |
486 | ||
487 | static inline int ata_id_has_wcache(const u16 *id) | |
488 | { | |
489 | /* Yes children, word 83 valid bits cover word 82 data */ | |
490 | if ((id[83] & 0xC000) != 0x4000) | |
491 | return 0; | |
492 | return id[82] & (1 << 5); | |
493 | } | |
494 | ||
495 | static inline int ata_id_has_pm(const u16 *id) | |
496 | { | |
497 | if ((id[83] & 0xC000) != 0x4000) | |
498 | return 0; | |
499 | return id[82] & (1 << 3); | |
500 | } | |
501 | ||
502 | static inline int ata_id_rahead_enabled(const u16 *id) | |
503 | { | |
504 | if ((id[87] & 0xC000) != 0x4000) | |
505 | return 0; | |
506 | return id[85] & (1 << 6); | |
507 | } | |
508 | ||
509 | static inline int ata_id_wcache_enabled(const u16 *id) | |
510 | { | |
511 | if ((id[87] & 0xC000) != 0x4000) | |
512 | return 0; | |
513 | return id[85] & (1 << 5); | |
514 | } | |
ffc664e8 DL |
515 | |
516 | static inline unsigned int ata_id_major_version(const u16 *id) | |
517 | { | |
518 | unsigned int mver; | |
519 | ||
520 | if (id[ATA_ID_MAJOR_VER] == 0xFFFF) | |
521 | return 0; | |
522 | ||
523 | for (mver = 14; mver >= 1; mver--) | |
524 | if (id[ATA_ID_MAJOR_VER] & (1 << mver)) | |
525 | break; | |
526 | return mver; | |
527 | } | |
528 | ||
529 | static inline int ata_id_is_sata(const u16 *id) | |
530 | { | |
531 | return ata_id_major_version(id) >= 5 && id[93] == 0; | |
532 | } | |
533 | ||
24b44844 DL |
534 | static inline int ata_id_has_tpm(const u16 *id) |
535 | { | |
536 | /* The TPM bits are only valid on ATA8 */ | |
537 | if (ata_id_major_version(id) < 8) | |
538 | return 0; | |
539 | if ((id[48] & 0xC000) != 0x4000) | |
540 | return 0; | |
541 | return id[48] & (1 << 0); | |
542 | } | |
543 | ||
544 | static inline int ata_id_has_dword_io(const u16 *id) | |
545 | { | |
546 | /* ATA 8 reuses this flag for "trusted" computing */ | |
547 | if (ata_id_major_version(id) > 7) | |
548 | return 0; | |
549 | if (id[48] & (1 << 0)) | |
550 | return 1; | |
551 | return 0; | |
552 | } | |
553 | ||
554 | static inline int ata_id_current_chs_valid(const u16 *id) | |
555 | { | |
556 | /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command | |
557 | has not been issued to the device then the values of | |
558 | id[54] to id[56] are vendor specific. */ | |
559 | return (id[53] & 0x01) && /* Current translation valid */ | |
560 | id[54] && /* cylinders in current translation */ | |
561 | id[55] && /* heads in current translation */ | |
562 | id[55] <= 16 && | |
563 | id[56]; /* sectors in current translation */ | |
564 | } | |
565 | ||
566 | static inline int ata_id_is_cfa(const u16 *id) | |
567 | { | |
568 | u16 v = id[0]; | |
569 | if (v == 0x848A) /* Standard CF */ | |
570 | return 1; | |
571 | /* Could be CF hiding as standard ATA */ | |
572 | if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF && | |
573 | (id[82] & ( 1 << 2))) | |
574 | return 1; | |
575 | return 0; | |
576 | } | |
577 | ||
578 | static inline int ata_drive_40wire(const u16 *dev_id) | |
579 | { | |
580 | if (ata_id_is_sata(dev_id)) | |
581 | return 0; /* SATA */ | |
582 | if ((dev_id[93] & 0xE000) == 0x6000) | |
583 | return 0; /* 80 wire */ | |
584 | return 1; | |
585 | } | |
586 | ||
587 | static inline int ata_drive_40wire_relaxed(const u16 *dev_id) | |
588 | { | |
589 | if ((dev_id[93] & 0x2000) == 0x2000) | |
590 | return 0; /* 80 wire */ | |
591 | return 1; | |
592 | } | |
593 | ||
594 | static inline int atapi_cdb_len(const u16 *dev_id) | |
595 | { | |
596 | u16 tmp = dev_id[0] & 0x3; | |
597 | switch (tmp) { | |
598 | case 0: return 12; | |
599 | case 1: return 16; | |
600 | default: return -1; | |
601 | } | |
602 | } | |
603 | ||
604 | static inline int atapi_command_packet_set(const u16 *dev_id) | |
605 | { | |
606 | return (dev_id[0] >> 8) & 0x1f; | |
607 | } | |
608 | ||
609 | static inline int atapi_id_dmadir(const u16 *dev_id) | |
610 | { | |
611 | return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000); | |
612 | } | |
613 | ||
614 | static inline int is_multi_taskfile(struct ata_taskfile *tf) | |
615 | { | |
616 | return (tf->command == ATA_CMD_READ_MULTI) || | |
617 | (tf->command == ATA_CMD_WRITE_MULTI) || | |
618 | (tf->command == ATA_CMD_READ_MULTI_EXT) || | |
619 | (tf->command == ATA_CMD_WRITE_MULTI_EXT) || | |
620 | (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT); | |
621 | } | |
622 | ||
623 | static inline int ata_ok(u8 status) | |
624 | { | |
625 | return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) | |
626 | == ATA_DRDY); | |
627 | } | |
628 | ||
629 | static inline int lba_28_ok(u64 block, u32 n_block) | |
630 | { | |
631 | /* check the ending block number */ | |
632 | return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256); | |
633 | } | |
634 | ||
635 | static inline int lba_48_ok(u64 block, u32 n_block) | |
636 | { | |
637 | /* check the ending block number */ | |
638 | return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536); | |
639 | } | |
640 | ||
641 | #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff) | |
642 | #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16) | |
643 | #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff) | |
644 | #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf) | |
645 | ||
ffc664e8 DL |
646 | u64 ata_id_n_sectors(u16 *id); |
647 | u32 ata_dev_classify(u32 sig); | |
648 | void ata_id_c_string(const u16 *id, unsigned char *s, | |
649 | unsigned int ofs, unsigned int len); | |
650 | void ata_dump_id(u16 *id); | |
651 | void ata_swap_buf_le16(u16 *buf, unsigned int buf_words); | |
652 | ||
653 | #endif /* __LIBATA_H__ */ |