[people/ms/u-boot.git] / include / linux / mtd / doc2000.h

/*
 * Linux driver for Disk-On-Chip devices
 *
 * Copyright (C) 1999 Machine Vision Holdings, Inc.
 * Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org>
 * Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com>
 * Copyright (C) 2002-2003 SnapGear Inc
 *
 * $Id: doc2000.h,v 1.25 2005/11/07 11:14:54 gleixner Exp $
 *
 * Released under GPL
 */

#ifndef __MTD_DOC2000_H__
#define __MTD_DOC2000_H__

#include <linux/mtd/mtd.h>
#if 0
#include <linux/mutex.h>
#endif

#define DoC_Sig1 0
#define DoC_Sig2 1

#define DoC_ChipID		0x1000
#define DoC_DOCStatus		0x1001
#define DoC_DOCControl		0x1002
#define DoC_FloorSelect		0x1003
#define DoC_CDSNControl		0x1004
#define DoC_CDSNDeviceSelect	0x1005
#define DoC_ECCConf		0x1006
#define DoC_2k_ECCStatus	0x1007

#define DoC_CDSNSlowIO		0x100d
#define DoC_ECCSyndrome0	0x1010
#define DoC_ECCSyndrome1	0x1011
#define DoC_ECCSyndrome2	0x1012
#define DoC_ECCSyndrome3	0x1013
#define DoC_ECCSyndrome4	0x1014
#define DoC_ECCSyndrome5	0x1015
#define DoC_AliasResolution	0x101b
#define DoC_ConfigInput		0x101c
#define DoC_ReadPipeInit	0x101d
#define DoC_WritePipeTerm	0x101e
#define DoC_LastDataRead	0x101f
#define DoC_NOP			0x1020

#define DoC_Mil_CDSN_IO		0x0800
#define DoC_2k_CDSN_IO		0x1800

#define DoC_Mplus_NOP			0x1002
#define DoC_Mplus_AliasResolution	0x1004
#define DoC_Mplus_DOCControl		0x1006
#define DoC_Mplus_AccessStatus		0x1008
#define DoC_Mplus_DeviceSelect		0x1008
#define DoC_Mplus_Configuration		0x100a
#define DoC_Mplus_OutputControl		0x100c
#define DoC_Mplus_FlashControl		0x1020
#define DoC_Mplus_FlashSelect 		0x1022
#define DoC_Mplus_FlashCmd		0x1024
#define DoC_Mplus_FlashAddress		0x1026
#define DoC_Mplus_FlashData0		0x1028
#define DoC_Mplus_FlashData1		0x1029
#define DoC_Mplus_ReadPipeInit		0x102a
#define DoC_Mplus_LastDataRead		0x102c
#define DoC_Mplus_LastDataRead1		0x102d
#define DoC_Mplus_WritePipeTerm 	0x102e
#define DoC_Mplus_ECCSyndrome0		0x1040
#define DoC_Mplus_ECCSyndrome1		0x1041
#define DoC_Mplus_ECCSyndrome2		0x1042
#define DoC_Mplus_ECCSyndrome3		0x1043
#define DoC_Mplus_ECCSyndrome4		0x1044
#define DoC_Mplus_ECCSyndrome5		0x1045
#define DoC_Mplus_ECCConf 		0x1046
#define DoC_Mplus_Toggle		0x1046
#define DoC_Mplus_DownloadStatus	0x1074
#define DoC_Mplus_CtrlConfirm		0x1076
#define DoC_Mplus_Power			0x1fff

/* How to access the device?
 * On ARM, it'll be mmap'd directly with 32-bit wide accesses.
 * On PPC, it's mmap'd and 16-bit wide.
 * Others use readb/writeb
 */
#if defined(__arm__)
#define ReadDOC_(adr, reg)      ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2))))
#define WriteDOC_(d, adr, reg)  do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0)
#define DOC_IOREMAP_LEN 0x8000
#elif defined(__ppc__)
#define ReadDOC_(adr, reg)      ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1))))
#define WriteDOC_(d, adr, reg)  do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0)
#define DOC_IOREMAP_LEN 0x4000
#else
#define ReadDOC_(adr, reg)      readb((void __iomem *)(adr) + (reg))
#define WriteDOC_(d, adr, reg)  writeb(d, (void __iomem *)(adr) + (reg))
#define DOC_IOREMAP_LEN 0x2000

#endif

#if defined(__i386__) || defined(__x86_64__)
#define USE_MEMCPY
#endif

/* These are provided to directly use the DoC_xxx defines */
#define ReadDOC(adr, reg)      ReadDOC_(adr,DoC_##reg)
#define WriteDOC(d, adr, reg)  WriteDOC_(d,adr,DoC_##reg)

#define DOC_MODE_RESET		0
#define DOC_MODE_NORMAL		1
#define DOC_MODE_RESERVED1	2
#define DOC_MODE_RESERVED2	3

#define DOC_MODE_CLR_ERR	0x80
#define	DOC_MODE_RST_LAT	0x10
#define	DOC_MODE_BDECT		0x08
#define DOC_MODE_MDWREN	0x04

#define DOC_ChipID_Doc2k	0x20
#define DOC_ChipID_Doc2kTSOP	0x21	/* internal number for MTD */
#define DOC_ChipID_DocMil	0x30
#define DOC_ChipID_DocMilPlus32	0x40
#define DOC_ChipID_DocMilPlus16	0x41

#define CDSN_CTRL_FR_B		0x80
#define CDSN_CTRL_FR_B0		0x40
#define CDSN_CTRL_FR_B1		0x80

#define CDSN_CTRL_ECC_IO	0x20
#define CDSN_CTRL_FLASH_IO	0x10
#define CDSN_CTRL_WP		0x08
#define CDSN_CTRL_ALE		0x04
#define CDSN_CTRL_CLE		0x02
#define CDSN_CTRL_CE		0x01

#define DOC_ECC_RESET		0
#define DOC_ECC_ERROR		0x80
#define DOC_ECC_RW		0x20
#define DOC_ECC__EN		0x08
#define DOC_TOGGLE_BIT		0x04
#define DOC_ECC_RESV		0x02
#define DOC_ECC_IGNORE		0x01

#define DOC_FLASH_CE		0x80
#define DOC_FLASH_WP		0x40
#define DOC_FLASH_BANK		0x02

/* We have to also set the reserved bit 1 for enable */
#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV)
#define DOC_ECC_DIS (DOC_ECC_RESV)

struct Nand {
	char floor, chip;
	unsigned long curadr;
	unsigned char curmode;
	/* Also some erase/write/pipeline info when we get that far */
};

#define MAX_FLOORS 4
#define MAX_CHIPS 4

#define MAX_FLOORS_MIL 1
#define MAX_CHIPS_MIL 1

#define MAX_FLOORS_MPLUS 2
#define MAX_CHIPS_MPLUS 1

#define ADDR_COLUMN 1
#define ADDR_PAGE 2
#define ADDR_COLUMN_PAGE 3

struct DiskOnChip {
	unsigned long physadr;
	void __iomem *virtadr;
	unsigned long totlen;
	unsigned char ChipID; /* Type of DiskOnChip */
	int ioreg;

	unsigned long mfr; /* Flash IDs - only one type of flash per device */
	unsigned long id;
	int chipshift;
	char page256;
	char pageadrlen;
	char interleave; /* Internal interleaving - Millennium Plus style */
	unsigned long erasesize;

	int curfloor;
	int curchip;

	int numchips;
	struct Nand *chips;
	struct mtd_info *nextdoc;
/* XXX U-BOOT XXX */
#if 0
	struct mutex lock;
#endif
};

int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]);

/* XXX U-BOOT XXX */
#if 1
/*
 * NAND Flash Manufacturer ID Codes
 */
#define NAND_MFR_TOSHIBA   0x98
#define NAND_MFR_SAMSUNG   0xec
#endif

#endif /* __MTD_DOC2000_H__ */
Commit	Line	Data
cfa460ad WJ	1	/*
	2	* Linux driver for Disk-On-Chip devices
	3	*
	4	* Copyright (C) 1999 Machine Vision Holdings, Inc.
	5	* Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org>
	6	* Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com>
	7	* Copyright (C) 2002-2003 SnapGear Inc
	8	*
	9	* $Id: doc2000.h,v 1.25 2005/11/07 11:14:54 gleixner Exp $
	10	*
	11	* Released under GPL
	12	*/
012771d8 WD	13
	14	#ifndef __MTD_DOC2000_H__
	15	#define __MTD_DOC2000_H__
	16
cfa460ad WJ	17	#include <linux/mtd/mtd.h>
	18	#if 0
	19	#include <linux/mutex.h>
	20	#endif
012771d8 WD	21
	22	#define DoC_Sig1 0
	23	#define DoC_Sig2 1
	24
	25	#define DoC_ChipID 0x1000
	26	#define DoC_DOCStatus 0x1001
	27	#define DoC_DOCControl 0x1002
	28	#define DoC_FloorSelect 0x1003
	29	#define DoC_CDSNControl 0x1004
53677ef1 WD	30	#define DoC_CDSNDeviceSelect 0x1005
53677ef1 WD	31	#define DoC_ECCConf 0x1006
012771d8 WD	32	#define DoC_2k_ECCStatus 0x1007
	33
	34	#define DoC_CDSNSlowIO 0x100d
	35	#define DoC_ECCSyndrome0 0x1010
	36	#define DoC_ECCSyndrome1 0x1011
	37	#define DoC_ECCSyndrome2 0x1012
	38	#define DoC_ECCSyndrome3 0x1013
	39	#define DoC_ECCSyndrome4 0x1014
	40	#define DoC_ECCSyndrome5 0x1015
53677ef1	41	#define DoC_AliasResolution 0x101b
012771d8	42	#define DoC_ConfigInput 0x101c
53677ef1 WD	43	#define DoC_ReadPipeInit 0x101d
	44	#define DoC_WritePipeTerm 0x101e
	45	#define DoC_LastDataRead 0x101f
	46	#define DoC_NOP 0x1020
012771d8	47
53677ef1 WD	48	#define DoC_Mil_CDSN_IO 0x0800
53677ef1 WD	49	#define DoC_2k_CDSN_IO 0x1800
012771d8	50
cfa460ad WJ	51	#define DoC_Mplus_NOP 0x1002
	52	#define DoC_Mplus_AliasResolution 0x1004
	53	#define DoC_Mplus_DOCControl 0x1006
	54	#define DoC_Mplus_AccessStatus 0x1008
	55	#define DoC_Mplus_DeviceSelect 0x1008
	56	#define DoC_Mplus_Configuration 0x100a
	57	#define DoC_Mplus_OutputControl 0x100c
	58	#define DoC_Mplus_FlashControl 0x1020
	59	#define DoC_Mplus_FlashSelect 0x1022
	60	#define DoC_Mplus_FlashCmd 0x1024
	61	#define DoC_Mplus_FlashAddress 0x1026
	62	#define DoC_Mplus_FlashData0 0x1028
	63	#define DoC_Mplus_FlashData1 0x1029
	64	#define DoC_Mplus_ReadPipeInit 0x102a
	65	#define DoC_Mplus_LastDataRead 0x102c
	66	#define DoC_Mplus_LastDataRead1 0x102d
	67	#define DoC_Mplus_WritePipeTerm 0x102e
	68	#define DoC_Mplus_ECCSyndrome0 0x1040
	69	#define DoC_Mplus_ECCSyndrome1 0x1041
	70	#define DoC_Mplus_ECCSyndrome2 0x1042
	71	#define DoC_Mplus_ECCSyndrome3 0x1043
	72	#define DoC_Mplus_ECCSyndrome4 0x1044
	73	#define DoC_Mplus_ECCSyndrome5 0x1045
	74	#define DoC_Mplus_ECCConf 0x1046
	75	#define DoC_Mplus_Toggle 0x1046
	76	#define DoC_Mplus_DownloadStatus 0x1074
	77	#define DoC_Mplus_CtrlConfirm 0x1076
	78	#define DoC_Mplus_Power 0x1fff
	79
	80	/* How to access the device?
	81	* On ARM, it'll be mmap'd directly with 32-bit wide accesses.
	82	* On PPC, it's mmap'd and 16-bit wide.
	83	* Others use readb/writeb
	84	*/
	85	#if defined(__arm__)
	86	#define ReadDOC_(adr, reg) ((unsigned char)((volatile __u32 )(((unsigned long)adr)+((reg)<<2))))
	87	#define WriteDOC_(d, adr, reg) do{ (volatile __u32 )(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0)
	88	#define DOC_IOREMAP_LEN 0x8000
	89	#elif defined(__ppc__)
	90	#define ReadDOC_(adr, reg) ((unsigned char)((volatile __u16 )(((unsigned long)adr)+((reg)<<1))))
	91	#define WriteDOC_(d, adr, reg) do{ (volatile __u16 )(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0)
	92	#define DOC_IOREMAP_LEN 0x4000
	93	#else
	94	#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg))
	95	#define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg))
	96	#define DOC_IOREMAP_LEN 0x2000
	97
	98	#endif
	99
	100	#if defined(__i386__) \|\| defined(__x86_64__)
	101	#define USE_MEMCPY
	102	#endif
012771d8 WD	103
	104	/* These are provided to directly use the DoC_xxx defines */
	105	#define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg)
	106	#define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg)
	107
53677ef1 WD	108	#define DOC_MODE_RESET 0
	109	#define DOC_MODE_NORMAL 1
	110	#define DOC_MODE_RESERVED1 2
	111	#define DOC_MODE_RESERVED2 3
	112
53677ef1	113	#define DOC_MODE_CLR_ERR 0x80
cfa460ad WJ	114	#define DOC_MODE_RST_LAT 0x10
	115	#define DOC_MODE_BDECT 0x08
	116	#define DOC_MODE_MDWREN 0x04
53677ef1	117
53677ef1	118	#define DOC_ChipID_Doc2k 0x20
cfa460ad	119	#define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */
53677ef1	120	#define DOC_ChipID_DocMil 0x30
cfa460ad WJ	121	#define DOC_ChipID_DocMilPlus32 0x40
cfa460ad WJ	122	#define DOC_ChipID_DocMilPlus16 0x41
53677ef1 WD	123
53677ef1 WD	124	#define CDSN_CTRL_FR_B 0x80
cfa460ad WJ	125	#define CDSN_CTRL_FR_B0 0x40
	126	#define CDSN_CTRL_FR_B1 0x80
	127
53677ef1 WD	128	#define CDSN_CTRL_ECC_IO 0x20
	129	#define CDSN_CTRL_FLASH_IO 0x10
	130	#define CDSN_CTRL_WP 0x08
	131	#define CDSN_CTRL_ALE 0x04
	132	#define CDSN_CTRL_CLE 0x02
	133	#define CDSN_CTRL_CE 0x01
	134
	135	#define DOC_ECC_RESET 0
	136	#define DOC_ECC_ERROR 0x80
	137	#define DOC_ECC_RW 0x20
	138	#define DOC_ECC__EN 0x08
	139	#define DOC_TOGGLE_BIT 0x04
	140	#define DOC_ECC_RESV 0x02
012771d8 WD	141	#define DOC_ECC_IGNORE 0x01
012771d8 WD	142
cfa460ad WJ	143	#define DOC_FLASH_CE 0x80
	144	#define DOC_FLASH_WP 0x40
	145	#define DOC_FLASH_BANK 0x02
	146
012771d8 WD	147	/* We have to also set the reserved bit 1 for enable */
	148	#define DOC_ECC_EN (DOC_ECC__EN \| DOC_ECC_RESV)
	149	#define DOC_ECC_DIS (DOC_ECC_RESV)
	150
cfa460ad WJ	151	struct Nand {
	152	char floor, chip;
	153	unsigned long curadr;
	154	unsigned char curmode;
	155	/* Also some erase/write/pipeline info when we get that far */
	156	};
	157
012771d8 WD	158	#define MAX_FLOORS 4
	159	#define MAX_CHIPS 4
	160
cfa460ad	161	#define MAX_FLOORS_MIL 1
012771d8 WD	162	#define MAX_CHIPS_MIL 1
012771d8 WD	163
cfa460ad WJ	164	#define MAX_FLOORS_MPLUS 2
	165	#define MAX_CHIPS_MPLUS 1
	166
012771d8 WD	167	#define ADDR_COLUMN 1
	168	#define ADDR_PAGE 2
	169	#define ADDR_COLUMN_PAGE 3
	170
	171	struct DiskOnChip {
	172	unsigned long physadr;
cfa460ad	173	void __iomem *virtadr;
012771d8	174	unsigned long totlen;
cfa460ad	175	unsigned char ChipID; /* Type of DiskOnChip */
012771d8 WD	176	int ioreg;
012771d8 WD	177
012771d8 WD	178	unsigned long mfr; /* Flash IDs - only one type of flash per device */
	179	unsigned long id;
	180	int chipshift;
	181	char page256;
	182	char pageadrlen;
cfa460ad	183	char interleave; /* Internal interleaving - Millennium Plus style */
012771d8 WD	184	unsigned long erasesize;
	185
	186	int curfloor;
	187	int curchip;
	188
	189	int numchips;
	190	struct Nand *chips;
cfa460ad WJ	191	struct mtd_info *nextdoc;
	192	/* XXX U-BOOT XXX */
	193	#if 0
	194	struct mutex lock;
	195	#endif
012771d8 WD	196	};
012771d8 WD	197
012771d8 WD	198	int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]);
012771d8 WD	199
cfa460ad WJ	200	/* XXX U-BOOT XXX */
cfa460ad WJ	201	#if 1
2fc000d7 MB	202	/*
	203	* NAND Flash Manufacturer ID Codes
	204	*/
cfa460ad WJ	205	#define NAND_MFR_TOSHIBA 0x98
	206	#define NAND_MFR_SAMSUNG 0xec
	207	#endif
2fc000d7	208
012771d8	209	#endif /* __MTD_DOC2000_H__ */