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d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
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2#ifndef __LINUX_REGMAP_H
3#define __LINUX_REGMAP_H
4
5/*
6 * Register map access API
7 *
8 * Copyright 2011 Wolfson Microelectronics plc
9 *
10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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11 */
12
b83a313b 13#include <linux/list.h>
6863ca62 14#include <linux/rbtree.h>
f15cd6d9 15#include <linux/ktime.h>
adf08d48 16#include <linux/delay.h>
49ccc142 17#include <linux/err.h>
3f0fa9a8 18#include <linux/bug.h>
3cfe7a74 19#include <linux/lockdep.h>
e44ab4e1 20#include <linux/iopoll.h>
5cc2013b 21#include <linux/fwnode.h>
b83a313b 22
de477254 23struct module;
31895662 24struct clk;
313162d0 25struct device;
12479382 26struct device_node;
bf0d29fb 27struct fsi_device;
9943fa30 28struct i2c_client;
6445500b 29struct i3c_device;
90f790d2 30struct irq_domain;
1f89d2fe 31struct mdio_device;
7d6f7fb0 32struct slim_device;
a676f083 33struct spi_device;
a01779f8 34struct spmi_device;
b83d2ff0 35struct regmap;
6863ca62 36struct regmap_range_cfg;
67252287 37struct regmap_field;
22853223 38struct snd_ac97;
7c22ce6e 39struct sdw_slave;
9943fa30 40
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41/* An enum of all the supported cache types */
42enum regcache_type {
43 REGCACHE_NONE,
28644c80 44 REGCACHE_RBTREE,
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45 REGCACHE_COMPRESSED,
46 REGCACHE_FLAT,
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47};
48
bd20eb54 49/**
2cf8e2df 50 * struct reg_default - Default value for a register.
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51 *
52 * @reg: Register address.
53 * @def: Register default value.
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54 *
55 * We use an array of structs rather than a simple array as many modern devices
56 * have very sparse register maps.
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57 */
58struct reg_default {
59 unsigned int reg;
60 unsigned int def;
61};
62
8019ff6c 63/**
2cf8e2df 64 * struct reg_sequence - An individual write from a sequence of writes.
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65 *
66 * @reg: Register address.
67 * @def: Register value.
2de9d600 68 * @delay_us: Delay to be applied after the register write in microseconds
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69 *
70 * Register/value pairs for sequences of writes with an optional delay in
71 * microseconds to be applied after each write.
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72 */
73struct reg_sequence {
74 unsigned int reg;
75 unsigned int def;
2de9d600 76 unsigned int delay_us;
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77};
78
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79#define REG_SEQ(_reg, _def, _delay_us) { \
80 .reg = _reg, \
81 .def = _def, \
82 .delay_us = _delay_us, \
83 }
84#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0)
85
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86/**
87 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
2cf8e2df 88 *
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89 * @map: Regmap to read from
90 * @addr: Address to poll
91 * @val: Unsigned integer variable to read the value into
92 * @cond: Break condition (usually involving @val)
93 * @sleep_us: Maximum time to sleep between reads in us (0
94 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 95 * is used (see Documentation/timers/timers-howto.rst).
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96 * @timeout_us: Timeout in us, 0 means never timeout
97 *
98 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
99 * error return value in case of a error read. In the two former cases,
100 * the last read value at @addr is stored in @val. Must not be called
101 * from atomic context if sleep_us or timeout_us are used.
102 *
103 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
104 */
105#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
106({ \
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107 int __ret, __tmp; \
108 __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
109 sleep_us, timeout_us, false, (map), (addr), &(val)); \
110 __ret ?: __tmp; \
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111})
112
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113/**
114 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
115 *
116 * @map: Regmap to read from
117 * @addr: Address to poll
118 * @val: Unsigned integer variable to read the value into
119 * @cond: Break condition (usually involving @val)
120 * @delay_us: Time to udelay between reads in us (0 tight-loops).
121 * Should be less than ~10us since udelay is used
122 * (see Documentation/timers/timers-howto.rst).
123 * @timeout_us: Timeout in us, 0 means never timeout
124 *
125 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
126 * error return value in case of a error read. In the two former cases,
127 * the last read value at @addr is stored in @val.
128 *
129 * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
130 *
131 * Note: In general regmap cannot be used in atomic context. If you want to use
132 * this macro then first setup your regmap for atomic use (flat or no cache
133 * and MMIO regmap).
134 */
135#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
136({ \
137 u64 __timeout_us = (timeout_us); \
138 unsigned long __delay_us = (delay_us); \
139 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
140 int __ret; \
141 for (;;) { \
142 __ret = regmap_read((map), (addr), &(val)); \
143 if (__ret) \
144 break; \
145 if (cond) \
146 break; \
147 if ((__timeout_us) && \
148 ktime_compare(ktime_get(), __timeout) > 0) { \
149 __ret = regmap_read((map), (addr), &(val)); \
150 break; \
151 } \
152 if (__delay_us) \
153 udelay(__delay_us); \
154 } \
155 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
156})
157
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158/**
159 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
160 *
161 * @field: Regmap field to read from
162 * @val: Unsigned integer variable to read the value into
163 * @cond: Break condition (usually involving @val)
164 * @sleep_us: Maximum time to sleep between reads in us (0
165 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 166 * is used (see Documentation/timers/timers-howto.rst).
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167 * @timeout_us: Timeout in us, 0 means never timeout
168 *
169 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
170 * error return value in case of a error read. In the two former cases,
171 * the last read value at @addr is stored in @val. Must not be called
172 * from atomic context if sleep_us or timeout_us are used.
173 *
174 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
175 */
176#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
177({ \
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178 int __ret, __tmp; \
179 __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
180 sleep_us, timeout_us, false, (field), &(val)); \
181 __ret ?: __tmp; \
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182})
183
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184#ifdef CONFIG_REGMAP
185
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186enum regmap_endian {
187 /* Unspecified -> 0 -> Backwards compatible default */
188 REGMAP_ENDIAN_DEFAULT = 0,
189 REGMAP_ENDIAN_BIG,
190 REGMAP_ENDIAN_LITTLE,
191 REGMAP_ENDIAN_NATIVE,
192};
193
76aad392 194/**
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195 * struct regmap_range - A register range, used for access related checks
196 * (readable/writeable/volatile/precious checks)
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197 *
198 * @range_min: address of first register
199 * @range_max: address of last register
200 */
201struct regmap_range {
202 unsigned int range_min;
203 unsigned int range_max;
204};
205
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206#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
207
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208/**
209 * struct regmap_access_table - A table of register ranges for access checks
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210 *
211 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
212 * @n_yes_ranges: size of the above array
213 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
214 * @n_no_ranges: size of the above array
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215 *
216 * A table of ranges including some yes ranges and some no ranges.
217 * If a register belongs to a no_range, the corresponding check function
218 * will return false. If a register belongs to a yes range, the corresponding
219 * check function will return true. "no_ranges" are searched first.
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220 */
221struct regmap_access_table {
222 const struct regmap_range *yes_ranges;
223 unsigned int n_yes_ranges;
224 const struct regmap_range *no_ranges;
225 unsigned int n_no_ranges;
226};
227
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228typedef void (*regmap_lock)(void *);
229typedef void (*regmap_unlock)(void *);
230
dd898b20 231/**
2cf8e2df 232 * struct regmap_config - Configuration for the register map of a device.
dd898b20 233 *
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234 * @name: Optional name of the regmap. Useful when a device has multiple
235 * register regions.
236 *
dd898b20 237 * @reg_bits: Number of bits in a register address, mandatory.
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238 * @reg_stride: The register address stride. Valid register addresses are a
239 * multiple of this value. If set to 0, a value of 1 will be
240 * used.
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241 * @reg_downshift: The number of bits to downshift the register before
242 * performing any operations.
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243 * @reg_base: Value to be added to every register address before performing any
244 * operation.
82159ba8 245 * @pad_bits: Number of bits of padding between register and value.
dd898b20 246 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 247 *
3566cc9d 248 * @writeable_reg: Optional callback returning true if the register
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249 * can be written to. If this field is NULL but wr_table
250 * (see below) is not, the check is performed on such table
251 * (a register is writeable if it belongs to one of the ranges
252 * specified by wr_table).
3566cc9d 253 * @readable_reg: Optional callback returning true if the register
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254 * can be read from. If this field is NULL but rd_table
255 * (see below) is not, the check is performed on such table
256 * (a register is readable if it belongs to one of the ranges
257 * specified by rd_table).
3566cc9d 258 * @volatile_reg: Optional callback returning true if the register
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259 * value can't be cached. If this field is NULL but
260 * volatile_table (see below) is not, the check is performed on
261 * such table (a register is volatile if it belongs to one of
262 * the ranges specified by volatile_table).
bdc39644 263 * @precious_reg: Optional callback returning true if the register
76aad392 264 * should not be read outside of a call from the driver
bdc39644 265 * (e.g., a clear on read interrupt status register). If this
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266 * field is NULL but precious_table (see below) is not, the
267 * check is performed on such table (a register is precious if
268 * it belongs to one of the ranges specified by precious_table).
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269 * @writeable_noinc_reg: Optional callback returning true if the register
270 * supports multiple write operations without incrementing
271 * the register number. If this field is NULL but
272 * wr_noinc_table (see below) is not, the check is
273 * performed on such table (a register is no increment
274 * writeable if it belongs to one of the ranges specified
275 * by wr_noinc_table).
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276 * @readable_noinc_reg: Optional callback returning true if the register
277 * supports multiple read operations without incrementing
278 * the register number. If this field is NULL but
279 * rd_noinc_table (see below) is not, the check is
280 * performed on such table (a register is no increment
281 * readable if it belongs to one of the ranges specified
282 * by rd_noinc_table).
c9b41fcf 283 * @disable_locking: This regmap is either protected by external means or
6611561a 284 * is guaranteed not to be accessed from multiple threads.
c9b41fcf 285 * Don't use any locking mechanisms.
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286 * @lock: Optional lock callback (overrides regmap's default lock
287 * function, based on spinlock or mutex).
288 * @unlock: As above for unlocking.
289 * @lock_arg: this field is passed as the only argument of lock/unlock
290 * functions (ignored in case regular lock/unlock functions
291 * are not overridden).
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292 * @reg_read: Optional callback that if filled will be used to perform
293 * all the reads from the registers. Should only be provided for
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294 * devices whose read operation cannot be represented as a simple
295 * read operation on a bus such as SPI, I2C, etc. Most of the
296 * devices do not need this.
d2a5884a 297 * @reg_write: Same as above for writing.
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298 * @reg_update_bits: Optional callback that if filled will be used to perform
299 * all the update_bits(rmw) operation. Should only be provided
300 * if the function require special handling with lock and reg
301 * handling and the operation cannot be represented as a simple
302 * update_bits operation on a bus such as SPI, I2C, etc.
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303 * @read: Optional callback that if filled will be used to perform all the
304 * bulk reads from the registers. Data is returned in the buffer used
305 * to transmit data.
306 * @write: Same as above for writing.
307 * @max_raw_read: Max raw read size that can be used on the device.
308 * @max_raw_write: Max raw write size that can be used on the device.
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309 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
310 * to perform locking. This field is ignored if custom lock/unlock
311 * functions are used (see fields lock/unlock of struct regmap_config).
312 * This field is a duplicate of a similar file in
313 * 'struct regmap_bus' and serves exact same purpose.
314 * Use it only for "no-bus" cases.
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315 * @io_port: Support IO port accessors. Makes sense only when MMIO vs. IO port
316 * access can be distinguished.
b429fab4 317 * @max_register: Optional, specifies the maximum valid register address.
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318 * @wr_table: Optional, points to a struct regmap_access_table specifying
319 * valid ranges for write access.
320 * @rd_table: As above, for read access.
321 * @volatile_table: As above, for volatile registers.
322 * @precious_table: As above, for precious registers.
cdf6b11d 323 * @wr_noinc_table: As above, for no increment writeable registers.
74fe7b55 324 * @rd_noinc_table: As above, for no increment readable registers.
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325 * @reg_defaults: Power on reset values for registers (for use with
326 * register cache support).
327 * @num_reg_defaults: Number of elements in reg_defaults.
6f306441 328 *
f50e38c9 329 * @read_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 330 * a read.
f50e38c9 331 * @write_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 332 * a write. If both read_flag_mask and write_flag_mask are
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333 * empty and zero_flag_mask is not set the regmap_bus default
334 * masks are used.
335 * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
336 * if they are both empty.
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337 * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers.
338 * This can avoid load on devices which don't require strict
339 * orderings, but drivers should carefully add any explicit
340 * memory barriers when they may require them.
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341 * @use_single_read: If set, converts the bulk read operation into a series of
342 * single read operations. This is useful for a device that
343 * does not support bulk read.
344 * @use_single_write: If set, converts the bulk write operation into a series of
345 * single write operations. This is useful for a device that
346 * does not support bulk write.
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347 * @can_multi_write: If set, the device supports the multi write mode of bulk
348 * write operations, if clear multi write requests will be
349 * split into individual write operations
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350 *
351 * @cache_type: The actual cache type.
352 * @reg_defaults_raw: Power on reset values for registers (for use with
353 * register cache support).
354 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
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355 * @reg_format_endian: Endianness for formatted register addresses. If this is
356 * DEFAULT, the @reg_format_endian_default value from the
357 * regmap bus is used.
358 * @val_format_endian: Endianness for formatted register values. If this is
359 * DEFAULT, the @reg_format_endian_default value from the
360 * regmap bus is used.
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361 *
362 * @ranges: Array of configuration entries for virtual address ranges.
363 * @num_ranges: Number of range configuration entries.
a4887813 364 * @use_hwlock: Indicate if a hardware spinlock should be used.
67021f25 365 * @use_raw_spinlock: Indicate if a raw spinlock should be used.
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366 * @hwlock_id: Specify the hardware spinlock id.
367 * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
368 * HWLOCK_IRQ or 0.
21f8e482 369 * @can_sleep: Optional, specifies whether regmap operations can sleep.
dd898b20 370 */
b83a313b 371struct regmap_config {
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372 const char *name;
373
b83a313b 374 int reg_bits;
f01ee60f 375 int reg_stride;
86fc59ef 376 int reg_downshift;
0074f3f2 377 unsigned int reg_base;
82159ba8 378 int pad_bits;
b83a313b 379 int val_bits;
2e2ae66d 380
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381 bool (*writeable_reg)(struct device *dev, unsigned int reg);
382 bool (*readable_reg)(struct device *dev, unsigned int reg);
383 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 384 bool (*precious_reg)(struct device *dev, unsigned int reg);
cdf6b11d 385 bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
74fe7b55 386 bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
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387
388 bool disable_locking;
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389 regmap_lock lock;
390 regmap_unlock unlock;
391 void *lock_arg;
bd20eb54 392
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393 int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
394 int (*reg_write)(void *context, unsigned int reg, unsigned int val);
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395 int (*reg_update_bits)(void *context, unsigned int reg,
396 unsigned int mask, unsigned int val);
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397 /* Bulk read/write */
398 int (*read)(void *context, const void *reg_buf, size_t reg_size,
399 void *val_buf, size_t val_size);
400 int (*write)(void *context, const void *data, size_t count);
401 size_t max_raw_read;
402 size_t max_raw_write;
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403
404 bool fast_io;
93ce5576 405 bool io_port;
d2a5884a 406
bd20eb54 407 unsigned int max_register;
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408 const struct regmap_access_table *wr_table;
409 const struct regmap_access_table *rd_table;
410 const struct regmap_access_table *volatile_table;
411 const struct regmap_access_table *precious_table;
cdf6b11d 412 const struct regmap_access_table *wr_noinc_table;
74fe7b55 413 const struct regmap_access_table *rd_noinc_table;
720e4616 414 const struct reg_default *reg_defaults;
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415 unsigned int num_reg_defaults;
416 enum regcache_type cache_type;
417 const void *reg_defaults_raw;
418 unsigned int num_reg_defaults_raw;
6f306441 419
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420 unsigned long read_flag_mask;
421 unsigned long write_flag_mask;
9bf485c9 422 bool zero_flag_mask;
2e33caf1 423
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424 bool use_single_read;
425 bool use_single_write;
6e1e90ec 426 bool use_relaxed_mmio;
e894c3f4 427 bool can_multi_write;
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428
429 enum regmap_endian reg_format_endian;
430 enum regmap_endian val_format_endian;
38e23194 431
6863ca62 432 const struct regmap_range_cfg *ranges;
e3549cd0 433 unsigned int num_ranges;
8698b936 434
a4887813 435 bool use_hwlock;
67021f25 436 bool use_raw_spinlock;
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437 unsigned int hwlock_id;
438 unsigned int hwlock_mode;
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439
440 bool can_sleep;
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441};
442
443/**
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444 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
445 * registers.
6863ca62 446 *
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447 * @name: Descriptive name for diagnostics
448 *
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449 * @range_min: Address of the lowest register address in virtual range.
450 * @range_max: Address of the highest register in virtual range.
451 *
2cf8e2df 452 * @selector_reg: Register with selector field.
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453 * @selector_mask: Bit mask for selector value.
454 * @selector_shift: Bit shift for selector value.
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455 *
456 * @window_start: Address of first (lowest) register in data window.
457 * @window_len: Number of registers in data window.
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458 *
459 * Registers, mapped to this virtual range, are accessed in two steps:
460 * 1. page selector register update;
461 * 2. access through data window registers.
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462 */
463struct regmap_range_cfg {
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464 const char *name;
465
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466 /* Registers of virtual address range */
467 unsigned int range_min;
468 unsigned int range_max;
469
470 /* Page selector for indirect addressing */
471 unsigned int selector_reg;
472 unsigned int selector_mask;
473 int selector_shift;
474
475 /* Data window (per each page) */
476 unsigned int window_start;
477 unsigned int window_len;
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478};
479
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480struct regmap_async;
481
0135bbcc 482typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 483 size_t count);
0135bbcc 484typedef int (*regmap_hw_gather_write)(void *context,
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485 const void *reg, size_t reg_len,
486 const void *val, size_t val_len);
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487typedef int (*regmap_hw_async_write)(void *context,
488 const void *reg, size_t reg_len,
489 const void *val, size_t val_len,
490 struct regmap_async *async);
0135bbcc 491typedef int (*regmap_hw_read)(void *context,
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492 const void *reg_buf, size_t reg_size,
493 void *val_buf, size_t val_size);
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494typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
495 unsigned int *val);
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496typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg,
497 void *val, size_t val_count);
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498typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
499 unsigned int val);
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500typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg,
501 const void *val, size_t val_count);
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502typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
503 unsigned int mask, unsigned int val);
0d509f2b 504typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
0135bbcc 505typedef void (*regmap_hw_free_context)(void *context);
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506
507/**
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508 * struct regmap_bus - Description of a hardware bus for the register map
509 * infrastructure.
b83a313b 510 *
bacdbe07 511 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
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512 * to perform locking. This field is ignored if custom lock/unlock
513 * functions are used (see fields lock/unlock of
514 * struct regmap_config).
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MB
515 * @write: Write operation.
516 * @gather_write: Write operation with split register/value, return -ENOTSUPP
517 * if not implemented on a given device.
0d509f2b
MB
518 * @async_write: Write operation which completes asynchronously, optional and
519 * must serialise with respect to non-async I/O.
c5f58f2d
MSP
520 * @reg_write: Write a single register value to the given register address. This
521 * write operation has to complete when returning from the function.
c20cc099
LW
522 * @reg_write_noinc: Write multiple register value to the same register. This
523 * write operation has to complete when returning from the function.
2cf8e2df
CK
524 * @reg_update_bits: Update bits operation to be used against volatile
525 * registers, intended for devices supporting some mechanism
526 * for setting clearing bits without having to
527 * read/modify/write.
b83a313b
MB
528 * @read: Read operation. Data is returned in the buffer used to transmit
529 * data.
c5f58f2d
MSP
530 * @reg_read: Read a single register value from a given register address.
531 * @free_context: Free context.
0d509f2b 532 * @async_alloc: Allocate a regmap_async() structure.
b83a313b
MB
533 * @read_flag_mask: Mask to be set in the top byte of the register when doing
534 * a read.
141eba2e
SW
535 * @reg_format_endian_default: Default endianness for formatted register
536 * addresses. Used when the regmap_config specifies DEFAULT. If this is
537 * DEFAULT, BIG is assumed.
538 * @val_format_endian_default: Default endianness for formatted register
539 * values. Used when the regmap_config specifies DEFAULT. If this is
540 * DEFAULT, BIG is assumed.
adaac459
MSP
541 * @max_raw_read: Max raw read size that can be used on the bus.
542 * @max_raw_write: Max raw write size that can be used on the bus.
ea030ca6 543 * @free_on_exit: kfree this on exit of regmap
b83a313b
MB
544 */
545struct regmap_bus {
bacdbe07 546 bool fast_io;
b83a313b
MB
547 regmap_hw_write write;
548 regmap_hw_gather_write gather_write;
0d509f2b 549 regmap_hw_async_write async_write;
3ac17037 550 regmap_hw_reg_write reg_write;
c20cc099 551 regmap_hw_reg_noinc_write reg_noinc_write;
77792b11 552 regmap_hw_reg_update_bits reg_update_bits;
b83a313b 553 regmap_hw_read read;
3ac17037 554 regmap_hw_reg_read reg_read;
c20cc099 555 regmap_hw_reg_noinc_read reg_noinc_read;
0135bbcc 556 regmap_hw_free_context free_context;
0d509f2b 557 regmap_hw_async_alloc async_alloc;
b83a313b 558 u8 read_flag_mask;
141eba2e
SW
559 enum regmap_endian reg_format_endian_default;
560 enum regmap_endian val_format_endian_default;
adaac459
MSP
561 size_t max_raw_read;
562 size_t max_raw_write;
ea030ca6 563 bool free_on_exit;
b83a313b
MB
564};
565
3cfe7a74
NB
566/*
567 * __regmap_init functions.
568 *
569 * These functions take a lock key and name parameter, and should not be called
570 * directly. Instead, use the regmap_init macros that generate a key and name
571 * for each call.
572 */
573struct regmap *__regmap_init(struct device *dev,
574 const struct regmap_bus *bus,
575 void *bus_context,
576 const struct regmap_config *config,
577 struct lock_class_key *lock_key,
578 const char *lock_name);
579struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
580 const struct regmap_config *config,
581 struct lock_class_key *lock_key,
582 const char *lock_name);
1f89d2fe
SV
583struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
584 const struct regmap_config *config,
585 struct lock_class_key *lock_key,
586 const char *lock_name);
bcf7eac3
AM
587struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
588 const struct regmap_config *config,
589 struct lock_class_key *lock_key,
590 const char *lock_name);
7d6f7fb0
SK
591struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
592 const struct regmap_config *config,
593 struct lock_class_key *lock_key,
594 const char *lock_name);
3cfe7a74
NB
595struct regmap *__regmap_init_spi(struct spi_device *dev,
596 const struct regmap_config *config,
597 struct lock_class_key *lock_key,
598 const char *lock_name);
599struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
600 const struct regmap_config *config,
601 struct lock_class_key *lock_key,
602 const char *lock_name);
603struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
604 const struct regmap_config *config,
605 struct lock_class_key *lock_key,
606 const char *lock_name);
cc5d0db3
AM
607struct regmap *__regmap_init_w1(struct device *w1_dev,
608 const struct regmap_config *config,
609 struct lock_class_key *lock_key,
610 const char *lock_name);
3cfe7a74
NB
611struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
612 void __iomem *regs,
613 const struct regmap_config *config,
614 struct lock_class_key *lock_key,
615 const char *lock_name);
616struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
617 const struct regmap_config *config,
618 struct lock_class_key *lock_key,
619 const char *lock_name);
7c22ce6e
VK
620struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
621 const struct regmap_config *config,
622 struct lock_class_key *lock_key,
623 const char *lock_name);
fb5103f9
PLB
624struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
625 const struct regmap_config *config,
626 struct lock_class_key *lock_key,
627 const char *lock_name);
7f9fb673
XY
628struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
629 const struct regmap_config *config,
630 struct lock_class_key *lock_key,
631 const char *lock_name);
bf0d29fb
EJ
632struct regmap *__regmap_init_fsi(struct fsi_device *fsi_dev,
633 const struct regmap_config *config,
634 struct lock_class_key *lock_key,
635 const char *lock_name);
3cfe7a74
NB
636
637struct regmap *__devm_regmap_init(struct device *dev,
638 const struct regmap_bus *bus,
639 void *bus_context,
640 const struct regmap_config *config,
641 struct lock_class_key *lock_key,
642 const char *lock_name);
643struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
644 const struct regmap_config *config,
645 struct lock_class_key *lock_key,
646 const char *lock_name);
1f89d2fe
SV
647struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
648 const struct regmap_config *config,
649 struct lock_class_key *lock_key,
650 const char *lock_name);
bcf7eac3
AM
651struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
652 const struct regmap_config *config,
653 struct lock_class_key *lock_key,
654 const char *lock_name);
3cfe7a74
NB
655struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
656 const struct regmap_config *config,
657 struct lock_class_key *lock_key,
658 const char *lock_name);
659struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
660 const struct regmap_config *config,
661 struct lock_class_key *lock_key,
662 const char *lock_name);
663struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
664 const struct regmap_config *config,
665 struct lock_class_key *lock_key,
666 const char *lock_name);
cc5d0db3
AM
667struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
668 const struct regmap_config *config,
669 struct lock_class_key *lock_key,
670 const char *lock_name);
3cfe7a74
NB
671struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
672 const char *clk_id,
673 void __iomem *regs,
674 const struct regmap_config *config,
675 struct lock_class_key *lock_key,
676 const char *lock_name);
677struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
678 const struct regmap_config *config,
679 struct lock_class_key *lock_key,
680 const char *lock_name);
7c22ce6e
VK
681struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
682 const struct regmap_config *config,
683 struct lock_class_key *lock_key,
684 const char *lock_name);
fb5103f9
PLB
685struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
686 const struct regmap_config *config,
687 struct lock_class_key *lock_key,
688 const char *lock_name);
ed24d568
SK
689struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
690 const struct regmap_config *config,
691 struct lock_class_key *lock_key,
692 const char *lock_name);
6445500b
VS
693struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
694 const struct regmap_config *config,
695 struct lock_class_key *lock_key,
696 const char *lock_name);
7f9fb673
XY
697struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
698 const struct regmap_config *config,
699 struct lock_class_key *lock_key,
700 const char *lock_name);
bf0d29fb
EJ
701struct regmap *__devm_regmap_init_fsi(struct fsi_device *fsi_dev,
702 const struct regmap_config *config,
703 struct lock_class_key *lock_key,
704 const char *lock_name);
705
3cfe7a74
NB
706/*
707 * Wrapper for regmap_init macros to include a unique lockdep key and name
708 * for each call. No-op if CONFIG_LOCKDEP is not set.
709 *
710 * @fn: Real function to call (in the form __[*_]regmap_init[_*])
711 * @name: Config variable name (#config in the calling macro)
712 **/
713#ifdef CONFIG_LOCKDEP
714#define __regmap_lockdep_wrapper(fn, name, ...) \
715( \
716 ({ \
717 static struct lock_class_key _key; \
718 fn(__VA_ARGS__, &_key, \
719 KBUILD_BASENAME ":" \
720 __stringify(__LINE__) ":" \
721 "(" name ")->lock"); \
722 }) \
723)
724#else
725#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
726#endif
727
1ed81114 728/**
2cf8e2df 729 * regmap_init() - Initialise register map
1ed81114
NB
730 *
731 * @dev: Device that will be interacted with
732 * @bus: Bus-specific callbacks to use with device
733 * @bus_context: Data passed to bus-specific callbacks
734 * @config: Configuration for register map
735 *
736 * The return value will be an ERR_PTR() on error or a valid pointer to
737 * a struct regmap. This function should generally not be called
738 * directly, it should be called by bus-specific init functions.
739 */
3cfe7a74
NB
740#define regmap_init(dev, bus, bus_context, config) \
741 __regmap_lockdep_wrapper(__regmap_init, #config, \
742 dev, bus, bus_context, config)
6cfec04b 743int regmap_attach_dev(struct device *dev, struct regmap *map,
3cfe7a74 744 const struct regmap_config *config);
22853223 745
1ed81114 746/**
2cf8e2df 747 * regmap_init_i2c() - Initialise register map
1ed81114
NB
748 *
749 * @i2c: Device that will be interacted with
750 * @config: Configuration for register map
751 *
752 * The return value will be an ERR_PTR() on error or a valid pointer to
753 * a struct regmap.
754 */
3cfe7a74
NB
755#define regmap_init_i2c(i2c, config) \
756 __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
757 i2c, config)
1ed81114 758
1f89d2fe
SV
759/**
760 * regmap_init_mdio() - Initialise register map
761 *
762 * @mdio_dev: Device that will be interacted with
763 * @config: Configuration for register map
764 *
765 * The return value will be an ERR_PTR() on error or a valid pointer to
766 * a struct regmap.
767 */
768#define regmap_init_mdio(mdio_dev, config) \
769 __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \
770 mdio_dev, config)
771
bcf7eac3
AM
772/**
773 * regmap_init_sccb() - Initialise register map
774 *
775 * @i2c: Device that will be interacted with
776 * @config: Configuration for register map
777 *
778 * The return value will be an ERR_PTR() on error or a valid pointer to
779 * a struct regmap.
780 */
781#define regmap_init_sccb(i2c, config) \
782 __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \
783 i2c, config)
784
7d6f7fb0
SK
785/**
786 * regmap_init_slimbus() - Initialise register map
787 *
788 * @slimbus: Device that will be interacted with
789 * @config: Configuration for register map
790 *
791 * The return value will be an ERR_PTR() on error or a valid pointer to
792 * a struct regmap.
793 */
794#define regmap_init_slimbus(slimbus, config) \
795 __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
796 slimbus, config)
797
1ed81114 798/**
2cf8e2df 799 * regmap_init_spi() - Initialise register map
1ed81114 800 *
2cf8e2df 801 * @dev: Device that will be interacted with
1ed81114
NB
802 * @config: Configuration for register map
803 *
804 * The return value will be an ERR_PTR() on error or a valid pointer to
805 * a struct regmap.
806 */
3cfe7a74
NB
807#define regmap_init_spi(dev, config) \
808 __regmap_lockdep_wrapper(__regmap_init_spi, #config, \
809 dev, config)
1ed81114
NB
810
811/**
2cf8e2df
CK
812 * regmap_init_spmi_base() - Create regmap for the Base register space
813 *
814 * @dev: SPMI device that will be interacted with
1ed81114
NB
815 * @config: Configuration for register map
816 *
817 * The return value will be an ERR_PTR() on error or a valid pointer to
818 * a struct regmap.
819 */
3cfe7a74
NB
820#define regmap_init_spmi_base(dev, config) \
821 __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \
822 dev, config)
1ed81114
NB
823
824/**
2cf8e2df
CK
825 * regmap_init_spmi_ext() - Create regmap for Ext register space
826 *
827 * @dev: Device that will be interacted with
1ed81114
NB
828 * @config: Configuration for register map
829 *
830 * The return value will be an ERR_PTR() on error or a valid pointer to
831 * a struct regmap.
832 */
3cfe7a74
NB
833#define regmap_init_spmi_ext(dev, config) \
834 __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
835 dev, config)
1ed81114 836
cc5d0db3
AM
837/**
838 * regmap_init_w1() - Initialise register map
839 *
840 * @w1_dev: Device that will be interacted with
841 * @config: Configuration for register map
842 *
843 * The return value will be an ERR_PTR() on error or a valid pointer to
844 * a struct regmap.
845 */
846#define regmap_init_w1(w1_dev, config) \
847 __regmap_lockdep_wrapper(__regmap_init_w1, #config, \
848 w1_dev, config)
849
1ed81114 850/**
2cf8e2df 851 * regmap_init_mmio_clk() - Initialise register map with register clock
1ed81114
NB
852 *
853 * @dev: Device that will be interacted with
854 * @clk_id: register clock consumer ID
855 * @regs: Pointer to memory-mapped IO region
856 * @config: Configuration for register map
857 *
858 * The return value will be an ERR_PTR() on error or a valid pointer to
859 * a struct regmap.
860 */
3cfe7a74
NB
861#define regmap_init_mmio_clk(dev, clk_id, regs, config) \
862 __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \
863 dev, clk_id, regs, config)
878ec67b
PZ
864
865/**
2cf8e2df 866 * regmap_init_mmio() - Initialise register map
878ec67b
PZ
867 *
868 * @dev: Device that will be interacted with
869 * @regs: Pointer to memory-mapped IO region
870 * @config: Configuration for register map
871 *
872 * The return value will be an ERR_PTR() on error or a valid pointer to
873 * a struct regmap.
874 */
1ed81114
NB
875#define regmap_init_mmio(dev, regs, config) \
876 regmap_init_mmio_clk(dev, NULL, regs, config)
877
878/**
2cf8e2df 879 * regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
880 *
881 * @ac97: Device that will be interacted with
882 * @config: Configuration for register map
883 *
884 * The return value will be an ERR_PTR() on error or a valid pointer to
885 * a struct regmap.
886 */
3cfe7a74
NB
887#define regmap_init_ac97(ac97, config) \
888 __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \
889 ac97, config)
22853223 890bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
878ec67b 891
7c22ce6e
VK
892/**
893 * regmap_init_sdw() - Initialise register map
894 *
895 * @sdw: Device that will be interacted with
896 * @config: Configuration for register map
897 *
898 * The return value will be an ERR_PTR() on error or a valid pointer to
899 * a struct regmap.
900 */
901#define regmap_init_sdw(sdw, config) \
902 __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \
903 sdw, config)
904
fb5103f9
PLB
905/**
906 * regmap_init_sdw_mbq() - Initialise register map
907 *
908 * @sdw: Device that will be interacted with
909 * @config: Configuration for register map
910 *
911 * The return value will be an ERR_PTR() on error or a valid pointer to
912 * a struct regmap.
913 */
914#define regmap_init_sdw_mbq(sdw, config) \
915 __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
916 sdw, config)
917
7f9fb673
XY
918/**
919 * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
920 * to AVMM Bus Bridge
921 *
922 * @spi: Device that will be interacted with
923 * @config: Configuration for register map
924 *
925 * The return value will be an ERR_PTR() on error or a valid pointer
926 * to a struct regmap.
927 */
928#define regmap_init_spi_avmm(spi, config) \
929 __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \
930 spi, config)
7c22ce6e 931
bf0d29fb
EJ
932/**
933 * regmap_init_fsi() - Initialise register map
934 *
935 * @fsi_dev: Device that will be interacted with
936 * @config: Configuration for register map
937 *
938 * The return value will be an ERR_PTR() on error or a valid pointer to
939 * a struct regmap.
940 */
941#define regmap_init_fsi(fsi_dev, config) \
942 __regmap_lockdep_wrapper(__regmap_init_fsi, #config, fsi_dev, \
943 config)
944
1ed81114 945/**
2cf8e2df 946 * devm_regmap_init() - Initialise managed register map
1ed81114
NB
947 *
948 * @dev: Device that will be interacted with
949 * @bus: Bus-specific callbacks to use with device
950 * @bus_context: Data passed to bus-specific callbacks
951 * @config: Configuration for register map
952 *
953 * The return value will be an ERR_PTR() on error or a valid pointer
954 * to a struct regmap. This function should generally not be called
955 * directly, it should be called by bus-specific init functions. The
956 * map will be automatically freed by the device management code.
957 */
3cfe7a74
NB
958#define devm_regmap_init(dev, bus, bus_context, config) \
959 __regmap_lockdep_wrapper(__devm_regmap_init, #config, \
960 dev, bus, bus_context, config)
1ed81114
NB
961
962/**
2cf8e2df 963 * devm_regmap_init_i2c() - Initialise managed register map
1ed81114
NB
964 *
965 * @i2c: Device that will be interacted with
966 * @config: Configuration for register map
967 *
968 * The return value will be an ERR_PTR() on error or a valid pointer
969 * to a struct regmap. The regmap will be automatically freed by the
970 * device management code.
971 */
3cfe7a74
NB
972#define devm_regmap_init_i2c(i2c, config) \
973 __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \
974 i2c, config)
1ed81114 975
1f89d2fe
SV
976/**
977 * devm_regmap_init_mdio() - Initialise managed register map
978 *
979 * @mdio_dev: Device that will be interacted with
980 * @config: Configuration for register map
981 *
982 * The return value will be an ERR_PTR() on error or a valid pointer
983 * to a struct regmap. The regmap will be automatically freed by the
984 * device management code.
985 */
986#define devm_regmap_init_mdio(mdio_dev, config) \
987 __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \
988 mdio_dev, config)
989
bcf7eac3
AM
990/**
991 * devm_regmap_init_sccb() - Initialise managed register map
992 *
993 * @i2c: Device that will be interacted with
994 * @config: Configuration for register map
995 *
996 * The return value will be an ERR_PTR() on error or a valid pointer
997 * to a struct regmap. The regmap will be automatically freed by the
998 * device management code.
999 */
1000#define devm_regmap_init_sccb(i2c, config) \
1001 __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \
1002 i2c, config)
1003
1ed81114 1004/**
2cf8e2df 1005 * devm_regmap_init_spi() - Initialise register map
1ed81114 1006 *
2cf8e2df 1007 * @dev: Device that will be interacted with
1ed81114
NB
1008 * @config: Configuration for register map
1009 *
1010 * The return value will be an ERR_PTR() on error or a valid pointer
1011 * to a struct regmap. The map will be automatically freed by the
1012 * device management code.
1013 */
3cfe7a74
NB
1014#define devm_regmap_init_spi(dev, config) \
1015 __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \
1016 dev, config)
1ed81114
NB
1017
1018/**
2cf8e2df
CK
1019 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
1020 *
1021 * @dev: SPMI device that will be interacted with
1ed81114
NB
1022 * @config: Configuration for register map
1023 *
1024 * The return value will be an ERR_PTR() on error or a valid pointer
1025 * to a struct regmap. The regmap will be automatically freed by the
1026 * device management code.
1027 */
3cfe7a74
NB
1028#define devm_regmap_init_spmi_base(dev, config) \
1029 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \
1030 dev, config)
1ed81114
NB
1031
1032/**
2cf8e2df
CK
1033 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
1034 *
1035 * @dev: SPMI device that will be interacted with
1ed81114
NB
1036 * @config: Configuration for register map
1037 *
1038 * The return value will be an ERR_PTR() on error or a valid pointer
1039 * to a struct regmap. The regmap will be automatically freed by the
1040 * device management code.
1041 */
3cfe7a74
NB
1042#define devm_regmap_init_spmi_ext(dev, config) \
1043 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
1044 dev, config)
3cfe7a74 1045
cc5d0db3
AM
1046/**
1047 * devm_regmap_init_w1() - Initialise managed register map
1048 *
1049 * @w1_dev: Device that will be interacted with
1050 * @config: Configuration for register map
1051 *
1052 * The return value will be an ERR_PTR() on error or a valid pointer
1053 * to a struct regmap. The regmap will be automatically freed by the
1054 * device management code.
1055 */
1056#define devm_regmap_init_w1(w1_dev, config) \
1057 __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
1058 w1_dev, config)
878ec67b 1059/**
2cf8e2df 1060 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
878ec67b
PZ
1061 *
1062 * @dev: Device that will be interacted with
1ed81114 1063 * @clk_id: register clock consumer ID
878ec67b
PZ
1064 * @regs: Pointer to memory-mapped IO region
1065 * @config: Configuration for register map
1066 *
1ed81114
NB
1067 * The return value will be an ERR_PTR() on error or a valid pointer
1068 * to a struct regmap. The regmap will be automatically freed by the
1069 * device management code.
878ec67b 1070 */
1ed81114
NB
1071#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \
1072 __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \
1073 dev, clk_id, regs, config)
878ec67b
PZ
1074
1075/**
2cf8e2df 1076 * devm_regmap_init_mmio() - Initialise managed register map
878ec67b
PZ
1077 *
1078 * @dev: Device that will be interacted with
1079 * @regs: Pointer to memory-mapped IO region
1080 * @config: Configuration for register map
1081 *
1082 * The return value will be an ERR_PTR() on error or a valid pointer
1083 * to a struct regmap. The regmap will be automatically freed by the
1084 * device management code.
1085 */
3cfe7a74
NB
1086#define devm_regmap_init_mmio(dev, regs, config) \
1087 devm_regmap_init_mmio_clk(dev, NULL, regs, config)
c0eb4676 1088
1ed81114 1089/**
2cf8e2df 1090 * devm_regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
1091 *
1092 * @ac97: Device that will be interacted with
1093 * @config: Configuration for register map
1094 *
1095 * The return value will be an ERR_PTR() on error or a valid pointer
1096 * to a struct regmap. The regmap will be automatically freed by the
1097 * device management code.
1098 */
1099#define devm_regmap_init_ac97(ac97, config) \
1100 __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \
1101 ac97, config)
c0eb4676 1102
7c22ce6e
VK
1103/**
1104 * devm_regmap_init_sdw() - Initialise managed register map
1105 *
1106 * @sdw: Device that will be interacted with
1107 * @config: Configuration for register map
1108 *
1109 * The return value will be an ERR_PTR() on error or a valid pointer
1110 * to a struct regmap. The regmap will be automatically freed by the
1111 * device management code.
1112 */
1113#define devm_regmap_init_sdw(sdw, config) \
1114 __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \
1115 sdw, config)
1116
fb5103f9
PLB
1117/**
1118 * devm_regmap_init_sdw_mbq() - Initialise managed register map
1119 *
1120 * @sdw: Device that will be interacted with
1121 * @config: Configuration for register map
1122 *
1123 * The return value will be an ERR_PTR() on error or a valid pointer
1124 * to a struct regmap. The regmap will be automatically freed by the
1125 * device management code.
1126 */
1127#define devm_regmap_init_sdw_mbq(sdw, config) \
1128 __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
1129 sdw, config)
1130
ed24d568
SK
1131/**
1132 * devm_regmap_init_slimbus() - Initialise managed register map
1133 *
1134 * @slimbus: Device that will be interacted with
1135 * @config: Configuration for register map
1136 *
1137 * The return value will be an ERR_PTR() on error or a valid pointer
1138 * to a struct regmap. The regmap will be automatically freed by the
1139 * device management code.
1140 */
1141#define devm_regmap_init_slimbus(slimbus, config) \
1142 __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \
1143 slimbus, config)
6445500b
VS
1144
1145/**
1146 * devm_regmap_init_i3c() - Initialise managed register map
1147 *
1148 * @i3c: Device that will be interacted with
1149 * @config: Configuration for register map
1150 *
1151 * The return value will be an ERR_PTR() on error or a valid pointer
1152 * to a struct regmap. The regmap will be automatically freed by the
1153 * device management code.
1154 */
1155#define devm_regmap_init_i3c(i3c, config) \
1156 __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \
1157 i3c, config)
1158
7f9fb673
XY
1159/**
1160 * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
1161 * to AVMM Bus Bridge
1162 *
1163 * @spi: Device that will be interacted with
1164 * @config: Configuration for register map
1165 *
1166 * The return value will be an ERR_PTR() on error or a valid pointer
1167 * to a struct regmap. The map will be automatically freed by the
1168 * device management code.
1169 */
1170#define devm_regmap_init_spi_avmm(spi, config) \
1171 __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \
1172 spi, config)
1173
bf0d29fb
EJ
1174/**
1175 * devm_regmap_init_fsi() - Initialise managed register map
1176 *
1177 * @fsi_dev: Device that will be interacted with
1178 * @config: Configuration for register map
1179 *
1180 * The return value will be an ERR_PTR() on error or a valid pointer
1181 * to a struct regmap. The regmap will be automatically freed by the
1182 * device management code.
1183 */
1184#define devm_regmap_init_fsi(fsi_dev, config) \
1185 __regmap_lockdep_wrapper(__devm_regmap_init_fsi, #config, \
1186 fsi_dev, config)
1187
31895662
MR
1188int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
1189void regmap_mmio_detach_clk(struct regmap *map);
b83a313b 1190void regmap_exit(struct regmap *map);
bf315173
MB
1191int regmap_reinit_cache(struct regmap *map,
1192 const struct regmap_config *config);
72b39f6f 1193struct regmap *dev_get_regmap(struct device *dev, const char *name);
8d7d3972 1194struct device *regmap_get_device(struct regmap *map);
b83a313b 1195int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
915f441b 1196int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
b83a313b
MB
1197int regmap_raw_write(struct regmap *map, unsigned int reg,
1198 const void *val, size_t val_len);
cdf6b11d
BW
1199int regmap_noinc_write(struct regmap *map, unsigned int reg,
1200 const void *val, size_t val_len);
8eaeb219
LD
1201int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1202 size_t val_count);
8019ff6c 1203int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
e33fabd3 1204 int num_regs);
1d5b40bc 1205int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 1206 const struct reg_sequence *regs,
1d5b40bc 1207 int num_regs);
0d509f2b
MB
1208int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1209 const void *val, size_t val_len);
b83a313b
MB
1210int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
1211int regmap_raw_read(struct regmap *map, unsigned int reg,
1212 void *val, size_t val_len);
74fe7b55
LC
1213int regmap_noinc_read(struct regmap *map, unsigned int reg,
1214 void *val, size_t val_len);
b83a313b
MB
1215int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1216 size_t val_count);
91d31b9f
KM
1217int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1218 unsigned int mask, unsigned int val,
1219 bool *change, bool async, bool force);
4b9e7edb
BG
1220
1221static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1222 unsigned int mask, unsigned int val)
1223{
1224 return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
1225}
1226
1227static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1228 unsigned int mask, unsigned int val)
1229{
1230 return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
1231}
1232
1233static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1234 unsigned int mask, unsigned int val,
1235 bool *change)
1236{
1237 return regmap_update_bits_base(map, reg, mask, val,
1238 change, false, false);
1239}
1240
1241static inline int
1242regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1243 unsigned int mask, unsigned int val,
1244 bool *change)
1245{
1246 return regmap_update_bits_base(map, reg, mask, val,
1247 change, true, false);
1248}
1249
1250static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1251 unsigned int mask, unsigned int val)
1252{
1253 return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
1254}
1255
a6539c32 1256int regmap_get_val_bytes(struct regmap *map);
668abc72 1257int regmap_get_max_register(struct regmap *map);
a2f776cb 1258int regmap_get_reg_stride(struct regmap *map);
a6d99022 1259bool regmap_might_sleep(struct regmap *map);
0d509f2b 1260int regmap_async_complete(struct regmap *map);
221ad7f2 1261bool regmap_can_raw_write(struct regmap *map);
f50c9eb4
MSP
1262size_t regmap_get_raw_read_max(struct regmap *map);
1263size_t regmap_get_raw_write_max(struct regmap *map);
b83a313b 1264
39a58439 1265int regcache_sync(struct regmap *map);
4d4cfd16
MB
1266int regcache_sync_region(struct regmap *map, unsigned int min,
1267 unsigned int max);
697e85bc
MB
1268int regcache_drop_region(struct regmap *map, unsigned int min,
1269 unsigned int max);
92afb286 1270void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 1271void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 1272void regcache_mark_dirty(struct regmap *map);
92afb286 1273
154881e5
MB
1274bool regmap_check_range_table(struct regmap *map, unsigned int reg,
1275 const struct regmap_access_table *table);
1276
8019ff6c 1277int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a 1278 int num_regs);
13ff50c8
NC
1279int regmap_parse_val(struct regmap *map, const void *buf,
1280 unsigned int *val);
22f0d90a 1281
76aad392
DC
1282static inline bool regmap_reg_in_range(unsigned int reg,
1283 const struct regmap_range *range)
1284{
1285 return reg >= range->range_min && reg <= range->range_max;
1286}
1287
1288bool regmap_reg_in_ranges(unsigned int reg,
1289 const struct regmap_range *ranges,
1290 unsigned int nranges);
1291
aa2ff9db
BG
1292static inline int regmap_set_bits(struct regmap *map,
1293 unsigned int reg, unsigned int bits)
1294{
1295 return regmap_update_bits_base(map, reg, bits, bits,
1296 NULL, false, false);
1297}
1298
1299static inline int regmap_clear_bits(struct regmap *map,
1300 unsigned int reg, unsigned int bits)
1301{
1302 return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
1303}
1304
1305int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
1306
67252287 1307/**
2cf8e2df 1308 * struct reg_field - Description of an register field
67252287
SK
1309 *
1310 * @reg: Offset of the register within the regmap bank
1311 * @lsb: lsb of the register field.
f27b37f5 1312 * @msb: msb of the register field.
a0102375
KM
1313 * @id_size: port size if it has some ports
1314 * @id_offset: address offset for each ports
67252287
SK
1315 */
1316struct reg_field {
1317 unsigned int reg;
1318 unsigned int lsb;
1319 unsigned int msb;
a0102375
KM
1320 unsigned int id_size;
1321 unsigned int id_offset;
67252287
SK
1322};
1323
1324#define REG_FIELD(_reg, _lsb, _msb) { \
1325 .reg = _reg, \
1326 .lsb = _lsb, \
1327 .msb = _msb, \
1328 }
1329
8baebfc2
VO
1330#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \
1331 .reg = _reg, \
1332 .lsb = _lsb, \
1333 .msb = _msb, \
1334 .id_size = _size, \
1335 .id_offset = _offset, \
1336 }
1337
67252287
SK
1338struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1339 struct reg_field reg_field);
1340void regmap_field_free(struct regmap_field *field);
1341
1342struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1343 struct regmap *regmap, struct reg_field reg_field);
1344void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
1345
ea470b82
SK
1346int regmap_field_bulk_alloc(struct regmap *regmap,
1347 struct regmap_field **rm_field,
29c34975 1348 const struct reg_field *reg_field,
ea470b82
SK
1349 int num_fields);
1350void regmap_field_bulk_free(struct regmap_field *field);
1351int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
1352 struct regmap_field **field,
29c34975
IZ
1353 const struct reg_field *reg_field,
1354 int num_fields);
ea470b82
SK
1355void devm_regmap_field_bulk_free(struct device *dev,
1356 struct regmap_field *field);
1357
67252287 1358int regmap_field_read(struct regmap_field *field, unsigned int *val);
28972eaa
KM
1359int regmap_field_update_bits_base(struct regmap_field *field,
1360 unsigned int mask, unsigned int val,
1361 bool *change, bool async, bool force);
a0102375
KM
1362int regmap_fields_read(struct regmap_field *field, unsigned int id,
1363 unsigned int *val);
e126edec
KM
1364int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1365 unsigned int mask, unsigned int val,
1366 bool *change, bool async, bool force);
4b9e7edb
BG
1367
1368static inline int regmap_field_write(struct regmap_field *field,
1369 unsigned int val)
1370{
1371 return regmap_field_update_bits_base(field, ~0, val,
1372 NULL, false, false);
1373}
1374
1375static inline int regmap_field_force_write(struct regmap_field *field,
1376 unsigned int val)
1377{
1378 return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
1379}
1380
1381static inline int regmap_field_update_bits(struct regmap_field *field,
1382 unsigned int mask, unsigned int val)
1383{
1384 return regmap_field_update_bits_base(field, mask, val,
1385 NULL, false, false);
1386}
1387
f67be8b7
LC
1388static inline int regmap_field_set_bits(struct regmap_field *field,
1389 unsigned int bits)
1390{
1391 return regmap_field_update_bits_base(field, bits, bits, NULL, false,
1392 false);
1393}
1394
1395static inline int regmap_field_clear_bits(struct regmap_field *field,
1396 unsigned int bits)
1397{
1398 return regmap_field_update_bits_base(field, bits, 0, NULL, false,
1399 false);
1400}
1401
1402int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);
1403
4b9e7edb
BG
1404static inline int
1405regmap_field_force_update_bits(struct regmap_field *field,
1406 unsigned int mask, unsigned int val)
1407{
1408 return regmap_field_update_bits_base(field, mask, val,
1409 NULL, false, true);
1410}
1411
1412static inline int regmap_fields_write(struct regmap_field *field,
1413 unsigned int id, unsigned int val)
1414{
1415 return regmap_fields_update_bits_base(field, id, ~0, val,
1416 NULL, false, false);
1417}
1418
1419static inline int regmap_fields_force_write(struct regmap_field *field,
1420 unsigned int id, unsigned int val)
1421{
1422 return regmap_fields_update_bits_base(field, id, ~0, val,
1423 NULL, false, true);
1424}
1425
1426static inline int
1427regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1428 unsigned int mask, unsigned int val)
1429{
1430 return regmap_fields_update_bits_base(field, id, mask, val,
1431 NULL, false, false);
1432}
1433
1434static inline int
1435regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1436 unsigned int mask, unsigned int val)
1437{
1438 return regmap_fields_update_bits_base(field, id, mask, val,
1439 NULL, false, true);
1440}
1441
1c2928e3
MV
1442/**
1443 * struct regmap_irq_type - IRQ type definitions.
1444 *
1445 * @type_reg_offset: Offset register for the irq type setting.
1446 * @type_rising_val: Register value to configure RISING type irq.
1447 * @type_falling_val: Register value to configure FALLING type irq.
1448 * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
1449 * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
1450 * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
1451 */
1452struct regmap_irq_type {
1453 unsigned int type_reg_offset;
1454 unsigned int type_reg_mask;
1455 unsigned int type_rising_val;
1456 unsigned int type_falling_val;
1457 unsigned int type_level_low_val;
1458 unsigned int type_level_high_val;
1459 unsigned int types_supported;
1460};
76aad392 1461
f8beab2b 1462/**
2cf8e2df 1463 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
f8beab2b
MB
1464 *
1465 * @reg_offset: Offset of the status/mask register within the bank
1466 * @mask: Mask used to flag/control the register.
1c2928e3 1467 * @type: IRQ trigger type setting details if supported.
f8beab2b
MB
1468 */
1469struct regmap_irq {
1470 unsigned int reg_offset;
1471 unsigned int mask;
1c2928e3 1472 struct regmap_irq_type type;
f8beab2b
MB
1473};
1474
b4fe8ba7
QZ
1475#define REGMAP_IRQ_REG(_irq, _off, _mask) \
1476 [_irq] = { .reg_offset = (_off), .mask = (_mask) }
1477
43fac323
TX
1478#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
1479 [_id] = { \
1480 .mask = BIT((_id) % (_reg_bits)), \
1481 .reg_offset = (_id) / (_reg_bits), \
1482 }
1483
a2d21848
MV
1484#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \
1485 { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
1486
1487struct regmap_irq_sub_irq_map {
1488 unsigned int num_regs;
1489 unsigned int *offset;
1490};
1491
bdf9b86c
AM
1492struct regmap_irq_chip_data;
1493
f8beab2b 1494/**
2cf8e2df 1495 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
f8beab2b
MB
1496 *
1497 * @name: Descriptive name for IRQ controller.
1498 *
a2d21848
MV
1499 * @main_status: Base main status register address. For chips which have
1500 * interrupts arranged in separate sub-irq blocks with own IRQ
1501 * registers and which have a main IRQ registers indicating
1502 * sub-irq blocks with unhandled interrupts. For such chips fill
1503 * sub-irq register information in status_base, mask_base and
1504 * ack_base.
1505 * @num_main_status_bits: Should be given to chips where number of meaningfull
1506 * main status bits differs from num_regs.
1507 * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
1508 * registers. First item in array describes the registers
1509 * for first main status bit. Second array for second bit etc.
1510 * Offset is given as sub register status offset to
1511 * status_base. Should contain num_regs arrays.
1512 * Can be provided for chips with more complex mapping than
1513 * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1066cfbd
GDS
1514 * When used with not_fixed_stride, each one-element array
1515 * member contains offset calculated as address from each
1516 * peripheral to first peripheral.
a2d21848
MV
1517 * @num_main_regs: Number of 'main status' irq registers for chips which have
1518 * main_status set.
1519 *
f8beab2b 1520 * @status_base: Base status register address.
e8ffb12e
AM
1521 * @mask_base: Base mask register address. Mask bits are set to 1 when an
1522 * interrupt is masked, 0 when unmasked.
1523 * @unmask_base: Base unmask register address. Unmask bits are set to 1 when
1524 * an interrupt is unmasked and 0 when masked.
d3233433
AS
1525 * @ack_base: Base ack address. If zero then the chip is clear on read.
1526 * Using zero value is possible with @use_ack bit.
a43fd50d 1527 * @wake_base: Base address for wake enables. If zero unsupported.
9edd4f5a
AM
1528 * @type_base: Base address for irq type. If zero unsupported. Deprecated,
1529 * use @config_base instead.
1530 * @virt_reg_base: Base addresses for extra config regs. Deprecated, use
1531 * @config_base instead.
faa87ce9 1532 * @config_base: Base address for IRQ type config regs. If null unsupported.
022f926a 1533 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
2753e6f8 1534 * @init_ack_masked: Ack all masked interrupts once during initalization.
68622bdf 1535 * @mask_invert: Inverted mask register: cleared bits are masked out.
e8ffb12e
AM
1536 * Deprecated; prefer describing an inverted mask register as
1537 * an unmask register.
1538 * @mask_unmask_non_inverted: Controls mask bit inversion for chips that set
1539 * both @mask_base and @unmask_base. If false, mask and unmask bits are
1540 * inverted (which is deprecated behavior); if true, bits will not be
1541 * inverted and the registers keep their normal behavior. Note that if
1542 * you use only one of @mask_base or @unmask_base, this flag has no
1543 * effect and is unnecessary. Any new drivers that set both @mask_base
1544 * and @unmask_base should set this to true to avoid relying on the
1545 * deprecated behavior.
d3233433 1546 * @use_ack: Use @ack register even if it is zero.
a650fdd9 1547 * @ack_invert: Inverted ack register: cleared bits for ack.
3a6f0fb7 1548 * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
68622bdf 1549 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
9edd4f5a
AM
1550 * @type_invert: Invert the type flags. Deprecated, use config registers
1551 * instead.
610fdd66
AM
1552 * @type_in_mask: Use the mask registers for controlling irq type. Use this if
1553 * the hardware provides separate bits for rising/falling edge
1554 * or low/high level interrupts and they should be combined into
1555 * a single logical interrupt. Use &struct regmap_irq_type data
1556 * to define the mask bit for each irq type.
c82ea33e
BG
1557 * @clear_on_unmask: For chips with interrupts cleared on read: read the status
1558 * registers before unmasking interrupts to clear any bits
1559 * set when they were masked.
1066cfbd 1560 * @not_fixed_stride: Used when chip peripherals are not laid out with fixed
48e014ee
AM
1561 * stride. Must be used with sub_reg_offsets containing the
1562 * offsets to each peripheral. Deprecated; the same thing
1563 * can be accomplished with a @get_irq_reg callback, without
1564 * the need for a @sub_reg_offsets table.
bcd23f93 1565 * @status_invert: Inverted status register: cleared bits are active interrupts.
0c00c50b 1566 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
f8beab2b
MB
1567 *
1568 * @num_regs: Number of registers in each control bank.
1569 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
1570 * assigned based on the index in the array of the interrupt.
1571 * @num_irqs: Number of descriptors.
9edd4f5a
AM
1572 * @num_type_reg: Number of type registers. Deprecated, use config registers
1573 * instead.
4c501445 1574 * @num_virt_regs: Number of non-standard irq configuration registers.
9edd4f5a
AM
1575 * If zero unsupported. Deprecated, use config registers
1576 * instead.
faa87ce9
AM
1577 * @num_config_bases: Number of config base registers.
1578 * @num_config_regs: Number of config registers for each config base register.
ccc12561
LD
1579 * @handle_pre_irq: Driver specific callback to handle interrupt from device
1580 * before regmap_irq_handler process the interrupts.
1581 * @handle_post_irq: Driver specific callback to handle interrupt from device
1582 * after handling the interrupts in regmap_irq_handler().
69af4bca
WBG
1583 * @handle_mask_sync: Callback used to handle IRQ mask syncs. The index will be
1584 * in the range [0, num_regs)
394409aa 1585 * @set_type_virt: Driver specific callback to extend regmap_irq_set_type()
9edd4f5a
AM
1586 * and configure virt regs. Deprecated, use @set_type_config
1587 * callback and config registers instead.
faa87ce9 1588 * @set_type_config: Callback used for configuring irq types.
bdf9b86c
AM
1589 * @get_irq_reg: Callback for mapping (base register, index) pairs to register
1590 * addresses. The base register will be one of @status_base,
1591 * @mask_base, etc., @main_status, or any of @config_base.
1592 * The index will be in the range [0, num_main_regs[ for the
1593 * main status base, [0, num_type_settings[ for any config
1594 * register base, and [0, num_regs[ for any other base.
1595 * If unspecified then regmap_irq_get_irq_reg_linear() is used.
ccc12561
LD
1596 * @irq_drv_data: Driver specific IRQ data which is passed as parameter when
1597 * driver specific pre/post interrupt handler is called.
2cf8e2df
CK
1598 *
1599 * This is not intended to handle every possible interrupt controller, but
1600 * it should handle a substantial proportion of those that are found in the
1601 * wild.
f8beab2b
MB
1602 */
1603struct regmap_irq_chip {
1604 const char *name;
1605
a2d21848
MV
1606 unsigned int main_status;
1607 unsigned int num_main_status_bits;
1608 struct regmap_irq_sub_irq_map *sub_reg_offsets;
1609 int num_main_regs;
1610
f8beab2b
MB
1611 unsigned int status_base;
1612 unsigned int mask_base;
7b7d1968 1613 unsigned int unmask_base;
f8beab2b 1614 unsigned int ack_base;
a43fd50d 1615 unsigned int wake_base;
7a78479f 1616 unsigned int type_base;
4c501445 1617 unsigned int *virt_reg_base;
faa87ce9 1618 const unsigned int *config_base;
022f926a 1619 unsigned int irq_reg_stride;
445cbd21
AM
1620 unsigned int init_ack_masked:1;
1621 unsigned int mask_invert:1;
e8ffb12e 1622 unsigned int mask_unmask_non_inverted:1;
445cbd21
AM
1623 unsigned int use_ack:1;
1624 unsigned int ack_invert:1;
1625 unsigned int clear_ack:1;
1626 unsigned int wake_invert:1;
1627 unsigned int runtime_pm:1;
1628 unsigned int type_invert:1;
1629 unsigned int type_in_mask:1;
1630 unsigned int clear_on_unmask:1;
1631 unsigned int not_fixed_stride:1;
1632 unsigned int status_invert:1;
f8beab2b
MB
1633
1634 int num_regs;
1635
1636 const struct regmap_irq *irqs;
1637 int num_irqs;
7a78479f
LD
1638
1639 int num_type_reg;
4c501445 1640 int num_virt_regs;
faa87ce9
AM
1641 int num_config_bases;
1642 int num_config_regs;
ccc12561
LD
1643
1644 int (*handle_pre_irq)(void *irq_drv_data);
1645 int (*handle_post_irq)(void *irq_drv_data);
69af4bca
WBG
1646 int (*handle_mask_sync)(struct regmap *map, int index,
1647 unsigned int mask_buf_def,
1648 unsigned int mask_buf, void *irq_drv_data);
394409aa
GDS
1649 int (*set_type_virt)(unsigned int **buf, unsigned int type,
1650 unsigned long hwirq, int reg);
faa87ce9
AM
1651 int (*set_type_config)(unsigned int **buf, unsigned int type,
1652 const struct regmap_irq *irq_data, int idx);
bdf9b86c
AM
1653 unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
1654 unsigned int base, int index);
ccc12561 1655 void *irq_drv_data;
f8beab2b
MB
1656};
1657
bdf9b86c
AM
1658unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
1659 unsigned int base, int index);
faa87ce9
AM
1660int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
1661 const struct regmap_irq *irq_data, int idx);
1662
f8beab2b 1663int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 1664 int irq_base, const struct regmap_irq_chip *chip,
f8beab2b 1665 struct regmap_irq_chip_data **data);
5cc2013b
MW
1666int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
1667 struct regmap *map, int irq,
1668 int irq_flags, int irq_base,
1669 const struct regmap_irq_chip *chip,
1670 struct regmap_irq_chip_data **data);
f8beab2b 1671void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
045b9848
LD
1672
1673int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
1674 int irq_flags, int irq_base,
1675 const struct regmap_irq_chip *chip,
1676 struct regmap_irq_chip_data **data);
5cc2013b
MW
1677int devm_regmap_add_irq_chip_fwnode(struct device *dev,
1678 struct fwnode_handle *fwnode,
1679 struct regmap *map, int irq,
1680 int irq_flags, int irq_base,
1681 const struct regmap_irq_chip *chip,
1682 struct regmap_irq_chip_data **data);
045b9848
LD
1683void devm_regmap_del_irq_chip(struct device *dev, int irq,
1684 struct regmap_irq_chip_data *data);
1685
209a6006 1686int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 1687int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
90f790d2 1688struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
92afb286 1689
9cde5fcd
MB
1690#else
1691
1692/*
1693 * These stubs should only ever be called by generic code which has
1694 * regmap based facilities, if they ever get called at runtime
1695 * something is going wrong and something probably needs to select
1696 * REGMAP.
1697 */
1698
1699static inline int regmap_write(struct regmap *map, unsigned int reg,
1700 unsigned int val)
1701{
1702 WARN_ONCE(1, "regmap API is disabled");
1703 return -EINVAL;
1704}
1705
915f441b
MB
1706static inline int regmap_write_async(struct regmap *map, unsigned int reg,
1707 unsigned int val)
1708{
1709 WARN_ONCE(1, "regmap API is disabled");
1710 return -EINVAL;
1711}
1712
9cde5fcd
MB
1713static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
1714 const void *val, size_t val_len)
1715{
1716 WARN_ONCE(1, "regmap API is disabled");
1717 return -EINVAL;
1718}
1719
0d509f2b
MB
1720static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1721 const void *val, size_t val_len)
1722{
1723 WARN_ONCE(1, "regmap API is disabled");
1724 return -EINVAL;
1725}
1726
cdf6b11d
BW
1727static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
1728 const void *val, size_t val_len)
1729{
1730 WARN_ONCE(1, "regmap API is disabled");
1731 return -EINVAL;
1732}
1733
9cde5fcd
MB
1734static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
1735 const void *val, size_t val_count)
1736{
1737 WARN_ONCE(1, "regmap API is disabled");
1738 return -EINVAL;
1739}
1740
1741static inline int regmap_read(struct regmap *map, unsigned int reg,
1742 unsigned int *val)
1743{
1744 WARN_ONCE(1, "regmap API is disabled");
1745 return -EINVAL;
1746}
1747
1748static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
1749 void *val, size_t val_len)
1750{
1751 WARN_ONCE(1, "regmap API is disabled");
1752 return -EINVAL;
1753}
1754
74fe7b55
LC
1755static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
1756 void *val, size_t val_len)
1757{
1758 WARN_ONCE(1, "regmap API is disabled");
1759 return -EINVAL;
1760}
1761
9cde5fcd
MB
1762static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
1763 void *val, size_t val_count)
1764{
1765 WARN_ONCE(1, "regmap API is disabled");
1766 return -EINVAL;
1767}
1768
91d31b9f
KM
1769static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1770 unsigned int mask, unsigned int val,
1771 bool *change, bool async, bool force)
fd4b7286
KM
1772{
1773 WARN_ONCE(1, "regmap API is disabled");
1774 return -EINVAL;
1775}
1776
aa2ff9db
BG
1777static inline int regmap_set_bits(struct regmap *map,
1778 unsigned int reg, unsigned int bits)
1779{
1780 WARN_ONCE(1, "regmap API is disabled");
1781 return -EINVAL;
1782}
1783
1784static inline int regmap_clear_bits(struct regmap *map,
1785 unsigned int reg, unsigned int bits)
1786{
1787 WARN_ONCE(1, "regmap API is disabled");
1788 return -EINVAL;
1789}
1790
1791static inline int regmap_test_bits(struct regmap *map,
1792 unsigned int reg, unsigned int bits)
1793{
1794 WARN_ONCE(1, "regmap API is disabled");
1795 return -EINVAL;
1796}
1797
28972eaa
KM
1798static inline int regmap_field_update_bits_base(struct regmap_field *field,
1799 unsigned int mask, unsigned int val,
1800 bool *change, bool async, bool force)
915f441b
MB
1801{
1802 WARN_ONCE(1, "regmap API is disabled");
1803 return -EINVAL;
1804}
1805
e126edec
KM
1806static inline int regmap_fields_update_bits_base(struct regmap_field *field,
1807 unsigned int id,
1808 unsigned int mask, unsigned int val,
1809 bool *change, bool async, bool force)
915f441b
MB
1810{
1811 WARN_ONCE(1, "regmap API is disabled");
1812 return -EINVAL;
1813}
1814
4b9e7edb
BG
1815static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1816 unsigned int mask, unsigned int val)
1817{
1818 WARN_ONCE(1, "regmap API is disabled");
1819 return -EINVAL;
1820}
1821
1822static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1823 unsigned int mask, unsigned int val)
1824{
1825 WARN_ONCE(1, "regmap API is disabled");
1826 return -EINVAL;
1827}
1828
1829static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1830 unsigned int mask, unsigned int val,
1831 bool *change)
1832{
1833 WARN_ONCE(1, "regmap API is disabled");
1834 return -EINVAL;
1835}
1836
1837static inline int
1838regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1839 unsigned int mask, unsigned int val,
1840 bool *change)
1841{
1842 WARN_ONCE(1, "regmap API is disabled");
1843 return -EINVAL;
1844}
1845
1846static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1847 unsigned int mask, unsigned int val)
1848{
1849 WARN_ONCE(1, "regmap API is disabled");
1850 return -EINVAL;
1851}
1852
1853static inline int regmap_field_write(struct regmap_field *field,
1854 unsigned int val)
1855{
1856 WARN_ONCE(1, "regmap API is disabled");
1857 return -EINVAL;
1858}
1859
1860static inline int regmap_field_force_write(struct regmap_field *field,
1861 unsigned int val)
1862{
1863 WARN_ONCE(1, "regmap API is disabled");
1864 return -EINVAL;
1865}
1866
1867static inline int regmap_field_update_bits(struct regmap_field *field,
1868 unsigned int mask, unsigned int val)
1869{
1870 WARN_ONCE(1, "regmap API is disabled");
1871 return -EINVAL;
1872}
1873
1874static inline int
1875regmap_field_force_update_bits(struct regmap_field *field,
1876 unsigned int mask, unsigned int val)
1877{
1878 WARN_ONCE(1, "regmap API is disabled");
1879 return -EINVAL;
1880}
1881
f67be8b7
LC
1882static inline int regmap_field_set_bits(struct regmap_field *field,
1883 unsigned int bits)
1884{
1885 WARN_ONCE(1, "regmap API is disabled");
1886 return -EINVAL;
1887}
1888
1889static inline int regmap_field_clear_bits(struct regmap_field *field,
1890 unsigned int bits)
1891{
1892 WARN_ONCE(1, "regmap API is disabled");
1893 return -EINVAL;
1894}
1895
1896static inline int regmap_field_test_bits(struct regmap_field *field,
1897 unsigned int bits)
1898{
1899 WARN_ONCE(1, "regmap API is disabled");
1900 return -EINVAL;
1901}
1902
4b9e7edb
BG
1903static inline int regmap_fields_write(struct regmap_field *field,
1904 unsigned int id, unsigned int val)
1905{
1906 WARN_ONCE(1, "regmap API is disabled");
1907 return -EINVAL;
1908}
1909
1910static inline int regmap_fields_force_write(struct regmap_field *field,
1911 unsigned int id, unsigned int val)
1912{
1913 WARN_ONCE(1, "regmap API is disabled");
1914 return -EINVAL;
1915}
1916
1917static inline int
1918regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1919 unsigned int mask, unsigned int val)
1920{
1921 WARN_ONCE(1, "regmap API is disabled");
1922 return -EINVAL;
1923}
1924
1925static inline int
1926regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1927 unsigned int mask, unsigned int val)
1928{
1929 WARN_ONCE(1, "regmap API is disabled");
1930 return -EINVAL;
1931}
1932
9cde5fcd
MB
1933static inline int regmap_get_val_bytes(struct regmap *map)
1934{
1935 WARN_ONCE(1, "regmap API is disabled");
1936 return -EINVAL;
1937}
1938
668abc72
SK
1939static inline int regmap_get_max_register(struct regmap *map)
1940{
1941 WARN_ONCE(1, "regmap API is disabled");
1942 return -EINVAL;
1943}
1944
a2f776cb
SK
1945static inline int regmap_get_reg_stride(struct regmap *map)
1946{
1947 WARN_ONCE(1, "regmap API is disabled");
1948 return -EINVAL;
1949}
1950
a6d99022
MW
1951static inline bool regmap_might_sleep(struct regmap *map)
1952{
1953 WARN_ONCE(1, "regmap API is disabled");
1954 return true;
1955}
1956
9cde5fcd
MB
1957static inline int regcache_sync(struct regmap *map)
1958{
1959 WARN_ONCE(1, "regmap API is disabled");
1960 return -EINVAL;
1961}
1962
a313f9f5
MB
1963static inline int regcache_sync_region(struct regmap *map, unsigned int min,
1964 unsigned int max)
1965{
1966 WARN_ONCE(1, "regmap API is disabled");
1967 return -EINVAL;
1968}
1969
697e85bc
MB
1970static inline int regcache_drop_region(struct regmap *map, unsigned int min,
1971 unsigned int max)
1972{
1973 WARN_ONCE(1, "regmap API is disabled");
1974 return -EINVAL;
1975}
1976
9cde5fcd
MB
1977static inline void regcache_cache_only(struct regmap *map, bool enable)
1978{
1979 WARN_ONCE(1, "regmap API is disabled");
1980}
1981
1982static inline void regcache_cache_bypass(struct regmap *map, bool enable)
1983{
1984 WARN_ONCE(1, "regmap API is disabled");
1985}
1986
1987static inline void regcache_mark_dirty(struct regmap *map)
1988{
1989 WARN_ONCE(1, "regmap API is disabled");
1990}
1991
0d509f2b
MB
1992static inline void regmap_async_complete(struct regmap *map)
1993{
1994 WARN_ONCE(1, "regmap API is disabled");
1995}
1996
9cde5fcd 1997static inline int regmap_register_patch(struct regmap *map,
a6baa3de 1998 const struct reg_sequence *regs,
9cde5fcd
MB
1999 int num_regs)
2000{
2001 WARN_ONCE(1, "regmap API is disabled");
2002 return -EINVAL;
2003}
2004
13ff50c8
NC
2005static inline int regmap_parse_val(struct regmap *map, const void *buf,
2006 unsigned int *val)
2007{
2008 WARN_ONCE(1, "regmap API is disabled");
2009 return -EINVAL;
2010}
2011
72b39f6f
MB
2012static inline struct regmap *dev_get_regmap(struct device *dev,
2013 const char *name)
2014{
72b39f6f
MB
2015 return NULL;
2016}
2017
8d7d3972
TT
2018static inline struct device *regmap_get_device(struct regmap *map)
2019{
2020 WARN_ONCE(1, "regmap API is disabled");
1d33dc6b 2021 return NULL;
8d7d3972
TT
2022}
2023
9cde5fcd
MB
2024#endif
2025
b83a313b 2026#endif