]> git.ipfire.org Git - thirdparty/kernel/linux.git/blame - include/linux/regmap.h
Linux 5.7-rc1
[thirdparty/kernel/linux.git] / include / linux / regmap.h
CommitLineData
d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
b83a313b
MB
2#ifndef __LINUX_REGMAP_H
3#define __LINUX_REGMAP_H
4
5/*
6 * Register map access API
7 *
8 * Copyright 2011 Wolfson Microelectronics plc
9 *
10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
b83a313b
MB
11 */
12
b83a313b 13#include <linux/list.h>
6863ca62 14#include <linux/rbtree.h>
f15cd6d9 15#include <linux/ktime.h>
adf08d48 16#include <linux/delay.h>
49ccc142 17#include <linux/err.h>
3f0fa9a8 18#include <linux/bug.h>
3cfe7a74 19#include <linux/lockdep.h>
b83a313b 20
de477254 21struct module;
31895662 22struct clk;
313162d0 23struct device;
9943fa30 24struct i2c_client;
6445500b 25struct i3c_device;
90f790d2 26struct irq_domain;
7d6f7fb0 27struct slim_device;
a676f083 28struct spi_device;
a01779f8 29struct spmi_device;
b83d2ff0 30struct regmap;
6863ca62 31struct regmap_range_cfg;
67252287 32struct regmap_field;
22853223 33struct snd_ac97;
7c22ce6e 34struct sdw_slave;
9943fa30 35
9fabe24e
DP
36/* An enum of all the supported cache types */
37enum regcache_type {
38 REGCACHE_NONE,
28644c80 39 REGCACHE_RBTREE,
2ac902ce
MB
40 REGCACHE_COMPRESSED,
41 REGCACHE_FLAT,
9fabe24e
DP
42};
43
bd20eb54 44/**
2cf8e2df 45 * struct reg_default - Default value for a register.
bd20eb54
MB
46 *
47 * @reg: Register address.
48 * @def: Register default value.
2cf8e2df
CK
49 *
50 * We use an array of structs rather than a simple array as many modern devices
51 * have very sparse register maps.
bd20eb54
MB
52 */
53struct reg_default {
54 unsigned int reg;
55 unsigned int def;
56};
57
8019ff6c 58/**
2cf8e2df 59 * struct reg_sequence - An individual write from a sequence of writes.
8019ff6c
NP
60 *
61 * @reg: Register address.
62 * @def: Register value.
2de9d600 63 * @delay_us: Delay to be applied after the register write in microseconds
2cf8e2df
CK
64 *
65 * Register/value pairs for sequences of writes with an optional delay in
66 * microseconds to be applied after each write.
8019ff6c
NP
67 */
68struct reg_sequence {
69 unsigned int reg;
70 unsigned int def;
2de9d600 71 unsigned int delay_us;
8019ff6c
NP
72};
73
ca7a9446
KM
74#define regmap_update_bits(map, reg, mask, val) \
75 regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
30ed9cb7
KM
76#define regmap_update_bits_async(map, reg, mask, val)\
77 regmap_update_bits_base(map, reg, mask, val, NULL, true, false)
98c2dc48
KM
78#define regmap_update_bits_check(map, reg, mask, val, change)\
79 regmap_update_bits_base(map, reg, mask, val, change, false, false)
89d8d4b8
KM
80#define regmap_update_bits_check_async(map, reg, mask, val, change)\
81 regmap_update_bits_base(map, reg, mask, val, change, true, false)
ca7a9446 82
b821957a
KM
83#define regmap_write_bits(map, reg, mask, val) \
84 regmap_update_bits_base(map, reg, mask, val, NULL, false, true)
85
3674124b
KM
86#define regmap_field_write(field, val) \
87 regmap_field_update_bits_base(field, ~0, val, NULL, false, false)
489061bb
KM
88#define regmap_field_force_write(field, val) \
89 regmap_field_update_bits_base(field, ~0, val, NULL, false, true)
721ed64d
KM
90#define regmap_field_update_bits(field, mask, val)\
91 regmap_field_update_bits_base(field, mask, val, NULL, false, false)
489061bb
KM
92#define regmap_field_force_update_bits(field, mask, val) \
93 regmap_field_update_bits_base(field, mask, val, NULL, false, true)
3674124b 94
bbf2c46f
KM
95#define regmap_fields_write(field, id, val) \
96 regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, false)
e6ef243f
KM
97#define regmap_fields_force_write(field, id, val) \
98 regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, true)
48138609
KM
99#define regmap_fields_update_bits(field, id, mask, val)\
100 regmap_fields_update_bits_base(field, id, mask, val, NULL, false, false)
e6ef243f
KM
101#define regmap_fields_force_update_bits(field, id, mask, val) \
102 regmap_fields_update_bits_base(field, id, mask, val, NULL, false, true)
bbf2c46f 103
08188ba8
PZ
104/**
105 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
2cf8e2df 106 *
08188ba8
PZ
107 * @map: Regmap to read from
108 * @addr: Address to poll
109 * @val: Unsigned integer variable to read the value into
110 * @cond: Break condition (usually involving @val)
111 * @sleep_us: Maximum time to sleep between reads in us (0
112 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 113 * is used (see Documentation/timers/timers-howto.rst).
08188ba8
PZ
114 * @timeout_us: Timeout in us, 0 means never timeout
115 *
116 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
117 * error return value in case of a error read. In the two former cases,
118 * the last read value at @addr is stored in @val. Must not be called
119 * from atomic context if sleep_us or timeout_us are used.
120 *
121 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
122 */
123#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
124({ \
1b0c22e4
AB
125 u64 __timeout_us = (timeout_us); \
126 unsigned long __sleep_us = (sleep_us); \
127 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
780b1350 128 int __ret; \
1b0c22e4 129 might_sleep_if(__sleep_us); \
08188ba8 130 for (;;) { \
780b1350
RS
131 __ret = regmap_read((map), (addr), &(val)); \
132 if (__ret) \
08188ba8
PZ
133 break; \
134 if (cond) \
135 break; \
1b0c22e4 136 if ((__timeout_us) && \
780b1350
RS
137 ktime_compare(ktime_get(), __timeout) > 0) { \
138 __ret = regmap_read((map), (addr), &(val)); \
08188ba8
PZ
139 break; \
140 } \
1b0c22e4
AB
141 if (__sleep_us) \
142 usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
08188ba8 143 } \
780b1350 144 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
08188ba8
PZ
145})
146
50816a4c
SP
147/**
148 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
149 *
150 * @map: Regmap to read from
151 * @addr: Address to poll
152 * @val: Unsigned integer variable to read the value into
153 * @cond: Break condition (usually involving @val)
154 * @delay_us: Time to udelay between reads in us (0 tight-loops).
155 * Should be less than ~10us since udelay is used
156 * (see Documentation/timers/timers-howto.rst).
157 * @timeout_us: Timeout in us, 0 means never timeout
158 *
159 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
160 * error return value in case of a error read. In the two former cases,
161 * the last read value at @addr is stored in @val.
162 *
163 * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
164 *
165 * Note: In general regmap cannot be used in atomic context. If you want to use
166 * this macro then first setup your regmap for atomic use (flat or no cache
167 * and MMIO regmap).
168 */
169#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
170({ \
171 u64 __timeout_us = (timeout_us); \
172 unsigned long __delay_us = (delay_us); \
173 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
174 int __ret; \
175 for (;;) { \
176 __ret = regmap_read((map), (addr), &(val)); \
177 if (__ret) \
178 break; \
179 if (cond) \
180 break; \
181 if ((__timeout_us) && \
182 ktime_compare(ktime_get(), __timeout) > 0) { \
183 __ret = regmap_read((map), (addr), &(val)); \
184 break; \
185 } \
186 if (__delay_us) \
187 udelay(__delay_us); \
188 } \
189 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
190})
191
667063ac
CYT
192/**
193 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
194 *
195 * @field: Regmap field to read from
196 * @val: Unsigned integer variable to read the value into
197 * @cond: Break condition (usually involving @val)
198 * @sleep_us: Maximum time to sleep between reads in us (0
199 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 200 * is used (see Documentation/timers/timers-howto.rst).
667063ac
CYT
201 * @timeout_us: Timeout in us, 0 means never timeout
202 *
203 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
204 * error return value in case of a error read. In the two former cases,
205 * the last read value at @addr is stored in @val. Must not be called
206 * from atomic context if sleep_us or timeout_us are used.
207 *
208 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
209 */
210#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
211({ \
1b0c22e4
AB
212 u64 __timeout_us = (timeout_us); \
213 unsigned long __sleep_us = (sleep_us); \
214 ktime_t timeout = ktime_add_us(ktime_get(), __timeout_us); \
667063ac 215 int pollret; \
1b0c22e4 216 might_sleep_if(__sleep_us); \
667063ac
CYT
217 for (;;) { \
218 pollret = regmap_field_read((field), &(val)); \
219 if (pollret) \
220 break; \
221 if (cond) \
222 break; \
1b0c22e4 223 if (__timeout_us && ktime_compare(ktime_get(), timeout) > 0) { \
667063ac
CYT
224 pollret = regmap_field_read((field), &(val)); \
225 break; \
226 } \
1b0c22e4
AB
227 if (__sleep_us) \
228 usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
667063ac
CYT
229 } \
230 pollret ?: ((cond) ? 0 : -ETIMEDOUT); \
231})
232
b83d2ff0
MB
233#ifdef CONFIG_REGMAP
234
141eba2e
SW
235enum regmap_endian {
236 /* Unspecified -> 0 -> Backwards compatible default */
237 REGMAP_ENDIAN_DEFAULT = 0,
238 REGMAP_ENDIAN_BIG,
239 REGMAP_ENDIAN_LITTLE,
240 REGMAP_ENDIAN_NATIVE,
241};
242
76aad392 243/**
2cf8e2df
CK
244 * struct regmap_range - A register range, used for access related checks
245 * (readable/writeable/volatile/precious checks)
76aad392
DC
246 *
247 * @range_min: address of first register
248 * @range_max: address of last register
249 */
250struct regmap_range {
251 unsigned int range_min;
252 unsigned int range_max;
253};
254
6112fe60
LD
255#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
256
2cf8e2df
CK
257/**
258 * struct regmap_access_table - A table of register ranges for access checks
76aad392
DC
259 *
260 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
261 * @n_yes_ranges: size of the above array
262 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
263 * @n_no_ranges: size of the above array
2cf8e2df
CK
264 *
265 * A table of ranges including some yes ranges and some no ranges.
266 * If a register belongs to a no_range, the corresponding check function
267 * will return false. If a register belongs to a yes range, the corresponding
268 * check function will return true. "no_ranges" are searched first.
76aad392
DC
269 */
270struct regmap_access_table {
271 const struct regmap_range *yes_ranges;
272 unsigned int n_yes_ranges;
273 const struct regmap_range *no_ranges;
274 unsigned int n_no_ranges;
275};
276
0d4529c5
DC
277typedef void (*regmap_lock)(void *);
278typedef void (*regmap_unlock)(void *);
279
dd898b20 280/**
2cf8e2df 281 * struct regmap_config - Configuration for the register map of a device.
dd898b20 282 *
d3c242e1
SW
283 * @name: Optional name of the regmap. Useful when a device has multiple
284 * register regions.
285 *
dd898b20 286 * @reg_bits: Number of bits in a register address, mandatory.
f01ee60f
SW
287 * @reg_stride: The register address stride. Valid register addresses are a
288 * multiple of this value. If set to 0, a value of 1 will be
289 * used.
82159ba8 290 * @pad_bits: Number of bits of padding between register and value.
dd898b20 291 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 292 *
3566cc9d 293 * @writeable_reg: Optional callback returning true if the register
76aad392
DC
294 * can be written to. If this field is NULL but wr_table
295 * (see below) is not, the check is performed on such table
296 * (a register is writeable if it belongs to one of the ranges
297 * specified by wr_table).
3566cc9d 298 * @readable_reg: Optional callback returning true if the register
76aad392
DC
299 * can be read from. If this field is NULL but rd_table
300 * (see below) is not, the check is performed on such table
301 * (a register is readable if it belongs to one of the ranges
302 * specified by rd_table).
3566cc9d 303 * @volatile_reg: Optional callback returning true if the register
76aad392
DC
304 * value can't be cached. If this field is NULL but
305 * volatile_table (see below) is not, the check is performed on
306 * such table (a register is volatile if it belongs to one of
307 * the ranges specified by volatile_table).
bdc39644 308 * @precious_reg: Optional callback returning true if the register
76aad392 309 * should not be read outside of a call from the driver
bdc39644 310 * (e.g., a clear on read interrupt status register). If this
76aad392
DC
311 * field is NULL but precious_table (see below) is not, the
312 * check is performed on such table (a register is precious if
313 * it belongs to one of the ranges specified by precious_table).
cdf6b11d
BW
314 * @writeable_noinc_reg: Optional callback returning true if the register
315 * supports multiple write operations without incrementing
316 * the register number. If this field is NULL but
317 * wr_noinc_table (see below) is not, the check is
318 * performed on such table (a register is no increment
319 * writeable if it belongs to one of the ranges specified
320 * by wr_noinc_table).
74fe7b55
LC
321 * @readable_noinc_reg: Optional callback returning true if the register
322 * supports multiple read operations without incrementing
323 * the register number. If this field is NULL but
324 * rd_noinc_table (see below) is not, the check is
325 * performed on such table (a register is no increment
326 * readable if it belongs to one of the ranges specified
327 * by rd_noinc_table).
c9b41fcf
BG
328 * @disable_locking: This regmap is either protected by external means or
329 * is guaranteed not be be accessed from multiple threads.
330 * Don't use any locking mechanisms.
76aad392
DC
331 * @lock: Optional lock callback (overrides regmap's default lock
332 * function, based on spinlock or mutex).
333 * @unlock: As above for unlocking.
334 * @lock_arg: this field is passed as the only argument of lock/unlock
335 * functions (ignored in case regular lock/unlock functions
336 * are not overridden).
d2a5884a
AS
337 * @reg_read: Optional callback that if filled will be used to perform
338 * all the reads from the registers. Should only be provided for
bdc39644
LP
339 * devices whose read operation cannot be represented as a simple
340 * read operation on a bus such as SPI, I2C, etc. Most of the
341 * devices do not need this.
d2a5884a
AS
342 * @reg_write: Same as above for writing.
343 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
344 * to perform locking. This field is ignored if custom lock/unlock
345 * functions are used (see fields lock/unlock of struct regmap_config).
346 * This field is a duplicate of a similar file in
347 * 'struct regmap_bus' and serves exact same purpose.
348 * Use it only for "no-bus" cases.
b429fab4 349 * @max_register: Optional, specifies the maximum valid register address.
76aad392
DC
350 * @wr_table: Optional, points to a struct regmap_access_table specifying
351 * valid ranges for write access.
352 * @rd_table: As above, for read access.
353 * @volatile_table: As above, for volatile registers.
354 * @precious_table: As above, for precious registers.
cdf6b11d 355 * @wr_noinc_table: As above, for no increment writeable registers.
74fe7b55 356 * @rd_noinc_table: As above, for no increment readable registers.
bd20eb54
MB
357 * @reg_defaults: Power on reset values for registers (for use with
358 * register cache support).
359 * @num_reg_defaults: Number of elements in reg_defaults.
6f306441 360 *
f50e38c9 361 * @read_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 362 * a read.
f50e38c9 363 * @write_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 364 * a write. If both read_flag_mask and write_flag_mask are
9bf485c9
AD
365 * empty and zero_flag_mask is not set the regmap_bus default
366 * masks are used.
367 * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
368 * if they are both empty.
1c96a2f6
DF
369 * @use_single_read: If set, converts the bulk read operation into a series of
370 * single read operations. This is useful for a device that
371 * does not support bulk read.
372 * @use_single_write: If set, converts the bulk write operation into a series of
373 * single write operations. This is useful for a device that
374 * does not support bulk write.
e894c3f4
OAO
375 * @can_multi_write: If set, the device supports the multi write mode of bulk
376 * write operations, if clear multi write requests will be
377 * split into individual write operations
9fabe24e
DP
378 *
379 * @cache_type: The actual cache type.
380 * @reg_defaults_raw: Power on reset values for registers (for use with
381 * register cache support).
382 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
141eba2e
SW
383 * @reg_format_endian: Endianness for formatted register addresses. If this is
384 * DEFAULT, the @reg_format_endian_default value from the
385 * regmap bus is used.
386 * @val_format_endian: Endianness for formatted register values. If this is
387 * DEFAULT, the @reg_format_endian_default value from the
388 * regmap bus is used.
6863ca62
KG
389 *
390 * @ranges: Array of configuration entries for virtual address ranges.
391 * @num_ranges: Number of range configuration entries.
a4887813 392 * @use_hwlock: Indicate if a hardware spinlock should be used.
8698b936
BW
393 * @hwlock_id: Specify the hardware spinlock id.
394 * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
395 * HWLOCK_IRQ or 0.
dd898b20 396 */
b83a313b 397struct regmap_config {
d3c242e1
SW
398 const char *name;
399
b83a313b 400 int reg_bits;
f01ee60f 401 int reg_stride;
82159ba8 402 int pad_bits;
b83a313b 403 int val_bits;
2e2ae66d 404
2e2ae66d
MB
405 bool (*writeable_reg)(struct device *dev, unsigned int reg);
406 bool (*readable_reg)(struct device *dev, unsigned int reg);
407 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 408 bool (*precious_reg)(struct device *dev, unsigned int reg);
cdf6b11d 409 bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
74fe7b55 410 bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
c9b41fcf
BG
411
412 bool disable_locking;
0d4529c5
DC
413 regmap_lock lock;
414 regmap_unlock unlock;
415 void *lock_arg;
bd20eb54 416
d2a5884a
AS
417 int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
418 int (*reg_write)(void *context, unsigned int reg, unsigned int val);
419
420 bool fast_io;
421
bd20eb54 422 unsigned int max_register;
76aad392
DC
423 const struct regmap_access_table *wr_table;
424 const struct regmap_access_table *rd_table;
425 const struct regmap_access_table *volatile_table;
426 const struct regmap_access_table *precious_table;
cdf6b11d 427 const struct regmap_access_table *wr_noinc_table;
74fe7b55 428 const struct regmap_access_table *rd_noinc_table;
720e4616 429 const struct reg_default *reg_defaults;
9fabe24e
DP
430 unsigned int num_reg_defaults;
431 enum regcache_type cache_type;
432 const void *reg_defaults_raw;
433 unsigned int num_reg_defaults_raw;
6f306441 434
f50e38c9
TL
435 unsigned long read_flag_mask;
436 unsigned long write_flag_mask;
9bf485c9 437 bool zero_flag_mask;
2e33caf1 438
1c96a2f6
DF
439 bool use_single_read;
440 bool use_single_write;
e894c3f4 441 bool can_multi_write;
141eba2e
SW
442
443 enum regmap_endian reg_format_endian;
444 enum regmap_endian val_format_endian;
38e23194 445
6863ca62 446 const struct regmap_range_cfg *ranges;
e3549cd0 447 unsigned int num_ranges;
8698b936 448
a4887813 449 bool use_hwlock;
8698b936
BW
450 unsigned int hwlock_id;
451 unsigned int hwlock_mode;
6863ca62
KG
452};
453
454/**
2cf8e2df
CK
455 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
456 * registers.
6863ca62 457 *
d058bb49
MB
458 * @name: Descriptive name for diagnostics
459 *
6863ca62
KG
460 * @range_min: Address of the lowest register address in virtual range.
461 * @range_max: Address of the highest register in virtual range.
462 *
2cf8e2df 463 * @selector_reg: Register with selector field.
ad5906bd
PL
464 * @selector_mask: Bit mask for selector value.
465 * @selector_shift: Bit shift for selector value.
6863ca62
KG
466 *
467 * @window_start: Address of first (lowest) register in data window.
468 * @window_len: Number of registers in data window.
2cf8e2df
CK
469 *
470 * Registers, mapped to this virtual range, are accessed in two steps:
471 * 1. page selector register update;
472 * 2. access through data window registers.
6863ca62
KG
473 */
474struct regmap_range_cfg {
d058bb49
MB
475 const char *name;
476
6863ca62
KG
477 /* Registers of virtual address range */
478 unsigned int range_min;
479 unsigned int range_max;
480
481 /* Page selector for indirect addressing */
482 unsigned int selector_reg;
483 unsigned int selector_mask;
484 int selector_shift;
485
486 /* Data window (per each page) */
487 unsigned int window_start;
488 unsigned int window_len;
b83a313b
MB
489};
490
0d509f2b
MB
491struct regmap_async;
492
0135bbcc 493typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 494 size_t count);
0135bbcc 495typedef int (*regmap_hw_gather_write)(void *context,
b83a313b
MB
496 const void *reg, size_t reg_len,
497 const void *val, size_t val_len);
0d509f2b
MB
498typedef int (*regmap_hw_async_write)(void *context,
499 const void *reg, size_t reg_len,
500 const void *val, size_t val_len,
501 struct regmap_async *async);
0135bbcc 502typedef int (*regmap_hw_read)(void *context,
b83a313b
MB
503 const void *reg_buf, size_t reg_size,
504 void *val_buf, size_t val_size);
3ac17037
BB
505typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
506 unsigned int *val);
507typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
508 unsigned int val);
77792b11
JR
509typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
510 unsigned int mask, unsigned int val);
0d509f2b 511typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
0135bbcc 512typedef void (*regmap_hw_free_context)(void *context);
b83a313b
MB
513
514/**
2cf8e2df
CK
515 * struct regmap_bus - Description of a hardware bus for the register map
516 * infrastructure.
b83a313b 517 *
bacdbe07 518 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
0d4529c5
DC
519 * to perform locking. This field is ignored if custom lock/unlock
520 * functions are used (see fields lock/unlock of
521 * struct regmap_config).
b83a313b
MB
522 * @write: Write operation.
523 * @gather_write: Write operation with split register/value, return -ENOTSUPP
524 * if not implemented on a given device.
0d509f2b
MB
525 * @async_write: Write operation which completes asynchronously, optional and
526 * must serialise with respect to non-async I/O.
c5f58f2d
MSP
527 * @reg_write: Write a single register value to the given register address. This
528 * write operation has to complete when returning from the function.
2cf8e2df
CK
529 * @reg_update_bits: Update bits operation to be used against volatile
530 * registers, intended for devices supporting some mechanism
531 * for setting clearing bits without having to
532 * read/modify/write.
b83a313b
MB
533 * @read: Read operation. Data is returned in the buffer used to transmit
534 * data.
c5f58f2d
MSP
535 * @reg_read: Read a single register value from a given register address.
536 * @free_context: Free context.
0d509f2b 537 * @async_alloc: Allocate a regmap_async() structure.
b83a313b
MB
538 * @read_flag_mask: Mask to be set in the top byte of the register when doing
539 * a read.
141eba2e
SW
540 * @reg_format_endian_default: Default endianness for formatted register
541 * addresses. Used when the regmap_config specifies DEFAULT. If this is
542 * DEFAULT, BIG is assumed.
543 * @val_format_endian_default: Default endianness for formatted register
544 * values. Used when the regmap_config specifies DEFAULT. If this is
545 * DEFAULT, BIG is assumed.
adaac459
MSP
546 * @max_raw_read: Max raw read size that can be used on the bus.
547 * @max_raw_write: Max raw write size that can be used on the bus.
b83a313b
MB
548 */
549struct regmap_bus {
bacdbe07 550 bool fast_io;
b83a313b
MB
551 regmap_hw_write write;
552 regmap_hw_gather_write gather_write;
0d509f2b 553 regmap_hw_async_write async_write;
3ac17037 554 regmap_hw_reg_write reg_write;
77792b11 555 regmap_hw_reg_update_bits reg_update_bits;
b83a313b 556 regmap_hw_read read;
3ac17037 557 regmap_hw_reg_read reg_read;
0135bbcc 558 regmap_hw_free_context free_context;
0d509f2b 559 regmap_hw_async_alloc async_alloc;
b83a313b 560 u8 read_flag_mask;
141eba2e
SW
561 enum regmap_endian reg_format_endian_default;
562 enum regmap_endian val_format_endian_default;
adaac459
MSP
563 size_t max_raw_read;
564 size_t max_raw_write;
b83a313b
MB
565};
566
3cfe7a74
NB
567/*
568 * __regmap_init functions.
569 *
570 * These functions take a lock key and name parameter, and should not be called
571 * directly. Instead, use the regmap_init macros that generate a key and name
572 * for each call.
573 */
574struct regmap *__regmap_init(struct device *dev,
575 const struct regmap_bus *bus,
576 void *bus_context,
577 const struct regmap_config *config,
578 struct lock_class_key *lock_key,
579 const char *lock_name);
580struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
581 const struct regmap_config *config,
582 struct lock_class_key *lock_key,
583 const char *lock_name);
bcf7eac3
AM
584struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
585 const struct regmap_config *config,
586 struct lock_class_key *lock_key,
587 const char *lock_name);
7d6f7fb0
SK
588struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
589 const struct regmap_config *config,
590 struct lock_class_key *lock_key,
591 const char *lock_name);
3cfe7a74
NB
592struct regmap *__regmap_init_spi(struct spi_device *dev,
593 const struct regmap_config *config,
594 struct lock_class_key *lock_key,
595 const char *lock_name);
596struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
597 const struct regmap_config *config,
598 struct lock_class_key *lock_key,
599 const char *lock_name);
600struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
601 const struct regmap_config *config,
602 struct lock_class_key *lock_key,
603 const char *lock_name);
cc5d0db3
AM
604struct regmap *__regmap_init_w1(struct device *w1_dev,
605 const struct regmap_config *config,
606 struct lock_class_key *lock_key,
607 const char *lock_name);
3cfe7a74
NB
608struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
609 void __iomem *regs,
610 const struct regmap_config *config,
611 struct lock_class_key *lock_key,
612 const char *lock_name);
613struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
614 const struct regmap_config *config,
615 struct lock_class_key *lock_key,
616 const char *lock_name);
7c22ce6e
VK
617struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
618 const struct regmap_config *config,
619 struct lock_class_key *lock_key,
620 const char *lock_name);
3cfe7a74
NB
621
622struct regmap *__devm_regmap_init(struct device *dev,
623 const struct regmap_bus *bus,
624 void *bus_context,
625 const struct regmap_config *config,
626 struct lock_class_key *lock_key,
627 const char *lock_name);
628struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
629 const struct regmap_config *config,
630 struct lock_class_key *lock_key,
631 const char *lock_name);
bcf7eac3
AM
632struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
633 const struct regmap_config *config,
634 struct lock_class_key *lock_key,
635 const char *lock_name);
3cfe7a74
NB
636struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
637 const struct regmap_config *config,
638 struct lock_class_key *lock_key,
639 const char *lock_name);
640struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
641 const struct regmap_config *config,
642 struct lock_class_key *lock_key,
643 const char *lock_name);
644struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
645 const struct regmap_config *config,
646 struct lock_class_key *lock_key,
647 const char *lock_name);
cc5d0db3
AM
648struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
649 const struct regmap_config *config,
650 struct lock_class_key *lock_key,
651 const char *lock_name);
3cfe7a74
NB
652struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
653 const char *clk_id,
654 void __iomem *regs,
655 const struct regmap_config *config,
656 struct lock_class_key *lock_key,
657 const char *lock_name);
658struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
659 const struct regmap_config *config,
660 struct lock_class_key *lock_key,
661 const char *lock_name);
7c22ce6e
VK
662struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
663 const struct regmap_config *config,
664 struct lock_class_key *lock_key,
665 const char *lock_name);
ed24d568
SK
666struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
667 const struct regmap_config *config,
668 struct lock_class_key *lock_key,
669 const char *lock_name);
6445500b
VS
670struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
671 const struct regmap_config *config,
672 struct lock_class_key *lock_key,
673 const char *lock_name);
3cfe7a74
NB
674/*
675 * Wrapper for regmap_init macros to include a unique lockdep key and name
676 * for each call. No-op if CONFIG_LOCKDEP is not set.
677 *
678 * @fn: Real function to call (in the form __[*_]regmap_init[_*])
679 * @name: Config variable name (#config in the calling macro)
680 **/
681#ifdef CONFIG_LOCKDEP
682#define __regmap_lockdep_wrapper(fn, name, ...) \
683( \
684 ({ \
685 static struct lock_class_key _key; \
686 fn(__VA_ARGS__, &_key, \
687 KBUILD_BASENAME ":" \
688 __stringify(__LINE__) ":" \
689 "(" name ")->lock"); \
690 }) \
691)
692#else
693#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
694#endif
695
1ed81114 696/**
2cf8e2df 697 * regmap_init() - Initialise register map
1ed81114
NB
698 *
699 * @dev: Device that will be interacted with
700 * @bus: Bus-specific callbacks to use with device
701 * @bus_context: Data passed to bus-specific callbacks
702 * @config: Configuration for register map
703 *
704 * The return value will be an ERR_PTR() on error or a valid pointer to
705 * a struct regmap. This function should generally not be called
706 * directly, it should be called by bus-specific init functions.
707 */
3cfe7a74
NB
708#define regmap_init(dev, bus, bus_context, config) \
709 __regmap_lockdep_wrapper(__regmap_init, #config, \
710 dev, bus, bus_context, config)
6cfec04b 711int regmap_attach_dev(struct device *dev, struct regmap *map,
3cfe7a74 712 const struct regmap_config *config);
22853223 713
1ed81114 714/**
2cf8e2df 715 * regmap_init_i2c() - Initialise register map
1ed81114
NB
716 *
717 * @i2c: Device that will be interacted with
718 * @config: Configuration for register map
719 *
720 * The return value will be an ERR_PTR() on error or a valid pointer to
721 * a struct regmap.
722 */
3cfe7a74
NB
723#define regmap_init_i2c(i2c, config) \
724 __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
725 i2c, config)
1ed81114 726
bcf7eac3
AM
727/**
728 * regmap_init_sccb() - Initialise register map
729 *
730 * @i2c: Device that will be interacted with
731 * @config: Configuration for register map
732 *
733 * The return value will be an ERR_PTR() on error or a valid pointer to
734 * a struct regmap.
735 */
736#define regmap_init_sccb(i2c, config) \
737 __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \
738 i2c, config)
739
7d6f7fb0
SK
740/**
741 * regmap_init_slimbus() - Initialise register map
742 *
743 * @slimbus: Device that will be interacted with
744 * @config: Configuration for register map
745 *
746 * The return value will be an ERR_PTR() on error or a valid pointer to
747 * a struct regmap.
748 */
749#define regmap_init_slimbus(slimbus, config) \
750 __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
751 slimbus, config)
752
1ed81114 753/**
2cf8e2df 754 * regmap_init_spi() - Initialise register map
1ed81114 755 *
2cf8e2df 756 * @dev: Device that will be interacted with
1ed81114
NB
757 * @config: Configuration for register map
758 *
759 * The return value will be an ERR_PTR() on error or a valid pointer to
760 * a struct regmap.
761 */
3cfe7a74
NB
762#define regmap_init_spi(dev, config) \
763 __regmap_lockdep_wrapper(__regmap_init_spi, #config, \
764 dev, config)
1ed81114
NB
765
766/**
2cf8e2df
CK
767 * regmap_init_spmi_base() - Create regmap for the Base register space
768 *
769 * @dev: SPMI device that will be interacted with
1ed81114
NB
770 * @config: Configuration for register map
771 *
772 * The return value will be an ERR_PTR() on error or a valid pointer to
773 * a struct regmap.
774 */
3cfe7a74
NB
775#define regmap_init_spmi_base(dev, config) \
776 __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \
777 dev, config)
1ed81114
NB
778
779/**
2cf8e2df
CK
780 * regmap_init_spmi_ext() - Create regmap for Ext register space
781 *
782 * @dev: Device that will be interacted with
1ed81114
NB
783 * @config: Configuration for register map
784 *
785 * The return value will be an ERR_PTR() on error or a valid pointer to
786 * a struct regmap.
787 */
3cfe7a74
NB
788#define regmap_init_spmi_ext(dev, config) \
789 __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
790 dev, config)
1ed81114 791
cc5d0db3
AM
792/**
793 * regmap_init_w1() - Initialise register map
794 *
795 * @w1_dev: Device that will be interacted with
796 * @config: Configuration for register map
797 *
798 * The return value will be an ERR_PTR() on error or a valid pointer to
799 * a struct regmap.
800 */
801#define regmap_init_w1(w1_dev, config) \
802 __regmap_lockdep_wrapper(__regmap_init_w1, #config, \
803 w1_dev, config)
804
1ed81114 805/**
2cf8e2df 806 * regmap_init_mmio_clk() - Initialise register map with register clock
1ed81114
NB
807 *
808 * @dev: Device that will be interacted with
809 * @clk_id: register clock consumer ID
810 * @regs: Pointer to memory-mapped IO region
811 * @config: Configuration for register map
812 *
813 * The return value will be an ERR_PTR() on error or a valid pointer to
814 * a struct regmap.
815 */
3cfe7a74
NB
816#define regmap_init_mmio_clk(dev, clk_id, regs, config) \
817 __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \
818 dev, clk_id, regs, config)
878ec67b
PZ
819
820/**
2cf8e2df 821 * regmap_init_mmio() - Initialise register map
878ec67b
PZ
822 *
823 * @dev: Device that will be interacted with
824 * @regs: Pointer to memory-mapped IO region
825 * @config: Configuration for register map
826 *
827 * The return value will be an ERR_PTR() on error or a valid pointer to
828 * a struct regmap.
829 */
1ed81114
NB
830#define regmap_init_mmio(dev, regs, config) \
831 regmap_init_mmio_clk(dev, NULL, regs, config)
832
833/**
2cf8e2df 834 * regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
835 *
836 * @ac97: Device that will be interacted with
837 * @config: Configuration for register map
838 *
839 * The return value will be an ERR_PTR() on error or a valid pointer to
840 * a struct regmap.
841 */
3cfe7a74
NB
842#define regmap_init_ac97(ac97, config) \
843 __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \
844 ac97, config)
22853223 845bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
878ec67b 846
7c22ce6e
VK
847/**
848 * regmap_init_sdw() - Initialise register map
849 *
850 * @sdw: Device that will be interacted with
851 * @config: Configuration for register map
852 *
853 * The return value will be an ERR_PTR() on error or a valid pointer to
854 * a struct regmap.
855 */
856#define regmap_init_sdw(sdw, config) \
857 __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \
858 sdw, config)
859
860
1ed81114 861/**
2cf8e2df 862 * devm_regmap_init() - Initialise managed register map
1ed81114
NB
863 *
864 * @dev: Device that will be interacted with
865 * @bus: Bus-specific callbacks to use with device
866 * @bus_context: Data passed to bus-specific callbacks
867 * @config: Configuration for register map
868 *
869 * The return value will be an ERR_PTR() on error or a valid pointer
870 * to a struct regmap. This function should generally not be called
871 * directly, it should be called by bus-specific init functions. The
872 * map will be automatically freed by the device management code.
873 */
3cfe7a74
NB
874#define devm_regmap_init(dev, bus, bus_context, config) \
875 __regmap_lockdep_wrapper(__devm_regmap_init, #config, \
876 dev, bus, bus_context, config)
1ed81114
NB
877
878/**
2cf8e2df 879 * devm_regmap_init_i2c() - Initialise managed register map
1ed81114
NB
880 *
881 * @i2c: Device that will be interacted with
882 * @config: Configuration for register map
883 *
884 * The return value will be an ERR_PTR() on error or a valid pointer
885 * to a struct regmap. The regmap will be automatically freed by the
886 * device management code.
887 */
3cfe7a74
NB
888#define devm_regmap_init_i2c(i2c, config) \
889 __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \
890 i2c, config)
1ed81114 891
bcf7eac3
AM
892/**
893 * devm_regmap_init_sccb() - Initialise managed register map
894 *
895 * @i2c: Device that will be interacted with
896 * @config: Configuration for register map
897 *
898 * The return value will be an ERR_PTR() on error or a valid pointer
899 * to a struct regmap. The regmap will be automatically freed by the
900 * device management code.
901 */
902#define devm_regmap_init_sccb(i2c, config) \
903 __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \
904 i2c, config)
905
1ed81114 906/**
2cf8e2df 907 * devm_regmap_init_spi() - Initialise register map
1ed81114 908 *
2cf8e2df 909 * @dev: Device that will be interacted with
1ed81114
NB
910 * @config: Configuration for register map
911 *
912 * The return value will be an ERR_PTR() on error or a valid pointer
913 * to a struct regmap. The map will be automatically freed by the
914 * device management code.
915 */
3cfe7a74
NB
916#define devm_regmap_init_spi(dev, config) \
917 __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \
918 dev, config)
1ed81114
NB
919
920/**
2cf8e2df
CK
921 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
922 *
923 * @dev: SPMI device that will be interacted with
1ed81114
NB
924 * @config: Configuration for register map
925 *
926 * The return value will be an ERR_PTR() on error or a valid pointer
927 * to a struct regmap. The regmap will be automatically freed by the
928 * device management code.
929 */
3cfe7a74
NB
930#define devm_regmap_init_spmi_base(dev, config) \
931 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \
932 dev, config)
1ed81114
NB
933
934/**
2cf8e2df
CK
935 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
936 *
937 * @dev: SPMI device that will be interacted with
1ed81114
NB
938 * @config: Configuration for register map
939 *
940 * The return value will be an ERR_PTR() on error or a valid pointer
941 * to a struct regmap. The regmap will be automatically freed by the
942 * device management code.
943 */
3cfe7a74
NB
944#define devm_regmap_init_spmi_ext(dev, config) \
945 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
946 dev, config)
3cfe7a74 947
cc5d0db3
AM
948/**
949 * devm_regmap_init_w1() - Initialise managed register map
950 *
951 * @w1_dev: Device that will be interacted with
952 * @config: Configuration for register map
953 *
954 * The return value will be an ERR_PTR() on error or a valid pointer
955 * to a struct regmap. The regmap will be automatically freed by the
956 * device management code.
957 */
958#define devm_regmap_init_w1(w1_dev, config) \
959 __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
960 w1_dev, config)
878ec67b 961/**
2cf8e2df 962 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
878ec67b
PZ
963 *
964 * @dev: Device that will be interacted with
1ed81114 965 * @clk_id: register clock consumer ID
878ec67b
PZ
966 * @regs: Pointer to memory-mapped IO region
967 * @config: Configuration for register map
968 *
1ed81114
NB
969 * The return value will be an ERR_PTR() on error or a valid pointer
970 * to a struct regmap. The regmap will be automatically freed by the
971 * device management code.
878ec67b 972 */
1ed81114
NB
973#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \
974 __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \
975 dev, clk_id, regs, config)
878ec67b
PZ
976
977/**
2cf8e2df 978 * devm_regmap_init_mmio() - Initialise managed register map
878ec67b
PZ
979 *
980 * @dev: Device that will be interacted with
981 * @regs: Pointer to memory-mapped IO region
982 * @config: Configuration for register map
983 *
984 * The return value will be an ERR_PTR() on error or a valid pointer
985 * to a struct regmap. The regmap will be automatically freed by the
986 * device management code.
987 */
3cfe7a74
NB
988#define devm_regmap_init_mmio(dev, regs, config) \
989 devm_regmap_init_mmio_clk(dev, NULL, regs, config)
c0eb4676 990
1ed81114 991/**
2cf8e2df 992 * devm_regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
993 *
994 * @ac97: Device that will be interacted with
995 * @config: Configuration for register map
996 *
997 * The return value will be an ERR_PTR() on error or a valid pointer
998 * to a struct regmap. The regmap will be automatically freed by the
999 * device management code.
1000 */
1001#define devm_regmap_init_ac97(ac97, config) \
1002 __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \
1003 ac97, config)
c0eb4676 1004
7c22ce6e
VK
1005/**
1006 * devm_regmap_init_sdw() - Initialise managed register map
1007 *
1008 * @sdw: Device that will be interacted with
1009 * @config: Configuration for register map
1010 *
1011 * The return value will be an ERR_PTR() on error or a valid pointer
1012 * to a struct regmap. The regmap will be automatically freed by the
1013 * device management code.
1014 */
1015#define devm_regmap_init_sdw(sdw, config) \
1016 __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \
1017 sdw, config)
1018
ed24d568
SK
1019/**
1020 * devm_regmap_init_slimbus() - Initialise managed register map
1021 *
1022 * @slimbus: Device that will be interacted with
1023 * @config: Configuration for register map
1024 *
1025 * The return value will be an ERR_PTR() on error or a valid pointer
1026 * to a struct regmap. The regmap will be automatically freed by the
1027 * device management code.
1028 */
1029#define devm_regmap_init_slimbus(slimbus, config) \
1030 __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \
1031 slimbus, config)
6445500b
VS
1032
1033/**
1034 * devm_regmap_init_i3c() - Initialise managed register map
1035 *
1036 * @i3c: Device that will be interacted with
1037 * @config: Configuration for register map
1038 *
1039 * The return value will be an ERR_PTR() on error or a valid pointer
1040 * to a struct regmap. The regmap will be automatically freed by the
1041 * device management code.
1042 */
1043#define devm_regmap_init_i3c(i3c, config) \
1044 __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \
1045 i3c, config)
1046
31895662
MR
1047int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
1048void regmap_mmio_detach_clk(struct regmap *map);
b83a313b 1049void regmap_exit(struct regmap *map);
bf315173
MB
1050int regmap_reinit_cache(struct regmap *map,
1051 const struct regmap_config *config);
72b39f6f 1052struct regmap *dev_get_regmap(struct device *dev, const char *name);
8d7d3972 1053struct device *regmap_get_device(struct regmap *map);
b83a313b 1054int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
915f441b 1055int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
b83a313b
MB
1056int regmap_raw_write(struct regmap *map, unsigned int reg,
1057 const void *val, size_t val_len);
cdf6b11d
BW
1058int regmap_noinc_write(struct regmap *map, unsigned int reg,
1059 const void *val, size_t val_len);
8eaeb219
LD
1060int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1061 size_t val_count);
8019ff6c 1062int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
e33fabd3 1063 int num_regs);
1d5b40bc 1064int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 1065 const struct reg_sequence *regs,
1d5b40bc 1066 int num_regs);
0d509f2b
MB
1067int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1068 const void *val, size_t val_len);
b83a313b
MB
1069int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
1070int regmap_raw_read(struct regmap *map, unsigned int reg,
1071 void *val, size_t val_len);
74fe7b55
LC
1072int regmap_noinc_read(struct regmap *map, unsigned int reg,
1073 void *val, size_t val_len);
b83a313b
MB
1074int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1075 size_t val_count);
91d31b9f
KM
1076int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1077 unsigned int mask, unsigned int val,
1078 bool *change, bool async, bool force);
a6539c32 1079int regmap_get_val_bytes(struct regmap *map);
668abc72 1080int regmap_get_max_register(struct regmap *map);
a2f776cb 1081int regmap_get_reg_stride(struct regmap *map);
0d509f2b 1082int regmap_async_complete(struct regmap *map);
221ad7f2 1083bool regmap_can_raw_write(struct regmap *map);
f50c9eb4
MSP
1084size_t regmap_get_raw_read_max(struct regmap *map);
1085size_t regmap_get_raw_write_max(struct regmap *map);
b83a313b 1086
39a58439 1087int regcache_sync(struct regmap *map);
4d4cfd16
MB
1088int regcache_sync_region(struct regmap *map, unsigned int min,
1089 unsigned int max);
697e85bc
MB
1090int regcache_drop_region(struct regmap *map, unsigned int min,
1091 unsigned int max);
92afb286 1092void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 1093void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 1094void regcache_mark_dirty(struct regmap *map);
92afb286 1095
154881e5
MB
1096bool regmap_check_range_table(struct regmap *map, unsigned int reg,
1097 const struct regmap_access_table *table);
1098
8019ff6c 1099int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a 1100 int num_regs);
13ff50c8
NC
1101int regmap_parse_val(struct regmap *map, const void *buf,
1102 unsigned int *val);
22f0d90a 1103
76aad392
DC
1104static inline bool regmap_reg_in_range(unsigned int reg,
1105 const struct regmap_range *range)
1106{
1107 return reg >= range->range_min && reg <= range->range_max;
1108}
1109
1110bool regmap_reg_in_ranges(unsigned int reg,
1111 const struct regmap_range *ranges,
1112 unsigned int nranges);
1113
67252287 1114/**
2cf8e2df 1115 * struct reg_field - Description of an register field
67252287
SK
1116 *
1117 * @reg: Offset of the register within the regmap bank
1118 * @lsb: lsb of the register field.
f27b37f5 1119 * @msb: msb of the register field.
a0102375
KM
1120 * @id_size: port size if it has some ports
1121 * @id_offset: address offset for each ports
67252287
SK
1122 */
1123struct reg_field {
1124 unsigned int reg;
1125 unsigned int lsb;
1126 unsigned int msb;
a0102375
KM
1127 unsigned int id_size;
1128 unsigned int id_offset;
67252287
SK
1129};
1130
1131#define REG_FIELD(_reg, _lsb, _msb) { \
1132 .reg = _reg, \
1133 .lsb = _lsb, \
1134 .msb = _msb, \
1135 }
1136
1137struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1138 struct reg_field reg_field);
1139void regmap_field_free(struct regmap_field *field);
1140
1141struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1142 struct regmap *regmap, struct reg_field reg_field);
1143void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
1144
1145int regmap_field_read(struct regmap_field *field, unsigned int *val);
28972eaa
KM
1146int regmap_field_update_bits_base(struct regmap_field *field,
1147 unsigned int mask, unsigned int val,
1148 bool *change, bool async, bool force);
a0102375
KM
1149int regmap_fields_read(struct regmap_field *field, unsigned int id,
1150 unsigned int *val);
e126edec
KM
1151int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1152 unsigned int mask, unsigned int val,
1153 bool *change, bool async, bool force);
1c2928e3
MV
1154/**
1155 * struct regmap_irq_type - IRQ type definitions.
1156 *
1157 * @type_reg_offset: Offset register for the irq type setting.
1158 * @type_rising_val: Register value to configure RISING type irq.
1159 * @type_falling_val: Register value to configure FALLING type irq.
1160 * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
1161 * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
1162 * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
1163 */
1164struct regmap_irq_type {
1165 unsigned int type_reg_offset;
1166 unsigned int type_reg_mask;
1167 unsigned int type_rising_val;
1168 unsigned int type_falling_val;
1169 unsigned int type_level_low_val;
1170 unsigned int type_level_high_val;
1171 unsigned int types_supported;
1172};
76aad392 1173
f8beab2b 1174/**
2cf8e2df 1175 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
f8beab2b
MB
1176 *
1177 * @reg_offset: Offset of the status/mask register within the bank
1178 * @mask: Mask used to flag/control the register.
1c2928e3 1179 * @type: IRQ trigger type setting details if supported.
f8beab2b
MB
1180 */
1181struct regmap_irq {
1182 unsigned int reg_offset;
1183 unsigned int mask;
1c2928e3 1184 struct regmap_irq_type type;
f8beab2b
MB
1185};
1186
b4fe8ba7
QZ
1187#define REGMAP_IRQ_REG(_irq, _off, _mask) \
1188 [_irq] = { .reg_offset = (_off), .mask = (_mask) }
1189
43fac323
TX
1190#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
1191 [_id] = { \
1192 .mask = BIT((_id) % (_reg_bits)), \
1193 .reg_offset = (_id) / (_reg_bits), \
1194 }
1195
a2d21848
MV
1196#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \
1197 { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
1198
1199struct regmap_irq_sub_irq_map {
1200 unsigned int num_regs;
1201 unsigned int *offset;
1202};
1203
f8beab2b 1204/**
2cf8e2df 1205 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
f8beab2b
MB
1206 *
1207 * @name: Descriptive name for IRQ controller.
1208 *
a2d21848
MV
1209 * @main_status: Base main status register address. For chips which have
1210 * interrupts arranged in separate sub-irq blocks with own IRQ
1211 * registers and which have a main IRQ registers indicating
1212 * sub-irq blocks with unhandled interrupts. For such chips fill
1213 * sub-irq register information in status_base, mask_base and
1214 * ack_base.
1215 * @num_main_status_bits: Should be given to chips where number of meaningfull
1216 * main status bits differs from num_regs.
1217 * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
1218 * registers. First item in array describes the registers
1219 * for first main status bit. Second array for second bit etc.
1220 * Offset is given as sub register status offset to
1221 * status_base. Should contain num_regs arrays.
1222 * Can be provided for chips with more complex mapping than
1223 * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1224 * @num_main_regs: Number of 'main status' irq registers for chips which have
1225 * main_status set.
1226 *
f8beab2b
MB
1227 * @status_base: Base status register address.
1228 * @mask_base: Base mask register address.
a71411db 1229 * @mask_writeonly: Base mask register is write only.
7b7d1968
GZ
1230 * @unmask_base: Base unmask register address. for chips who have
1231 * separate mask and unmask registers
d3233433
AS
1232 * @ack_base: Base ack address. If zero then the chip is clear on read.
1233 * Using zero value is possible with @use_ack bit.
a43fd50d 1234 * @wake_base: Base address for wake enables. If zero unsupported.
7a78479f 1235 * @type_base: Base address for irq type. If zero unsupported.
022f926a 1236 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
2753e6f8 1237 * @init_ack_masked: Ack all masked interrupts once during initalization.
68622bdf 1238 * @mask_invert: Inverted mask register: cleared bits are masked out.
d3233433 1239 * @use_ack: Use @ack register even if it is zero.
a650fdd9 1240 * @ack_invert: Inverted ack register: cleared bits for ack.
68622bdf 1241 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
7a78479f 1242 * @type_invert: Invert the type flags.
bc998a73
BG
1243 * @type_in_mask: Use the mask registers for controlling irq type. For
1244 * interrupts defining type_rising/falling_mask use mask_base
1245 * for edge configuration and never update bits in type_base.
c82ea33e
BG
1246 * @clear_on_unmask: For chips with interrupts cleared on read: read the status
1247 * registers before unmasking interrupts to clear any bits
1248 * set when they were masked.
0c00c50b 1249 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
f8beab2b
MB
1250 *
1251 * @num_regs: Number of registers in each control bank.
1252 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
1253 * assigned based on the index in the array of the interrupt.
1254 * @num_irqs: Number of descriptors.
7a78479f
LD
1255 * @num_type_reg: Number of type registers.
1256 * @type_reg_stride: Stride to use for chips where type registers are not
1257 * contiguous.
ccc12561
LD
1258 * @handle_pre_irq: Driver specific callback to handle interrupt from device
1259 * before regmap_irq_handler process the interrupts.
1260 * @handle_post_irq: Driver specific callback to handle interrupt from device
1261 * after handling the interrupts in regmap_irq_handler().
1262 * @irq_drv_data: Driver specific IRQ data which is passed as parameter when
1263 * driver specific pre/post interrupt handler is called.
2cf8e2df
CK
1264 *
1265 * This is not intended to handle every possible interrupt controller, but
1266 * it should handle a substantial proportion of those that are found in the
1267 * wild.
f8beab2b
MB
1268 */
1269struct regmap_irq_chip {
1270 const char *name;
1271
a2d21848
MV
1272 unsigned int main_status;
1273 unsigned int num_main_status_bits;
1274 struct regmap_irq_sub_irq_map *sub_reg_offsets;
1275 int num_main_regs;
1276
f8beab2b
MB
1277 unsigned int status_base;
1278 unsigned int mask_base;
7b7d1968 1279 unsigned int unmask_base;
f8beab2b 1280 unsigned int ack_base;
a43fd50d 1281 unsigned int wake_base;
7a78479f 1282 unsigned int type_base;
022f926a 1283 unsigned int irq_reg_stride;
a71411db 1284 bool mask_writeonly:1;
f484f7a6
PZ
1285 bool init_ack_masked:1;
1286 bool mask_invert:1;
d3233433 1287 bool use_ack:1;
a650fdd9 1288 bool ack_invert:1;
f484f7a6
PZ
1289 bool wake_invert:1;
1290 bool runtime_pm:1;
7a78479f 1291 bool type_invert:1;
bc998a73 1292 bool type_in_mask:1;
c82ea33e 1293 bool clear_on_unmask:1;
f8beab2b
MB
1294
1295 int num_regs;
1296
1297 const struct regmap_irq *irqs;
1298 int num_irqs;
7a78479f
LD
1299
1300 int num_type_reg;
1301 unsigned int type_reg_stride;
ccc12561
LD
1302
1303 int (*handle_pre_irq)(void *irq_drv_data);
1304 int (*handle_post_irq)(void *irq_drv_data);
1305 void *irq_drv_data;
f8beab2b
MB
1306};
1307
1308struct regmap_irq_chip_data;
1309
1310int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 1311 int irq_base, const struct regmap_irq_chip *chip,
f8beab2b
MB
1312 struct regmap_irq_chip_data **data);
1313void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
045b9848
LD
1314
1315int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
1316 int irq_flags, int irq_base,
1317 const struct regmap_irq_chip *chip,
1318 struct regmap_irq_chip_data **data);
1319void devm_regmap_del_irq_chip(struct device *dev, int irq,
1320 struct regmap_irq_chip_data *data);
1321
209a6006 1322int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 1323int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
90f790d2 1324struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
92afb286 1325
9cde5fcd
MB
1326#else
1327
1328/*
1329 * These stubs should only ever be called by generic code which has
1330 * regmap based facilities, if they ever get called at runtime
1331 * something is going wrong and something probably needs to select
1332 * REGMAP.
1333 */
1334
1335static inline int regmap_write(struct regmap *map, unsigned int reg,
1336 unsigned int val)
1337{
1338 WARN_ONCE(1, "regmap API is disabled");
1339 return -EINVAL;
1340}
1341
915f441b
MB
1342static inline int regmap_write_async(struct regmap *map, unsigned int reg,
1343 unsigned int val)
1344{
1345 WARN_ONCE(1, "regmap API is disabled");
1346 return -EINVAL;
1347}
1348
9cde5fcd
MB
1349static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
1350 const void *val, size_t val_len)
1351{
1352 WARN_ONCE(1, "regmap API is disabled");
1353 return -EINVAL;
1354}
1355
0d509f2b
MB
1356static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1357 const void *val, size_t val_len)
1358{
1359 WARN_ONCE(1, "regmap API is disabled");
1360 return -EINVAL;
1361}
1362
cdf6b11d
BW
1363static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
1364 const void *val, size_t val_len)
1365{
1366 WARN_ONCE(1, "regmap API is disabled");
1367 return -EINVAL;
1368}
1369
9cde5fcd
MB
1370static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
1371 const void *val, size_t val_count)
1372{
1373 WARN_ONCE(1, "regmap API is disabled");
1374 return -EINVAL;
1375}
1376
1377static inline int regmap_read(struct regmap *map, unsigned int reg,
1378 unsigned int *val)
1379{
1380 WARN_ONCE(1, "regmap API is disabled");
1381 return -EINVAL;
1382}
1383
1384static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
1385 void *val, size_t val_len)
1386{
1387 WARN_ONCE(1, "regmap API is disabled");
1388 return -EINVAL;
1389}
1390
74fe7b55
LC
1391static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
1392 void *val, size_t val_len)
1393{
1394 WARN_ONCE(1, "regmap API is disabled");
1395 return -EINVAL;
1396}
1397
9cde5fcd
MB
1398static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
1399 void *val, size_t val_count)
1400{
1401 WARN_ONCE(1, "regmap API is disabled");
1402 return -EINVAL;
1403}
1404
91d31b9f
KM
1405static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1406 unsigned int mask, unsigned int val,
1407 bool *change, bool async, bool force)
fd4b7286
KM
1408{
1409 WARN_ONCE(1, "regmap API is disabled");
1410 return -EINVAL;
1411}
1412
28972eaa
KM
1413static inline int regmap_field_update_bits_base(struct regmap_field *field,
1414 unsigned int mask, unsigned int val,
1415 bool *change, bool async, bool force)
915f441b
MB
1416{
1417 WARN_ONCE(1, "regmap API is disabled");
1418 return -EINVAL;
1419}
1420
e126edec
KM
1421static inline int regmap_fields_update_bits_base(struct regmap_field *field,
1422 unsigned int id,
1423 unsigned int mask, unsigned int val,
1424 bool *change, bool async, bool force)
915f441b
MB
1425{
1426 WARN_ONCE(1, "regmap API is disabled");
1427 return -EINVAL;
1428}
1429
9cde5fcd
MB
1430static inline int regmap_get_val_bytes(struct regmap *map)
1431{
1432 WARN_ONCE(1, "regmap API is disabled");
1433 return -EINVAL;
1434}
1435
668abc72
SK
1436static inline int regmap_get_max_register(struct regmap *map)
1437{
1438 WARN_ONCE(1, "regmap API is disabled");
1439 return -EINVAL;
1440}
1441
a2f776cb
SK
1442static inline int regmap_get_reg_stride(struct regmap *map)
1443{
1444 WARN_ONCE(1, "regmap API is disabled");
1445 return -EINVAL;
1446}
1447
9cde5fcd
MB
1448static inline int regcache_sync(struct regmap *map)
1449{
1450 WARN_ONCE(1, "regmap API is disabled");
1451 return -EINVAL;
1452}
1453
a313f9f5
MB
1454static inline int regcache_sync_region(struct regmap *map, unsigned int min,
1455 unsigned int max)
1456{
1457 WARN_ONCE(1, "regmap API is disabled");
1458 return -EINVAL;
1459}
1460
697e85bc
MB
1461static inline int regcache_drop_region(struct regmap *map, unsigned int min,
1462 unsigned int max)
1463{
1464 WARN_ONCE(1, "regmap API is disabled");
1465 return -EINVAL;
1466}
1467
9cde5fcd
MB
1468static inline void regcache_cache_only(struct regmap *map, bool enable)
1469{
1470 WARN_ONCE(1, "regmap API is disabled");
1471}
1472
1473static inline void regcache_cache_bypass(struct regmap *map, bool enable)
1474{
1475 WARN_ONCE(1, "regmap API is disabled");
1476}
1477
1478static inline void regcache_mark_dirty(struct regmap *map)
1479{
1480 WARN_ONCE(1, "regmap API is disabled");
1481}
1482
0d509f2b
MB
1483static inline void regmap_async_complete(struct regmap *map)
1484{
1485 WARN_ONCE(1, "regmap API is disabled");
1486}
1487
9cde5fcd 1488static inline int regmap_register_patch(struct regmap *map,
a6baa3de 1489 const struct reg_sequence *regs,
9cde5fcd
MB
1490 int num_regs)
1491{
1492 WARN_ONCE(1, "regmap API is disabled");
1493 return -EINVAL;
1494}
1495
13ff50c8
NC
1496static inline int regmap_parse_val(struct regmap *map, const void *buf,
1497 unsigned int *val)
1498{
1499 WARN_ONCE(1, "regmap API is disabled");
1500 return -EINVAL;
1501}
1502
72b39f6f
MB
1503static inline struct regmap *dev_get_regmap(struct device *dev,
1504 const char *name)
1505{
72b39f6f
MB
1506 return NULL;
1507}
1508
8d7d3972
TT
1509static inline struct device *regmap_get_device(struct regmap *map)
1510{
1511 WARN_ONCE(1, "regmap API is disabled");
1d33dc6b 1512 return NULL;
8d7d3972
TT
1513}
1514
9cde5fcd
MB
1515#endif
1516
b83a313b 1517#endif