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1#ifndef __LINUX_REGMAP_H
2#define __LINUX_REGMAP_H
3
4/*
5 * Register map access API
6 *
7 * Copyright 2011 Wolfson Microelectronics plc
8 *
9 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/device.h>
17#include <linux/list.h>
b83a313b 18
de477254 19struct module;
9943fa30 20struct i2c_client;
a676f083 21struct spi_device;
9943fa30 22
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23/* An enum of all the supported cache types */
24enum regcache_type {
25 REGCACHE_NONE,
28644c80 26 REGCACHE_RBTREE,
50b776fc 27 REGCACHE_COMPRESSED
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28};
29
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30/**
31 * Default value for a register. We use an array of structs rather
32 * than a simple array as many modern devices have very sparse
33 * register maps.
34 *
35 * @reg: Register address.
36 * @def: Register default value.
37 */
38struct reg_default {
39 unsigned int reg;
40 unsigned int def;
41};
42
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43/**
44 * Configuration for the register map of a device.
45 *
46 * @reg_bits: Number of bits in a register address, mandatory.
47 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 48 *
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49 * @writeable_reg: Optional callback returning true if the register
50 * can be written to.
51 * @readable_reg: Optional callback returning true if the register
52 * can be read from.
53 * @volatile_reg: Optional callback returning true if the register
54 * value can't be cached.
55 * @precious_reg: Optional callback returning true if the rgister
56 * should not be read outside of a call from the driver
57 * (eg, a clear on read interrupt status register).
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58 *
59 * @max_register: Optional, specifies the maximum valid register index.
60 * @reg_defaults: Power on reset values for registers (for use with
61 * register cache support).
62 * @num_reg_defaults: Number of elements in reg_defaults.
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63 *
64 * @read_flag_mask: Mask to be set in the top byte of the register when doing
65 * a read.
66 * @write_flag_mask: Mask to be set in the top byte of the register when doing
67 * a write. If both read_flag_mask and write_flag_mask are
68 * empty the regmap_bus default masks are used.
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69 *
70 * @cache_type: The actual cache type.
71 * @reg_defaults_raw: Power on reset values for registers (for use with
72 * register cache support).
73 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
dd898b20 74 */
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75struct regmap_config {
76 int reg_bits;
77 int val_bits;
2e2ae66d 78
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79 bool (*writeable_reg)(struct device *dev, unsigned int reg);
80 bool (*readable_reg)(struct device *dev, unsigned int reg);
81 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 82 bool (*precious_reg)(struct device *dev, unsigned int reg);
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83
84 unsigned int max_register;
720e4616 85 const struct reg_default *reg_defaults;
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86 unsigned int num_reg_defaults;
87 enum regcache_type cache_type;
88 const void *reg_defaults_raw;
89 unsigned int num_reg_defaults_raw;
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90
91 u8 read_flag_mask;
92 u8 write_flag_mask;
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93};
94
95typedef int (*regmap_hw_write)(struct device *dev, const void *data,
96 size_t count);
97typedef int (*regmap_hw_gather_write)(struct device *dev,
98 const void *reg, size_t reg_len,
99 const void *val, size_t val_len);
100typedef int (*regmap_hw_read)(struct device *dev,
101 const void *reg_buf, size_t reg_size,
102 void *val_buf, size_t val_size);
103
104/**
105 * Description of a hardware bus for the register map infrastructure.
106 *
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107 * @write: Write operation.
108 * @gather_write: Write operation with split register/value, return -ENOTSUPP
109 * if not implemented on a given device.
110 * @read: Read operation. Data is returned in the buffer used to transmit
111 * data.
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112 * @read_flag_mask: Mask to be set in the top byte of the register when doing
113 * a read.
114 */
115struct regmap_bus {
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116 regmap_hw_write write;
117 regmap_hw_gather_write gather_write;
118 regmap_hw_read read;
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119 u8 read_flag_mask;
120};
121
122struct regmap *regmap_init(struct device *dev,
123 const struct regmap_bus *bus,
124 const struct regmap_config *config);
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125struct regmap *regmap_init_i2c(struct i2c_client *i2c,
126 const struct regmap_config *config);
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127struct regmap *regmap_init_spi(struct spi_device *dev,
128 const struct regmap_config *config);
129
b83a313b 130void regmap_exit(struct regmap *map);
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131int regmap_reinit_cache(struct regmap *map,
132 const struct regmap_config *config);
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133int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
134int regmap_raw_write(struct regmap *map, unsigned int reg,
135 const void *val, size_t val_len);
136int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
137int regmap_raw_read(struct regmap *map, unsigned int reg,
138 void *val, size_t val_len);
139int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
140 size_t val_count);
141int regmap_update_bits(struct regmap *map, unsigned int reg,
142 unsigned int mask, unsigned int val);
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143int regmap_update_bits_check(struct regmap *map, unsigned int reg,
144 unsigned int mask, unsigned int val,
145 bool *change);
b83a313b 146
39a58439 147int regcache_sync(struct regmap *map);
92afb286 148void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 149void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 150void regcache_mark_dirty(struct regmap *map);
92afb286 151
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152/**
153 * Description of an IRQ for the generic regmap irq_chip.
154 *
155 * @reg_offset: Offset of the status/mask register within the bank
156 * @mask: Mask used to flag/control the register.
157 */
158struct regmap_irq {
159 unsigned int reg_offset;
160 unsigned int mask;
161};
162
163/**
164 * Description of a generic regmap irq_chip. This is not intended to
165 * handle every possible interrupt controller, but it should handle a
166 * substantial proportion of those that are found in the wild.
167 *
168 * @name: Descriptive name for IRQ controller.
169 *
170 * @status_base: Base status register address.
171 * @mask_base: Base mask register address.
172 * @ack_base: Base ack address. If zero then the chip is clear on read.
173 *
174 * @num_regs: Number of registers in each control bank.
175 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
176 * assigned based on the index in the array of the interrupt.
177 * @num_irqs: Number of descriptors.
178 */
179struct regmap_irq_chip {
180 const char *name;
181
182 unsigned int status_base;
183 unsigned int mask_base;
184 unsigned int ack_base;
185
186 int num_regs;
187
188 const struct regmap_irq *irqs;
189 int num_irqs;
190};
191
192struct regmap_irq_chip_data;
193
194int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
195 int irq_base, struct regmap_irq_chip *chip,
196 struct regmap_irq_chip_data **data);
197void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
209a6006 198int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
92afb286 199
b83a313b 200#endif