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d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
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2#ifndef __LINUX_REGMAP_H
3#define __LINUX_REGMAP_H
4
5/*
6 * Register map access API
7 *
8 * Copyright 2011 Wolfson Microelectronics plc
9 *
10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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11 */
12
b83a313b 13#include <linux/list.h>
6863ca62 14#include <linux/rbtree.h>
f15cd6d9 15#include <linux/ktime.h>
adf08d48 16#include <linux/delay.h>
49ccc142 17#include <linux/err.h>
3f0fa9a8 18#include <linux/bug.h>
3cfe7a74 19#include <linux/lockdep.h>
e44ab4e1 20#include <linux/iopoll.h>
5cc2013b 21#include <linux/fwnode.h>
b83a313b 22
de477254 23struct module;
31895662 24struct clk;
313162d0 25struct device;
12479382 26struct device_node;
bf0d29fb 27struct fsi_device;
9943fa30 28struct i2c_client;
6445500b 29struct i3c_device;
90f790d2 30struct irq_domain;
1f89d2fe 31struct mdio_device;
7d6f7fb0 32struct slim_device;
a676f083 33struct spi_device;
a01779f8 34struct spmi_device;
b83d2ff0 35struct regmap;
6863ca62 36struct regmap_range_cfg;
67252287 37struct regmap_field;
22853223 38struct snd_ac97;
7c22ce6e 39struct sdw_slave;
9943fa30 40
7b3c4c37
AL
41/*
42 * regmap_mdio address encoding. IEEE 802.3ae clause 45 addresses consist of a
43 * device address and a register address.
44 */
45#define REGMAP_MDIO_C45_DEVAD_SHIFT 16
46#define REGMAP_MDIO_C45_DEVAD_MASK GENMASK(20, 16)
47#define REGMAP_MDIO_C45_REGNUM_MASK GENMASK(15, 0)
48
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49/*
50 * regmap.reg_shift indicates by how much we must shift registers prior to
51 * performing any operation. It's a signed value, positive numbers means
52 * downshifting the register's address, while negative numbers means upshifting.
53 */
54#define REGMAP_UPSHIFT(s) (-(s))
55#define REGMAP_DOWNSHIFT(s) (s)
56
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57/*
58 * The supported cache types, the default is no cache. Any new caches
59 * should usually use the maple tree cache unless they specifically
60 * require that there are never any allocations at runtime and can't
61 * provide defaults in which case they should use the flat cache. The
62 * rbtree cache *may* have some performance advantage for very low end
63 * systems that make heavy use of cache syncs but is mainly legacy.
64 */
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65enum regcache_type {
66 REGCACHE_NONE,
28644c80 67 REGCACHE_RBTREE,
2ac902ce 68 REGCACHE_FLAT,
f033c26d 69 REGCACHE_MAPLE,
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DP
70};
71
bd20eb54 72/**
2cf8e2df 73 * struct reg_default - Default value for a register.
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74 *
75 * @reg: Register address.
76 * @def: Register default value.
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77 *
78 * We use an array of structs rather than a simple array as many modern devices
79 * have very sparse register maps.
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80 */
81struct reg_default {
82 unsigned int reg;
83 unsigned int def;
84};
85
8019ff6c 86/**
2cf8e2df 87 * struct reg_sequence - An individual write from a sequence of writes.
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88 *
89 * @reg: Register address.
90 * @def: Register value.
2de9d600 91 * @delay_us: Delay to be applied after the register write in microseconds
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92 *
93 * Register/value pairs for sequences of writes with an optional delay in
94 * microseconds to be applied after each write.
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95 */
96struct reg_sequence {
97 unsigned int reg;
98 unsigned int def;
2de9d600 99 unsigned int delay_us;
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100};
101
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102#define REG_SEQ(_reg, _def, _delay_us) { \
103 .reg = _reg, \
104 .def = _def, \
105 .delay_us = _delay_us, \
106 }
107#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0)
108
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109/**
110 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
2cf8e2df 111 *
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112 * @map: Regmap to read from
113 * @addr: Address to poll
114 * @val: Unsigned integer variable to read the value into
115 * @cond: Break condition (usually involving @val)
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116 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please
117 * read usleep_range() function description for details and
118 * limitations.
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119 * @timeout_us: Timeout in us, 0 means never timeout
120 *
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121 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
122 *
123 * Returns: 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
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124 * error return value in case of a error read. In the two former cases,
125 * the last read value at @addr is stored in @val. Must not be called
126 * from atomic context if sleep_us or timeout_us are used.
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127 */
128#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
129({ \
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130 int __ret, __tmp; \
131 __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
132 sleep_us, timeout_us, false, (map), (addr), &(val)); \
133 __ret ?: __tmp; \
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134})
135
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136/**
137 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
138 *
139 * @map: Regmap to read from
140 * @addr: Address to poll
141 * @val: Unsigned integer variable to read the value into
142 * @cond: Break condition (usually involving @val)
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143 * @delay_us: Time to udelay between reads in us (0 tight-loops). Please
144 * read udelay() function description for details and
145 * limitations.
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146 * @timeout_us: Timeout in us, 0 means never timeout
147 *
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148 * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
149 *
150 * Note: In general regmap cannot be used in atomic context. If you want to use
151 * this macro then first setup your regmap for atomic use (flat or no cache
152 * and MMIO regmap).
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153 *
154 * Returns: 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
155 * error return value in case of a error read. In the two former cases,
156 * the last read value at @addr is stored in @val.
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157 */
158#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
159({ \
160 u64 __timeout_us = (timeout_us); \
161 unsigned long __delay_us = (delay_us); \
162 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
163 int __ret; \
164 for (;;) { \
165 __ret = regmap_read((map), (addr), &(val)); \
166 if (__ret) \
167 break; \
168 if (cond) \
169 break; \
170 if ((__timeout_us) && \
171 ktime_compare(ktime_get(), __timeout) > 0) { \
172 __ret = regmap_read((map), (addr), &(val)); \
173 break; \
174 } \
175 if (__delay_us) \
176 udelay(__delay_us); \
177 } \
178 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
179})
180
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181/**
182 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
183 *
184 * @field: Regmap field to read from
185 * @val: Unsigned integer variable to read the value into
186 * @cond: Break condition (usually involving @val)
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187 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please
188 * read usleep_range() function description for details and
189 * limitations.
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190 * @timeout_us: Timeout in us, 0 means never timeout
191 *
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192 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
193 *
194 * Returns: 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
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195 * error return value in case of a error read. In the two former cases,
196 * the last read value at @addr is stored in @val. Must not be called
197 * from atomic context if sleep_us or timeout_us are used.
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198 */
199#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
200({ \
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201 int __ret, __tmp; \
202 __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
203 sleep_us, timeout_us, false, (field), &(val)); \
204 __ret ?: __tmp; \
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205})
206
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207#ifdef CONFIG_REGMAP
208
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209enum regmap_endian {
210 /* Unspecified -> 0 -> Backwards compatible default */
211 REGMAP_ENDIAN_DEFAULT = 0,
212 REGMAP_ENDIAN_BIG,
213 REGMAP_ENDIAN_LITTLE,
214 REGMAP_ENDIAN_NATIVE,
215};
216
76aad392 217/**
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218 * struct regmap_range - A register range, used for access related checks
219 * (readable/writeable/volatile/precious checks)
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220 *
221 * @range_min: address of first register
222 * @range_max: address of last register
223 */
224struct regmap_range {
225 unsigned int range_min;
226 unsigned int range_max;
227};
228
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229#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
230
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231/**
232 * struct regmap_access_table - A table of register ranges for access checks
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233 *
234 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
235 * @n_yes_ranges: size of the above array
236 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
237 * @n_no_ranges: size of the above array
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238 *
239 * A table of ranges including some yes ranges and some no ranges.
240 * If a register belongs to a no_range, the corresponding check function
241 * will return false. If a register belongs to a yes range, the corresponding
242 * check function will return true. "no_ranges" are searched first.
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243 */
244struct regmap_access_table {
245 const struct regmap_range *yes_ranges;
246 unsigned int n_yes_ranges;
247 const struct regmap_range *no_ranges;
248 unsigned int n_no_ranges;
249};
250
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251typedef void (*regmap_lock)(void *);
252typedef void (*regmap_unlock)(void *);
253
dd898b20 254/**
2cf8e2df 255 * struct regmap_config - Configuration for the register map of a device.
dd898b20 256 *
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257 * @name: Optional name of the regmap. Useful when a device has multiple
258 * register regions.
259 *
dd898b20 260 * @reg_bits: Number of bits in a register address, mandatory.
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261 * @reg_stride: The register address stride. Valid register addresses are a
262 * multiple of this value. If set to 0, a value of 1 will be
263 * used.
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264 * @reg_shift: The number of bits to shift the register before performing any
265 * operations. Any positive number will be downshifted, and negative
266 * values will be upshifted
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267 * @reg_base: Value to be added to every register address before performing any
268 * operation.
82159ba8 269 * @pad_bits: Number of bits of padding between register and value.
dd898b20 270 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 271 *
3566cc9d 272 * @writeable_reg: Optional callback returning true if the register
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273 * can be written to. If this field is NULL but wr_table
274 * (see below) is not, the check is performed on such table
275 * (a register is writeable if it belongs to one of the ranges
276 * specified by wr_table).
3566cc9d 277 * @readable_reg: Optional callback returning true if the register
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278 * can be read from. If this field is NULL but rd_table
279 * (see below) is not, the check is performed on such table
280 * (a register is readable if it belongs to one of the ranges
281 * specified by rd_table).
3566cc9d 282 * @volatile_reg: Optional callback returning true if the register
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283 * value can't be cached. If this field is NULL but
284 * volatile_table (see below) is not, the check is performed on
285 * such table (a register is volatile if it belongs to one of
286 * the ranges specified by volatile_table).
bdc39644 287 * @precious_reg: Optional callback returning true if the register
76aad392 288 * should not be read outside of a call from the driver
bdc39644 289 * (e.g., a clear on read interrupt status register). If this
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290 * field is NULL but precious_table (see below) is not, the
291 * check is performed on such table (a register is precious if
292 * it belongs to one of the ranges specified by precious_table).
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293 * @writeable_noinc_reg: Optional callback returning true if the register
294 * supports multiple write operations without incrementing
295 * the register number. If this field is NULL but
296 * wr_noinc_table (see below) is not, the check is
297 * performed on such table (a register is no increment
298 * writeable if it belongs to one of the ranges specified
299 * by wr_noinc_table).
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300 * @readable_noinc_reg: Optional callback returning true if the register
301 * supports multiple read operations without incrementing
302 * the register number. If this field is NULL but
303 * rd_noinc_table (see below) is not, the check is
304 * performed on such table (a register is no increment
305 * readable if it belongs to one of the ranges specified
306 * by rd_noinc_table).
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307 * @reg_read: Optional callback that if filled will be used to perform
308 * all the reads from the registers. Should only be provided for
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309 * devices whose read operation cannot be represented as a simple
310 * read operation on a bus such as SPI, I2C, etc. Most of the
311 * devices do not need this.
d2a5884a 312 * @reg_write: Same as above for writing.
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313 * @reg_update_bits: Optional callback that if filled will be used to perform
314 * all the update_bits(rmw) operation. Should only be provided
315 * if the function require special handling with lock and reg
316 * handling and the operation cannot be represented as a simple
317 * update_bits operation on a bus such as SPI, I2C, etc.
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318 * @read: Optional callback that if filled will be used to perform all the
319 * bulk reads from the registers. Data is returned in the buffer used
320 * to transmit data.
321 * @write: Same as above for writing.
322 * @max_raw_read: Max raw read size that can be used on the device.
323 * @max_raw_write: Max raw write size that can be used on the device.
9b1fe051 324 * @can_sleep: Optional, specifies whether regmap operations can sleep.
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325 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
326 * to perform locking. This field is ignored if custom lock/unlock
327 * functions are used (see fields lock/unlock of struct regmap_config).
328 * This field is a duplicate of a similar file in
329 * 'struct regmap_bus' and serves exact same purpose.
330 * Use it only for "no-bus" cases.
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331 * @io_port: Support IO port accessors. Makes sense only when MMIO vs. IO port
332 * access can be distinguished.
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333 * @disable_locking: This regmap is either protected by external means or
334 * is guaranteed not to be accessed from multiple threads.
335 * Don't use any locking mechanisms.
336 * @lock: Optional lock callback (overrides regmap's default lock
337 * function, based on spinlock or mutex).
338 * @unlock: As above for unlocking.
339 * @lock_arg: This field is passed as the only argument of lock/unlock
340 * functions (ignored in case regular lock/unlock functions
341 * are not overridden).
b429fab4 342 * @max_register: Optional, specifies the maximum valid register address.
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343 * @max_register_is_0: Optional, specifies that zero value in @max_register
344 * should be taken into account. This is a workaround to
345 * apply handling of @max_register for regmap that contains
346 * only one register.
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347 * @wr_table: Optional, points to a struct regmap_access_table specifying
348 * valid ranges for write access.
349 * @rd_table: As above, for read access.
350 * @volatile_table: As above, for volatile registers.
351 * @precious_table: As above, for precious registers.
cdf6b11d 352 * @wr_noinc_table: As above, for no increment writeable registers.
74fe7b55 353 * @rd_noinc_table: As above, for no increment readable registers.
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354 * @reg_defaults: Power on reset values for registers (for use with
355 * register cache support).
356 * @num_reg_defaults: Number of elements in reg_defaults.
6f306441 357 *
f50e38c9 358 * @read_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 359 * a read.
f50e38c9 360 * @write_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 361 * a write. If both read_flag_mask and write_flag_mask are
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362 * empty and zero_flag_mask is not set the regmap_bus default
363 * masks are used.
364 * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
365 * if they are both empty.
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366 * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers.
367 * This can avoid load on devices which don't require strict
368 * orderings, but drivers should carefully add any explicit
369 * memory barriers when they may require them.
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370 * @use_single_read: If set, converts the bulk read operation into a series of
371 * single read operations. This is useful for a device that
372 * does not support bulk read.
373 * @use_single_write: If set, converts the bulk write operation into a series of
374 * single write operations. This is useful for a device that
375 * does not support bulk write.
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376 * @can_multi_write: If set, the device supports the multi write mode of bulk
377 * write operations, if clear multi write requests will be
378 * split into individual write operations
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379 *
380 * @cache_type: The actual cache type.
381 * @reg_defaults_raw: Power on reset values for registers (for use with
382 * register cache support).
383 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
a4887813 384 * @use_hwlock: Indicate if a hardware spinlock should be used.
67021f25 385 * @use_raw_spinlock: Indicate if a raw spinlock should be used.
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386 * @hwlock_id: Specify the hardware spinlock id.
387 * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
388 * HWLOCK_IRQ or 0.
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389 * @reg_format_endian: Endianness for formatted register addresses. If this is
390 * DEFAULT, the @reg_format_endian_default value from the
391 * regmap bus is used.
392 * @val_format_endian: Endianness for formatted register values. If this is
393 * DEFAULT, the @reg_format_endian_default value from the
394 * regmap bus is used.
395 *
396 * @ranges: Array of configuration entries for virtual address ranges.
397 * @num_ranges: Number of range configuration entries.
dd898b20 398 */
b83a313b 399struct regmap_config {
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400 const char *name;
401
b83a313b 402 int reg_bits;
f01ee60f 403 int reg_stride;
4a670ac3 404 int reg_shift;
0074f3f2 405 unsigned int reg_base;
82159ba8 406 int pad_bits;
b83a313b 407 int val_bits;
2e2ae66d 408
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409 bool (*writeable_reg)(struct device *dev, unsigned int reg);
410 bool (*readable_reg)(struct device *dev, unsigned int reg);
411 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 412 bool (*precious_reg)(struct device *dev, unsigned int reg);
cdf6b11d 413 bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
74fe7b55 414 bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
c9b41fcf 415
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416 int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
417 int (*reg_write)(void *context, unsigned int reg, unsigned int val);
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418 int (*reg_update_bits)(void *context, unsigned int reg,
419 unsigned int mask, unsigned int val);
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420 /* Bulk read/write */
421 int (*read)(void *context, const void *reg_buf, size_t reg_size,
422 void *val_buf, size_t val_size);
423 int (*write)(void *context, const void *data, size_t count);
424 size_t max_raw_read;
425 size_t max_raw_write;
d2a5884a 426
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427 bool can_sleep;
428
d2a5884a 429 bool fast_io;
93ce5576 430 bool io_port;
d2a5884a 431
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432 bool disable_locking;
433 regmap_lock lock;
434 regmap_unlock unlock;
435 void *lock_arg;
436
bd20eb54 437 unsigned int max_register;
0ec74ad3 438 bool max_register_is_0;
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DC
439 const struct regmap_access_table *wr_table;
440 const struct regmap_access_table *rd_table;
441 const struct regmap_access_table *volatile_table;
442 const struct regmap_access_table *precious_table;
cdf6b11d 443 const struct regmap_access_table *wr_noinc_table;
74fe7b55 444 const struct regmap_access_table *rd_noinc_table;
720e4616 445 const struct reg_default *reg_defaults;
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DP
446 unsigned int num_reg_defaults;
447 enum regcache_type cache_type;
448 const void *reg_defaults_raw;
449 unsigned int num_reg_defaults_raw;
6f306441 450
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451 unsigned long read_flag_mask;
452 unsigned long write_flag_mask;
9bf485c9 453 bool zero_flag_mask;
2e33caf1 454
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455 bool use_single_read;
456 bool use_single_write;
6e1e90ec 457 bool use_relaxed_mmio;
e894c3f4 458 bool can_multi_write;
141eba2e 459
a4887813 460 bool use_hwlock;
67021f25 461 bool use_raw_spinlock;
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462 unsigned int hwlock_id;
463 unsigned int hwlock_mode;
21f8e482 464
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465 enum regmap_endian reg_format_endian;
466 enum regmap_endian val_format_endian;
467
468 const struct regmap_range_cfg *ranges;
469 unsigned int num_ranges;
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470};
471
472/**
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CK
473 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
474 * registers.
6863ca62 475 *
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476 * @name: Descriptive name for diagnostics
477 *
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478 * @range_min: Address of the lowest register address in virtual range.
479 * @range_max: Address of the highest register in virtual range.
480 *
2cf8e2df 481 * @selector_reg: Register with selector field.
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PL
482 * @selector_mask: Bit mask for selector value.
483 * @selector_shift: Bit shift for selector value.
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484 *
485 * @window_start: Address of first (lowest) register in data window.
486 * @window_len: Number of registers in data window.
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CK
487 *
488 * Registers, mapped to this virtual range, are accessed in two steps:
489 * 1. page selector register update;
490 * 2. access through data window registers.
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491 */
492struct regmap_range_cfg {
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493 const char *name;
494
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495 /* Registers of virtual address range */
496 unsigned int range_min;
497 unsigned int range_max;
498
499 /* Page selector for indirect addressing */
500 unsigned int selector_reg;
501 unsigned int selector_mask;
502 int selector_shift;
503
504 /* Data window (per each page) */
505 unsigned int window_start;
506 unsigned int window_len;
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507};
508
fdd9ef3d
CK
509/**
510 * struct regmap_sdw_mbq_cfg - Configuration for Multi-Byte Quantities
511 *
512 * @mbq_size: Callback returning the actual size of the given register.
5bc493bf
CK
513 * @deferrable: Callback returning true if the hardware can defer
514 * transactions to the given register. Deferral should
515 * only be used by SDCA parts and typically which controls
516 * are deferrable will be specified in either as a hard
517 * coded list or from the DisCo tables in the platform
518 * firmware.
519 *
520 * @timeout_us: The time in microseconds after which waiting for a deferred
521 * transaction should time out.
522 * @retry_us: The time in microseconds between polls of the function busy
523 * status whilst waiting for an opportunity to retry a deferred
524 * transaction.
fdd9ef3d
CK
525 *
526 * Provides additional configuration required for SoundWire MBQ register maps.
527 */
528struct regmap_sdw_mbq_cfg {
529 int (*mbq_size)(struct device *dev, unsigned int reg);
5bc493bf
CK
530 bool (*deferrable)(struct device *dev, unsigned int reg);
531 unsigned long timeout_us;
532 unsigned long retry_us;
fdd9ef3d
CK
533};
534
0d509f2b
MB
535struct regmap_async;
536
0135bbcc 537typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 538 size_t count);
0135bbcc 539typedef int (*regmap_hw_gather_write)(void *context,
b83a313b
MB
540 const void *reg, size_t reg_len,
541 const void *val, size_t val_len);
0d509f2b
MB
542typedef int (*regmap_hw_async_write)(void *context,
543 const void *reg, size_t reg_len,
544 const void *val, size_t val_len,
545 struct regmap_async *async);
0135bbcc 546typedef int (*regmap_hw_read)(void *context,
b83a313b
MB
547 const void *reg_buf, size_t reg_size,
548 void *val_buf, size_t val_size);
3ac17037
BB
549typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
550 unsigned int *val);
c20cc099
LW
551typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg,
552 void *val, size_t val_count);
3ac17037
BB
553typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
554 unsigned int val);
c20cc099
LW
555typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg,
556 const void *val, size_t val_count);
77792b11
JR
557typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
558 unsigned int mask, unsigned int val);
0d509f2b 559typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
0135bbcc 560typedef void (*regmap_hw_free_context)(void *context);
b83a313b
MB
561
562/**
2cf8e2df
CK
563 * struct regmap_bus - Description of a hardware bus for the register map
564 * infrastructure.
b83a313b 565 *
bacdbe07 566 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
0d4529c5
DC
567 * to perform locking. This field is ignored if custom lock/unlock
568 * functions are used (see fields lock/unlock of
569 * struct regmap_config).
74641458 570 * @free_on_exit: kfree this on exit of regmap
b83a313b
MB
571 * @write: Write operation.
572 * @gather_write: Write operation with split register/value, return -ENOTSUPP
573 * if not implemented on a given device.
0d509f2b
MB
574 * @async_write: Write operation which completes asynchronously, optional and
575 * must serialise with respect to non-async I/O.
c5f58f2d
MSP
576 * @reg_write: Write a single register value to the given register address. This
577 * write operation has to complete when returning from the function.
c20cc099
LW
578 * @reg_write_noinc: Write multiple register value to the same register. This
579 * write operation has to complete when returning from the function.
2cf8e2df
CK
580 * @reg_update_bits: Update bits operation to be used against volatile
581 * registers, intended for devices supporting some mechanism
582 * for setting clearing bits without having to
583 * read/modify/write.
b83a313b
MB
584 * @read: Read operation. Data is returned in the buffer used to transmit
585 * data.
c5f58f2d
MSP
586 * @reg_read: Read a single register value from a given register address.
587 * @free_context: Free context.
0d509f2b 588 * @async_alloc: Allocate a regmap_async() structure.
b83a313b
MB
589 * @read_flag_mask: Mask to be set in the top byte of the register when doing
590 * a read.
141eba2e
SW
591 * @reg_format_endian_default: Default endianness for formatted register
592 * addresses. Used when the regmap_config specifies DEFAULT. If this is
593 * DEFAULT, BIG is assumed.
594 * @val_format_endian_default: Default endianness for formatted register
595 * values. Used when the regmap_config specifies DEFAULT. If this is
596 * DEFAULT, BIG is assumed.
adaac459
MSP
597 * @max_raw_read: Max raw read size that can be used on the bus.
598 * @max_raw_write: Max raw write size that can be used on the bus.
b83a313b
MB
599 */
600struct regmap_bus {
bacdbe07 601 bool fast_io;
74641458 602 bool free_on_exit;
b83a313b
MB
603 regmap_hw_write write;
604 regmap_hw_gather_write gather_write;
0d509f2b 605 regmap_hw_async_write async_write;
3ac17037 606 regmap_hw_reg_write reg_write;
c20cc099 607 regmap_hw_reg_noinc_write reg_noinc_write;
77792b11 608 regmap_hw_reg_update_bits reg_update_bits;
b83a313b 609 regmap_hw_read read;
3ac17037 610 regmap_hw_reg_read reg_read;
c20cc099 611 regmap_hw_reg_noinc_read reg_noinc_read;
0135bbcc 612 regmap_hw_free_context free_context;
0d509f2b 613 regmap_hw_async_alloc async_alloc;
b83a313b 614 u8 read_flag_mask;
141eba2e
SW
615 enum regmap_endian reg_format_endian_default;
616 enum regmap_endian val_format_endian_default;
adaac459
MSP
617 size_t max_raw_read;
618 size_t max_raw_write;
b83a313b
MB
619};
620
3cfe7a74
NB
621/*
622 * __regmap_init functions.
623 *
624 * These functions take a lock key and name parameter, and should not be called
625 * directly. Instead, use the regmap_init macros that generate a key and name
626 * for each call.
627 */
628struct regmap *__regmap_init(struct device *dev,
629 const struct regmap_bus *bus,
630 void *bus_context,
631 const struct regmap_config *config,
632 struct lock_class_key *lock_key,
633 const char *lock_name);
634struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
635 const struct regmap_config *config,
636 struct lock_class_key *lock_key,
637 const char *lock_name);
1f89d2fe
SV
638struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
639 const struct regmap_config *config,
640 struct lock_class_key *lock_key,
641 const char *lock_name);
bcf7eac3
AM
642struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
643 const struct regmap_config *config,
644 struct lock_class_key *lock_key,
645 const char *lock_name);
7d6f7fb0
SK
646struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
647 const struct regmap_config *config,
648 struct lock_class_key *lock_key,
649 const char *lock_name);
3cfe7a74
NB
650struct regmap *__regmap_init_spi(struct spi_device *dev,
651 const struct regmap_config *config,
652 struct lock_class_key *lock_key,
653 const char *lock_name);
654struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
655 const struct regmap_config *config,
656 struct lock_class_key *lock_key,
657 const char *lock_name);
658struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
659 const struct regmap_config *config,
660 struct lock_class_key *lock_key,
661 const char *lock_name);
cc5d0db3
AM
662struct regmap *__regmap_init_w1(struct device *w1_dev,
663 const struct regmap_config *config,
664 struct lock_class_key *lock_key,
665 const char *lock_name);
3cfe7a74
NB
666struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
667 void __iomem *regs,
668 const struct regmap_config *config,
669 struct lock_class_key *lock_key,
670 const char *lock_name);
671struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
672 const struct regmap_config *config,
673 struct lock_class_key *lock_key,
674 const char *lock_name);
7c22ce6e
VK
675struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
676 const struct regmap_config *config,
677 struct lock_class_key *lock_key,
678 const char *lock_name);
fb5103f9
PLB
679struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
680 const struct regmap_config *config,
fdd9ef3d 681 const struct regmap_sdw_mbq_cfg *mbq_config,
fb5103f9
PLB
682 struct lock_class_key *lock_key,
683 const char *lock_name);
7f9fb673
XY
684struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
685 const struct regmap_config *config,
686 struct lock_class_key *lock_key,
687 const char *lock_name);
bf0d29fb
EJ
688struct regmap *__regmap_init_fsi(struct fsi_device *fsi_dev,
689 const struct regmap_config *config,
690 struct lock_class_key *lock_key,
691 const char *lock_name);
3cfe7a74
NB
692
693struct regmap *__devm_regmap_init(struct device *dev,
694 const struct regmap_bus *bus,
695 void *bus_context,
696 const struct regmap_config *config,
697 struct lock_class_key *lock_key,
698 const char *lock_name);
699struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
700 const struct regmap_config *config,
701 struct lock_class_key *lock_key,
702 const char *lock_name);
1f89d2fe
SV
703struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
704 const struct regmap_config *config,
705 struct lock_class_key *lock_key,
706 const char *lock_name);
bcf7eac3
AM
707struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
708 const struct regmap_config *config,
709 struct lock_class_key *lock_key,
710 const char *lock_name);
3cfe7a74
NB
711struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
712 const struct regmap_config *config,
713 struct lock_class_key *lock_key,
714 const char *lock_name);
715struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
716 const struct regmap_config *config,
717 struct lock_class_key *lock_key,
718 const char *lock_name);
719struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
720 const struct regmap_config *config,
721 struct lock_class_key *lock_key,
722 const char *lock_name);
cc5d0db3
AM
723struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
724 const struct regmap_config *config,
725 struct lock_class_key *lock_key,
726 const char *lock_name);
3cfe7a74
NB
727struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
728 const char *clk_id,
729 void __iomem *regs,
730 const struct regmap_config *config,
731 struct lock_class_key *lock_key,
732 const char *lock_name);
733struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
734 const struct regmap_config *config,
735 struct lock_class_key *lock_key,
736 const char *lock_name);
7c22ce6e
VK
737struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
738 const struct regmap_config *config,
739 struct lock_class_key *lock_key,
740 const char *lock_name);
fb5103f9
PLB
741struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
742 const struct regmap_config *config,
fdd9ef3d 743 const struct regmap_sdw_mbq_cfg *mbq_config,
fb5103f9
PLB
744 struct lock_class_key *lock_key,
745 const char *lock_name);
ed24d568
SK
746struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
747 const struct regmap_config *config,
748 struct lock_class_key *lock_key,
749 const char *lock_name);
6445500b
VS
750struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
751 const struct regmap_config *config,
752 struct lock_class_key *lock_key,
753 const char *lock_name);
7f9fb673
XY
754struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
755 const struct regmap_config *config,
756 struct lock_class_key *lock_key,
757 const char *lock_name);
bf0d29fb
EJ
758struct regmap *__devm_regmap_init_fsi(struct fsi_device *fsi_dev,
759 const struct regmap_config *config,
760 struct lock_class_key *lock_key,
761 const char *lock_name);
762
3cfe7a74
NB
763/*
764 * Wrapper for regmap_init macros to include a unique lockdep key and name
765 * for each call. No-op if CONFIG_LOCKDEP is not set.
766 *
767 * @fn: Real function to call (in the form __[*_]regmap_init[_*])
768 * @name: Config variable name (#config in the calling macro)
769 **/
770#ifdef CONFIG_LOCKDEP
771#define __regmap_lockdep_wrapper(fn, name, ...) \
772( \
773 ({ \
774 static struct lock_class_key _key; \
775 fn(__VA_ARGS__, &_key, \
776 KBUILD_BASENAME ":" \
777 __stringify(__LINE__) ":" \
778 "(" name ")->lock"); \
779 }) \
780)
781#else
782#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
783#endif
784
1ed81114 785/**
2cf8e2df 786 * regmap_init() - Initialise register map
1ed81114
NB
787 *
788 * @dev: Device that will be interacted with
789 * @bus: Bus-specific callbacks to use with device
790 * @bus_context: Data passed to bus-specific callbacks
791 * @config: Configuration for register map
792 *
793 * The return value will be an ERR_PTR() on error or a valid pointer to
794 * a struct regmap. This function should generally not be called
795 * directly, it should be called by bus-specific init functions.
796 */
3cfe7a74
NB
797#define regmap_init(dev, bus, bus_context, config) \
798 __regmap_lockdep_wrapper(__regmap_init, #config, \
799 dev, bus, bus_context, config)
6cfec04b 800int regmap_attach_dev(struct device *dev, struct regmap *map,
3cfe7a74 801 const struct regmap_config *config);
22853223 802
1ed81114 803/**
2cf8e2df 804 * regmap_init_i2c() - Initialise register map
1ed81114
NB
805 *
806 * @i2c: Device that will be interacted with
807 * @config: Configuration for register map
808 *
809 * The return value will be an ERR_PTR() on error or a valid pointer to
810 * a struct regmap.
811 */
3cfe7a74
NB
812#define regmap_init_i2c(i2c, config) \
813 __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
814 i2c, config)
1ed81114 815
1f89d2fe
SV
816/**
817 * regmap_init_mdio() - Initialise register map
818 *
819 * @mdio_dev: Device that will be interacted with
820 * @config: Configuration for register map
821 *
822 * The return value will be an ERR_PTR() on error or a valid pointer to
823 * a struct regmap.
824 */
825#define regmap_init_mdio(mdio_dev, config) \
826 __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \
827 mdio_dev, config)
828
bcf7eac3
AM
829/**
830 * regmap_init_sccb() - Initialise register map
831 *
832 * @i2c: Device that will be interacted with
833 * @config: Configuration for register map
834 *
835 * The return value will be an ERR_PTR() on error or a valid pointer to
836 * a struct regmap.
837 */
838#define regmap_init_sccb(i2c, config) \
839 __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \
840 i2c, config)
841
7d6f7fb0
SK
842/**
843 * regmap_init_slimbus() - Initialise register map
844 *
845 * @slimbus: Device that will be interacted with
846 * @config: Configuration for register map
847 *
848 * The return value will be an ERR_PTR() on error or a valid pointer to
849 * a struct regmap.
850 */
851#define regmap_init_slimbus(slimbus, config) \
852 __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
853 slimbus, config)
854
1ed81114 855/**
2cf8e2df 856 * regmap_init_spi() - Initialise register map
1ed81114 857 *
2cf8e2df 858 * @dev: Device that will be interacted with
1ed81114
NB
859 * @config: Configuration for register map
860 *
861 * The return value will be an ERR_PTR() on error or a valid pointer to
862 * a struct regmap.
863 */
3cfe7a74
NB
864#define regmap_init_spi(dev, config) \
865 __regmap_lockdep_wrapper(__regmap_init_spi, #config, \
866 dev, config)
1ed81114
NB
867
868/**
2cf8e2df
CK
869 * regmap_init_spmi_base() - Create regmap for the Base register space
870 *
871 * @dev: SPMI device that will be interacted with
1ed81114
NB
872 * @config: Configuration for register map
873 *
874 * The return value will be an ERR_PTR() on error or a valid pointer to
875 * a struct regmap.
876 */
3cfe7a74
NB
877#define regmap_init_spmi_base(dev, config) \
878 __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \
879 dev, config)
1ed81114
NB
880
881/**
2cf8e2df
CK
882 * regmap_init_spmi_ext() - Create regmap for Ext register space
883 *
884 * @dev: Device that will be interacted with
1ed81114
NB
885 * @config: Configuration for register map
886 *
887 * The return value will be an ERR_PTR() on error or a valid pointer to
888 * a struct regmap.
889 */
3cfe7a74
NB
890#define regmap_init_spmi_ext(dev, config) \
891 __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
892 dev, config)
1ed81114 893
cc5d0db3
AM
894/**
895 * regmap_init_w1() - Initialise register map
896 *
897 * @w1_dev: Device that will be interacted with
898 * @config: Configuration for register map
899 *
900 * The return value will be an ERR_PTR() on error or a valid pointer to
901 * a struct regmap.
902 */
903#define regmap_init_w1(w1_dev, config) \
904 __regmap_lockdep_wrapper(__regmap_init_w1, #config, \
905 w1_dev, config)
906
1ed81114 907/**
2cf8e2df 908 * regmap_init_mmio_clk() - Initialise register map with register clock
1ed81114
NB
909 *
910 * @dev: Device that will be interacted with
911 * @clk_id: register clock consumer ID
912 * @regs: Pointer to memory-mapped IO region
913 * @config: Configuration for register map
914 *
915 * The return value will be an ERR_PTR() on error or a valid pointer to
916 * a struct regmap.
917 */
3cfe7a74
NB
918#define regmap_init_mmio_clk(dev, clk_id, regs, config) \
919 __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \
920 dev, clk_id, regs, config)
878ec67b
PZ
921
922/**
2cf8e2df 923 * regmap_init_mmio() - Initialise register map
878ec67b
PZ
924 *
925 * @dev: Device that will be interacted with
926 * @regs: Pointer to memory-mapped IO region
927 * @config: Configuration for register map
928 *
929 * The return value will be an ERR_PTR() on error or a valid pointer to
930 * a struct regmap.
931 */
1ed81114
NB
932#define regmap_init_mmio(dev, regs, config) \
933 regmap_init_mmio_clk(dev, NULL, regs, config)
934
935/**
2cf8e2df 936 * regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
937 *
938 * @ac97: Device that will be interacted with
939 * @config: Configuration for register map
940 *
941 * The return value will be an ERR_PTR() on error or a valid pointer to
942 * a struct regmap.
943 */
3cfe7a74
NB
944#define regmap_init_ac97(ac97, config) \
945 __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \
946 ac97, config)
22853223 947bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
878ec67b 948
7c22ce6e
VK
949/**
950 * regmap_init_sdw() - Initialise register map
951 *
952 * @sdw: Device that will be interacted with
953 * @config: Configuration for register map
954 *
955 * The return value will be an ERR_PTR() on error or a valid pointer to
956 * a struct regmap.
957 */
958#define regmap_init_sdw(sdw, config) \
959 __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \
960 sdw, config)
961
fb5103f9
PLB
962/**
963 * regmap_init_sdw_mbq() - Initialise register map
964 *
965 * @sdw: Device that will be interacted with
966 * @config: Configuration for register map
967 *
968 * The return value will be an ERR_PTR() on error or a valid pointer to
969 * a struct regmap.
970 */
971#define regmap_init_sdw_mbq(sdw, config) \
972 __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
fdd9ef3d
CK
973 sdw, config, NULL)
974
975/**
976 * regmap_init_sdw_mbq_cfg() - Initialise MBQ SDW register map with config
977 *
978 * @sdw: Device that will be interacted with
979 * @config: Configuration for register map
980 * @mbq_config: Properties for the MBQ registers
981 *
982 * The return value will be an ERR_PTR() on error or a valid pointer
983 * to a struct regmap. The regmap will be automatically freed by the
984 * device management code.
985 */
986#define regmap_init_sdw_mbq_cfg(sdw, config, mbq_config) \
987 __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
988 sdw, config, mbq_config)
fb5103f9 989
7f9fb673
XY
990/**
991 * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
992 * to AVMM Bus Bridge
993 *
994 * @spi: Device that will be interacted with
995 * @config: Configuration for register map
996 *
997 * The return value will be an ERR_PTR() on error or a valid pointer
998 * to a struct regmap.
999 */
1000#define regmap_init_spi_avmm(spi, config) \
1001 __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \
1002 spi, config)
7c22ce6e 1003
bf0d29fb
EJ
1004/**
1005 * regmap_init_fsi() - Initialise register map
1006 *
1007 * @fsi_dev: Device that will be interacted with
1008 * @config: Configuration for register map
1009 *
1010 * The return value will be an ERR_PTR() on error or a valid pointer to
1011 * a struct regmap.
1012 */
1013#define regmap_init_fsi(fsi_dev, config) \
1014 __regmap_lockdep_wrapper(__regmap_init_fsi, #config, fsi_dev, \
1015 config)
1016
1ed81114 1017/**
2cf8e2df 1018 * devm_regmap_init() - Initialise managed register map
1ed81114
NB
1019 *
1020 * @dev: Device that will be interacted with
1021 * @bus: Bus-specific callbacks to use with device
1022 * @bus_context: Data passed to bus-specific callbacks
1023 * @config: Configuration for register map
1024 *
1025 * The return value will be an ERR_PTR() on error or a valid pointer
1026 * to a struct regmap. This function should generally not be called
1027 * directly, it should be called by bus-specific init functions. The
1028 * map will be automatically freed by the device management code.
1029 */
3cfe7a74
NB
1030#define devm_regmap_init(dev, bus, bus_context, config) \
1031 __regmap_lockdep_wrapper(__devm_regmap_init, #config, \
1032 dev, bus, bus_context, config)
1ed81114
NB
1033
1034/**
2cf8e2df 1035 * devm_regmap_init_i2c() - Initialise managed register map
1ed81114
NB
1036 *
1037 * @i2c: Device that will be interacted with
1038 * @config: Configuration for register map
1039 *
1040 * The return value will be an ERR_PTR() on error or a valid pointer
1041 * to a struct regmap. The regmap will be automatically freed by the
1042 * device management code.
1043 */
3cfe7a74
NB
1044#define devm_regmap_init_i2c(i2c, config) \
1045 __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \
1046 i2c, config)
1ed81114 1047
1f89d2fe
SV
1048/**
1049 * devm_regmap_init_mdio() - Initialise managed register map
1050 *
1051 * @mdio_dev: Device that will be interacted with
1052 * @config: Configuration for register map
1053 *
1054 * The return value will be an ERR_PTR() on error or a valid pointer
1055 * to a struct regmap. The regmap will be automatically freed by the
1056 * device management code.
1057 */
1058#define devm_regmap_init_mdio(mdio_dev, config) \
1059 __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \
1060 mdio_dev, config)
1061
bcf7eac3
AM
1062/**
1063 * devm_regmap_init_sccb() - Initialise managed register map
1064 *
1065 * @i2c: Device that will be interacted with
1066 * @config: Configuration for register map
1067 *
1068 * The return value will be an ERR_PTR() on error or a valid pointer
1069 * to a struct regmap. The regmap will be automatically freed by the
1070 * device management code.
1071 */
1072#define devm_regmap_init_sccb(i2c, config) \
1073 __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \
1074 i2c, config)
1075
1ed81114 1076/**
2cf8e2df 1077 * devm_regmap_init_spi() - Initialise register map
1ed81114 1078 *
2cf8e2df 1079 * @dev: Device that will be interacted with
1ed81114
NB
1080 * @config: Configuration for register map
1081 *
1082 * The return value will be an ERR_PTR() on error or a valid pointer
1083 * to a struct regmap. The map will be automatically freed by the
1084 * device management code.
1085 */
3cfe7a74
NB
1086#define devm_regmap_init_spi(dev, config) \
1087 __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \
1088 dev, config)
1ed81114
NB
1089
1090/**
2cf8e2df
CK
1091 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
1092 *
1093 * @dev: SPMI device that will be interacted with
1ed81114
NB
1094 * @config: Configuration for register map
1095 *
1096 * The return value will be an ERR_PTR() on error or a valid pointer
1097 * to a struct regmap. The regmap will be automatically freed by the
1098 * device management code.
1099 */
3cfe7a74
NB
1100#define devm_regmap_init_spmi_base(dev, config) \
1101 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \
1102 dev, config)
1ed81114
NB
1103
1104/**
2cf8e2df
CK
1105 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
1106 *
1107 * @dev: SPMI device that will be interacted with
1ed81114
NB
1108 * @config: Configuration for register map
1109 *
1110 * The return value will be an ERR_PTR() on error or a valid pointer
1111 * to a struct regmap. The regmap will be automatically freed by the
1112 * device management code.
1113 */
3cfe7a74
NB
1114#define devm_regmap_init_spmi_ext(dev, config) \
1115 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
1116 dev, config)
3cfe7a74 1117
cc5d0db3
AM
1118/**
1119 * devm_regmap_init_w1() - Initialise managed register map
1120 *
1121 * @w1_dev: Device that will be interacted with
1122 * @config: Configuration for register map
1123 *
1124 * The return value will be an ERR_PTR() on error or a valid pointer
1125 * to a struct regmap. The regmap will be automatically freed by the
1126 * device management code.
1127 */
1128#define devm_regmap_init_w1(w1_dev, config) \
1129 __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
1130 w1_dev, config)
878ec67b 1131/**
2cf8e2df 1132 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
878ec67b
PZ
1133 *
1134 * @dev: Device that will be interacted with
1ed81114 1135 * @clk_id: register clock consumer ID
878ec67b
PZ
1136 * @regs: Pointer to memory-mapped IO region
1137 * @config: Configuration for register map
1138 *
1ed81114
NB
1139 * The return value will be an ERR_PTR() on error or a valid pointer
1140 * to a struct regmap. The regmap will be automatically freed by the
1141 * device management code.
878ec67b 1142 */
1ed81114
NB
1143#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \
1144 __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \
1145 dev, clk_id, regs, config)
878ec67b
PZ
1146
1147/**
2cf8e2df 1148 * devm_regmap_init_mmio() - Initialise managed register map
878ec67b
PZ
1149 *
1150 * @dev: Device that will be interacted with
1151 * @regs: Pointer to memory-mapped IO region
1152 * @config: Configuration for register map
1153 *
1154 * The return value will be an ERR_PTR() on error or a valid pointer
1155 * to a struct regmap. The regmap will be automatically freed by the
1156 * device management code.
1157 */
3cfe7a74
NB
1158#define devm_regmap_init_mmio(dev, regs, config) \
1159 devm_regmap_init_mmio_clk(dev, NULL, regs, config)
c0eb4676 1160
1ed81114 1161/**
2cf8e2df 1162 * devm_regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
1163 *
1164 * @ac97: Device that will be interacted with
1165 * @config: Configuration for register map
1166 *
1167 * The return value will be an ERR_PTR() on error or a valid pointer
1168 * to a struct regmap. The regmap will be automatically freed by the
1169 * device management code.
1170 */
1171#define devm_regmap_init_ac97(ac97, config) \
1172 __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \
1173 ac97, config)
c0eb4676 1174
7c22ce6e
VK
1175/**
1176 * devm_regmap_init_sdw() - Initialise managed register map
1177 *
1178 * @sdw: Device that will be interacted with
1179 * @config: Configuration for register map
1180 *
1181 * The return value will be an ERR_PTR() on error or a valid pointer
1182 * to a struct regmap. The regmap will be automatically freed by the
1183 * device management code.
1184 */
1185#define devm_regmap_init_sdw(sdw, config) \
1186 __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \
1187 sdw, config)
1188
fb5103f9
PLB
1189/**
1190 * devm_regmap_init_sdw_mbq() - Initialise managed register map
1191 *
1192 * @sdw: Device that will be interacted with
1193 * @config: Configuration for register map
1194 *
1195 * The return value will be an ERR_PTR() on error or a valid pointer
1196 * to a struct regmap. The regmap will be automatically freed by the
1197 * device management code.
1198 */
1199#define devm_regmap_init_sdw_mbq(sdw, config) \
1200 __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
fdd9ef3d
CK
1201 sdw, config, NULL)
1202
1203/**
1204 * devm_regmap_init_sdw_mbq_cfg() - Initialise managed MBQ SDW register map with config
1205 *
1206 * @sdw: Device that will be interacted with
1207 * @config: Configuration for register map
1208 * @mbq_config: Properties for the MBQ registers
1209 *
1210 * The return value will be an ERR_PTR() on error or a valid pointer
1211 * to a struct regmap. The regmap will be automatically freed by the
1212 * device management code.
1213 */
1214#define devm_regmap_init_sdw_mbq_cfg(sdw, config, mbq_config) \
1215 __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, \
1216 #config, sdw, config, mbq_config)
fb5103f9 1217
ed24d568
SK
1218/**
1219 * devm_regmap_init_slimbus() - Initialise managed register map
1220 *
1221 * @slimbus: Device that will be interacted with
1222 * @config: Configuration for register map
1223 *
1224 * The return value will be an ERR_PTR() on error or a valid pointer
1225 * to a struct regmap. The regmap will be automatically freed by the
1226 * device management code.
1227 */
1228#define devm_regmap_init_slimbus(slimbus, config) \
1229 __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \
1230 slimbus, config)
6445500b
VS
1231
1232/**
1233 * devm_regmap_init_i3c() - Initialise managed register map
1234 *
1235 * @i3c: Device that will be interacted with
1236 * @config: Configuration for register map
1237 *
1238 * The return value will be an ERR_PTR() on error or a valid pointer
1239 * to a struct regmap. The regmap will be automatically freed by the
1240 * device management code.
1241 */
1242#define devm_regmap_init_i3c(i3c, config) \
1243 __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \
1244 i3c, config)
1245
7f9fb673
XY
1246/**
1247 * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
1248 * to AVMM Bus Bridge
1249 *
1250 * @spi: Device that will be interacted with
1251 * @config: Configuration for register map
1252 *
1253 * The return value will be an ERR_PTR() on error or a valid pointer
1254 * to a struct regmap. The map will be automatically freed by the
1255 * device management code.
1256 */
1257#define devm_regmap_init_spi_avmm(spi, config) \
1258 __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \
1259 spi, config)
1260
bf0d29fb
EJ
1261/**
1262 * devm_regmap_init_fsi() - Initialise managed register map
1263 *
1264 * @fsi_dev: Device that will be interacted with
1265 * @config: Configuration for register map
1266 *
1267 * The return value will be an ERR_PTR() on error or a valid pointer
1268 * to a struct regmap. The regmap will be automatically freed by the
1269 * device management code.
1270 */
1271#define devm_regmap_init_fsi(fsi_dev, config) \
1272 __regmap_lockdep_wrapper(__devm_regmap_init_fsi, #config, \
1273 fsi_dev, config)
1274
31895662
MR
1275int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
1276void regmap_mmio_detach_clk(struct regmap *map);
b83a313b 1277void regmap_exit(struct regmap *map);
bf315173
MB
1278int regmap_reinit_cache(struct regmap *map,
1279 const struct regmap_config *config);
72b39f6f 1280struct regmap *dev_get_regmap(struct device *dev, const char *name);
8d7d3972 1281struct device *regmap_get_device(struct regmap *map);
b83a313b 1282int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
915f441b 1283int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
b83a313b
MB
1284int regmap_raw_write(struct regmap *map, unsigned int reg,
1285 const void *val, size_t val_len);
cdf6b11d
BW
1286int regmap_noinc_write(struct regmap *map, unsigned int reg,
1287 const void *val, size_t val_len);
8eaeb219
LD
1288int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1289 size_t val_count);
8019ff6c 1290int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
e33fabd3 1291 int num_regs);
1d5b40bc 1292int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 1293 const struct reg_sequence *regs,
1d5b40bc 1294 int num_regs);
0d509f2b
MB
1295int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1296 const void *val, size_t val_len);
b83a313b 1297int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
70ee853e 1298int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val);
b83a313b
MB
1299int regmap_raw_read(struct regmap *map, unsigned int reg,
1300 void *val, size_t val_len);
74fe7b55
LC
1301int regmap_noinc_read(struct regmap *map, unsigned int reg,
1302 void *val, size_t val_len);
b83a313b
MB
1303int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1304 size_t val_count);
eb708cd6 1305int regmap_multi_reg_read(struct regmap *map, const unsigned int *reg, void *val,
3c1ff93b 1306 size_t val_count);
91d31b9f
KM
1307int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1308 unsigned int mask, unsigned int val,
1309 bool *change, bool async, bool force);
4b9e7edb
BG
1310
1311static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1312 unsigned int mask, unsigned int val)
1313{
1314 return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
1315}
1316
1317static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1318 unsigned int mask, unsigned int val)
1319{
1320 return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
1321}
1322
1323static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1324 unsigned int mask, unsigned int val,
1325 bool *change)
1326{
1327 return regmap_update_bits_base(map, reg, mask, val,
1328 change, false, false);
1329}
1330
1331static inline int
1332regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1333 unsigned int mask, unsigned int val,
1334 bool *change)
1335{
1336 return regmap_update_bits_base(map, reg, mask, val,
1337 change, true, false);
1338}
1339
1340static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1341 unsigned int mask, unsigned int val)
1342{
1343 return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
1344}
1345
a6539c32 1346int regmap_get_val_bytes(struct regmap *map);
668abc72 1347int regmap_get_max_register(struct regmap *map);
a2f776cb 1348int regmap_get_reg_stride(struct regmap *map);
a6d99022 1349bool regmap_might_sleep(struct regmap *map);
0d509f2b 1350int regmap_async_complete(struct regmap *map);
221ad7f2 1351bool regmap_can_raw_write(struct regmap *map);
f50c9eb4
MSP
1352size_t regmap_get_raw_read_max(struct regmap *map);
1353size_t regmap_get_raw_write_max(struct regmap *map);
b83a313b 1354
fd80df35 1355void regcache_sort_defaults(struct reg_default *defaults, unsigned int ndefaults);
39a58439 1356int regcache_sync(struct regmap *map);
4d4cfd16
MB
1357int regcache_sync_region(struct regmap *map, unsigned int min,
1358 unsigned int max);
697e85bc
MB
1359int regcache_drop_region(struct regmap *map, unsigned int min,
1360 unsigned int max);
92afb286 1361void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 1362void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 1363void regcache_mark_dirty(struct regmap *map);
78908f45 1364bool regcache_reg_cached(struct regmap *map, unsigned int reg);
92afb286 1365
154881e5
MB
1366bool regmap_check_range_table(struct regmap *map, unsigned int reg,
1367 const struct regmap_access_table *table);
1368
8019ff6c 1369int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a 1370 int num_regs);
13ff50c8
NC
1371int regmap_parse_val(struct regmap *map, const void *buf,
1372 unsigned int *val);
22f0d90a 1373
76aad392
DC
1374static inline bool regmap_reg_in_range(unsigned int reg,
1375 const struct regmap_range *range)
1376{
1377 return reg >= range->range_min && reg <= range->range_max;
1378}
1379
1380bool regmap_reg_in_ranges(unsigned int reg,
1381 const struct regmap_range *ranges,
1382 unsigned int nranges);
1383
aa2ff9db
BG
1384static inline int regmap_set_bits(struct regmap *map,
1385 unsigned int reg, unsigned int bits)
1386{
1387 return regmap_update_bits_base(map, reg, bits, bits,
1388 NULL, false, false);
1389}
1390
1391static inline int regmap_clear_bits(struct regmap *map,
1392 unsigned int reg, unsigned int bits)
1393{
1394 return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
1395}
1396
d1f4390d
BG
1397static inline int regmap_assign_bits(struct regmap *map, unsigned int reg,
1398 unsigned int bits, bool value)
1399{
1400 if (value)
1401 return regmap_set_bits(map, reg, bits);
1402 else
1403 return regmap_clear_bits(map, reg, bits);
1404}
1405
aa2ff9db
BG
1406int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
1407
67252287 1408/**
2cf8e2df 1409 * struct reg_field - Description of an register field
67252287
SK
1410 *
1411 * @reg: Offset of the register within the regmap bank
1412 * @lsb: lsb of the register field.
f27b37f5 1413 * @msb: msb of the register field.
a0102375
KM
1414 * @id_size: port size if it has some ports
1415 * @id_offset: address offset for each ports
67252287
SK
1416 */
1417struct reg_field {
1418 unsigned int reg;
1419 unsigned int lsb;
1420 unsigned int msb;
a0102375
KM
1421 unsigned int id_size;
1422 unsigned int id_offset;
67252287
SK
1423};
1424
1425#define REG_FIELD(_reg, _lsb, _msb) { \
1426 .reg = _reg, \
1427 .lsb = _lsb, \
1428 .msb = _msb, \
1429 }
1430
8baebfc2
VO
1431#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \
1432 .reg = _reg, \
1433 .lsb = _lsb, \
1434 .msb = _msb, \
1435 .id_size = _size, \
1436 .id_offset = _offset, \
1437 }
1438
67252287
SK
1439struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1440 struct reg_field reg_field);
1441void regmap_field_free(struct regmap_field *field);
1442
1443struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1444 struct regmap *regmap, struct reg_field reg_field);
1445void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
1446
ea470b82
SK
1447int regmap_field_bulk_alloc(struct regmap *regmap,
1448 struct regmap_field **rm_field,
29c34975 1449 const struct reg_field *reg_field,
ea470b82
SK
1450 int num_fields);
1451void regmap_field_bulk_free(struct regmap_field *field);
1452int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
1453 struct regmap_field **field,
29c34975
IZ
1454 const struct reg_field *reg_field,
1455 int num_fields);
ea470b82
SK
1456void devm_regmap_field_bulk_free(struct device *dev,
1457 struct regmap_field *field);
1458
67252287 1459int regmap_field_read(struct regmap_field *field, unsigned int *val);
28972eaa
KM
1460int regmap_field_update_bits_base(struct regmap_field *field,
1461 unsigned int mask, unsigned int val,
1462 bool *change, bool async, bool force);
a0102375
KM
1463int regmap_fields_read(struct regmap_field *field, unsigned int id,
1464 unsigned int *val);
e126edec
KM
1465int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1466 unsigned int mask, unsigned int val,
1467 bool *change, bool async, bool force);
4b9e7edb
BG
1468
1469static inline int regmap_field_write(struct regmap_field *field,
1470 unsigned int val)
1471{
1472 return regmap_field_update_bits_base(field, ~0, val,
1473 NULL, false, false);
1474}
1475
1476static inline int regmap_field_force_write(struct regmap_field *field,
1477 unsigned int val)
1478{
1479 return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
1480}
1481
1482static inline int regmap_field_update_bits(struct regmap_field *field,
1483 unsigned int mask, unsigned int val)
1484{
1485 return regmap_field_update_bits_base(field, mask, val,
1486 NULL, false, false);
1487}
1488
f67be8b7
LC
1489static inline int regmap_field_set_bits(struct regmap_field *field,
1490 unsigned int bits)
1491{
1492 return regmap_field_update_bits_base(field, bits, bits, NULL, false,
1493 false);
1494}
1495
1496static inline int regmap_field_clear_bits(struct regmap_field *field,
1497 unsigned int bits)
1498{
1499 return regmap_field_update_bits_base(field, bits, 0, NULL, false,
1500 false);
1501}
1502
1503int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);
1504
4b9e7edb
BG
1505static inline int
1506regmap_field_force_update_bits(struct regmap_field *field,
1507 unsigned int mask, unsigned int val)
1508{
1509 return regmap_field_update_bits_base(field, mask, val,
1510 NULL, false, true);
1511}
1512
1513static inline int regmap_fields_write(struct regmap_field *field,
1514 unsigned int id, unsigned int val)
1515{
1516 return regmap_fields_update_bits_base(field, id, ~0, val,
1517 NULL, false, false);
1518}
1519
1520static inline int regmap_fields_force_write(struct regmap_field *field,
1521 unsigned int id, unsigned int val)
1522{
1523 return regmap_fields_update_bits_base(field, id, ~0, val,
1524 NULL, false, true);
1525}
1526
1527static inline int
1528regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1529 unsigned int mask, unsigned int val)
1530{
1531 return regmap_fields_update_bits_base(field, id, mask, val,
1532 NULL, false, false);
1533}
1534
1535static inline int
1536regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1537 unsigned int mask, unsigned int val)
1538{
1539 return regmap_fields_update_bits_base(field, id, mask, val,
1540 NULL, false, true);
1541}
1542
1c2928e3
MV
1543/**
1544 * struct regmap_irq_type - IRQ type definitions.
1545 *
1546 * @type_reg_offset: Offset register for the irq type setting.
1547 * @type_rising_val: Register value to configure RISING type irq.
1548 * @type_falling_val: Register value to configure FALLING type irq.
1549 * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
1550 * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
1551 * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
1552 */
1553struct regmap_irq_type {
1554 unsigned int type_reg_offset;
1555 unsigned int type_reg_mask;
1556 unsigned int type_rising_val;
1557 unsigned int type_falling_val;
1558 unsigned int type_level_low_val;
1559 unsigned int type_level_high_val;
1560 unsigned int types_supported;
1561};
76aad392 1562
f8beab2b 1563/**
2cf8e2df 1564 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
f8beab2b
MB
1565 *
1566 * @reg_offset: Offset of the status/mask register within the bank
1567 * @mask: Mask used to flag/control the register.
1c2928e3 1568 * @type: IRQ trigger type setting details if supported.
f8beab2b
MB
1569 */
1570struct regmap_irq {
1571 unsigned int reg_offset;
1572 unsigned int mask;
1c2928e3 1573 struct regmap_irq_type type;
f8beab2b
MB
1574};
1575
b4fe8ba7
QZ
1576#define REGMAP_IRQ_REG(_irq, _off, _mask) \
1577 [_irq] = { .reg_offset = (_off), .mask = (_mask) }
1578
43fac323
TX
1579#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
1580 [_id] = { \
1581 .mask = BIT((_id) % (_reg_bits)), \
1582 .reg_offset = (_id) / (_reg_bits), \
1583 }
1584
a2d21848
MV
1585#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \
1586 { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
1587
1588struct regmap_irq_sub_irq_map {
1589 unsigned int num_regs;
1590 unsigned int *offset;
1591};
1592
bdf9b86c
AM
1593struct regmap_irq_chip_data;
1594
f8beab2b 1595/**
2cf8e2df 1596 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
f8beab2b
MB
1597 *
1598 * @name: Descriptive name for IRQ controller.
dde286ee
MV
1599 * @domain_suffix: Name suffix to be appended to end of IRQ domain name. Needed
1600 * when multiple regmap-IRQ controllers are created from same
1601 * device.
f8beab2b 1602 *
a2d21848
MV
1603 * @main_status: Base main status register address. For chips which have
1604 * interrupts arranged in separate sub-irq blocks with own IRQ
1605 * registers and which have a main IRQ registers indicating
1606 * sub-irq blocks with unhandled interrupts. For such chips fill
1607 * sub-irq register information in status_base, mask_base and
1608 * ack_base.
1609 * @num_main_status_bits: Should be given to chips where number of meaningfull
1610 * main status bits differs from num_regs.
1611 * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
1612 * registers. First item in array describes the registers
1613 * for first main status bit. Second array for second bit etc.
1614 * Offset is given as sub register status offset to
1615 * status_base. Should contain num_regs arrays.
1616 * Can be provided for chips with more complex mapping than
1617 * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1618 * @num_main_regs: Number of 'main status' irq registers for chips which have
1619 * main_status set.
1620 *
f8beab2b 1621 * @status_base: Base status register address.
e8ffb12e
AM
1622 * @mask_base: Base mask register address. Mask bits are set to 1 when an
1623 * interrupt is masked, 0 when unmasked.
1624 * @unmask_base: Base unmask register address. Unmask bits are set to 1 when
1625 * an interrupt is unmasked and 0 when masked.
d3233433
AS
1626 * @ack_base: Base ack address. If zero then the chip is clear on read.
1627 * Using zero value is possible with @use_ack bit.
a43fd50d 1628 * @wake_base: Base address for wake enables. If zero unsupported.
faa87ce9 1629 * @config_base: Base address for IRQ type config regs. If null unsupported.
022f926a 1630 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
2753e6f8 1631 * @init_ack_masked: Ack all masked interrupts once during initalization.
e8ffb12e
AM
1632 * @mask_unmask_non_inverted: Controls mask bit inversion for chips that set
1633 * both @mask_base and @unmask_base. If false, mask and unmask bits are
1634 * inverted (which is deprecated behavior); if true, bits will not be
1635 * inverted and the registers keep their normal behavior. Note that if
1636 * you use only one of @mask_base or @unmask_base, this flag has no
1637 * effect and is unnecessary. Any new drivers that set both @mask_base
1638 * and @unmask_base should set this to true to avoid relying on the
1639 * deprecated behavior.
d3233433 1640 * @use_ack: Use @ack register even if it is zero.
a650fdd9 1641 * @ack_invert: Inverted ack register: cleared bits for ack.
3a6f0fb7 1642 * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
9b400171 1643 * @status_invert: Inverted status register: cleared bits are active interrupts.
1c12fbdf
MDB
1644 * @status_is_level: Status register is actuall signal level: Xor status
1645 * register with previous value to get active interrupts.
68622bdf 1646 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
610fdd66
AM
1647 * @type_in_mask: Use the mask registers for controlling irq type. Use this if
1648 * the hardware provides separate bits for rising/falling edge
1649 * or low/high level interrupts and they should be combined into
1650 * a single logical interrupt. Use &struct regmap_irq_type data
1651 * to define the mask bit for each irq type.
c82ea33e
BG
1652 * @clear_on_unmask: For chips with interrupts cleared on read: read the status
1653 * registers before unmasking interrupts to clear any bits
1654 * set when they were masked.
9b400171 1655 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
4d60cac9 1656 * @no_status: No status register: all interrupts assumed generated by device.
f8beab2b
MB
1657 *
1658 * @num_regs: Number of registers in each control bank.
9b400171 1659 *
f8beab2b
MB
1660 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
1661 * assigned based on the index in the array of the interrupt.
1662 * @num_irqs: Number of descriptors.
faa87ce9
AM
1663 * @num_config_bases: Number of config base registers.
1664 * @num_config_regs: Number of config registers for each config base register.
9b400171 1665 *
ccc12561
LD
1666 * @handle_pre_irq: Driver specific callback to handle interrupt from device
1667 * before regmap_irq_handler process the interrupts.
1668 * @handle_post_irq: Driver specific callback to handle interrupt from device
1669 * after handling the interrupts in regmap_irq_handler().
69af4bca
WBG
1670 * @handle_mask_sync: Callback used to handle IRQ mask syncs. The index will be
1671 * in the range [0, num_regs)
faa87ce9 1672 * @set_type_config: Callback used for configuring irq types.
bdf9b86c
AM
1673 * @get_irq_reg: Callback for mapping (base register, index) pairs to register
1674 * addresses. The base register will be one of @status_base,
1675 * @mask_base, etc., @main_status, or any of @config_base.
1676 * The index will be in the range [0, num_main_regs[ for the
212bc1ce 1677 * main status base, [0, num_config_regs[ for any config
bdf9b86c
AM
1678 * register base, and [0, num_regs[ for any other base.
1679 * If unspecified then regmap_irq_get_irq_reg_linear() is used.
ccc12561
LD
1680 * @irq_drv_data: Driver specific IRQ data which is passed as parameter when
1681 * driver specific pre/post interrupt handler is called.
2cf8e2df
CK
1682 *
1683 * This is not intended to handle every possible interrupt controller, but
1684 * it should handle a substantial proportion of those that are found in the
1685 * wild.
f8beab2b
MB
1686 */
1687struct regmap_irq_chip {
1688 const char *name;
dde286ee 1689 const char *domain_suffix;
f8beab2b 1690
a2d21848
MV
1691 unsigned int main_status;
1692 unsigned int num_main_status_bits;
f21711bb 1693 const struct regmap_irq_sub_irq_map *sub_reg_offsets;
a2d21848
MV
1694 int num_main_regs;
1695
f8beab2b
MB
1696 unsigned int status_base;
1697 unsigned int mask_base;
7b7d1968 1698 unsigned int unmask_base;
f8beab2b 1699 unsigned int ack_base;
a43fd50d 1700 unsigned int wake_base;
faa87ce9 1701 const unsigned int *config_base;
022f926a 1702 unsigned int irq_reg_stride;
445cbd21 1703 unsigned int init_ack_masked:1;
e8ffb12e 1704 unsigned int mask_unmask_non_inverted:1;
445cbd21
AM
1705 unsigned int use_ack:1;
1706 unsigned int ack_invert:1;
1707 unsigned int clear_ack:1;
9b400171 1708 unsigned int status_invert:1;
1c12fbdf 1709 unsigned int status_is_level:1;
445cbd21 1710 unsigned int wake_invert:1;
445cbd21
AM
1711 unsigned int type_in_mask:1;
1712 unsigned int clear_on_unmask:1;
9b400171 1713 unsigned int runtime_pm:1;
4d60cac9 1714 unsigned int no_status:1;
f8beab2b
MB
1715
1716 int num_regs;
1717
1718 const struct regmap_irq *irqs;
1719 int num_irqs;
7a78479f 1720
faa87ce9
AM
1721 int num_config_bases;
1722 int num_config_regs;
ccc12561
LD
1723
1724 int (*handle_pre_irq)(void *irq_drv_data);
1725 int (*handle_post_irq)(void *irq_drv_data);
69da5aa9 1726 int (*handle_mask_sync)(int index, unsigned int mask_buf_def,
69af4bca 1727 unsigned int mask_buf, void *irq_drv_data);
faa87ce9 1728 int (*set_type_config)(unsigned int **buf, unsigned int type,
7697c64b
WBG
1729 const struct regmap_irq *irq_data, int idx,
1730 void *irq_drv_data);
bdf9b86c
AM
1731 unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
1732 unsigned int base, int index);
ccc12561 1733 void *irq_drv_data;
f8beab2b
MB
1734};
1735
bdf9b86c
AM
1736unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
1737 unsigned int base, int index);
faa87ce9 1738int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
7697c64b
WBG
1739 const struct regmap_irq *irq_data,
1740 int idx, void *irq_drv_data);
faa87ce9 1741
f8beab2b 1742int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 1743 int irq_base, const struct regmap_irq_chip *chip,
f8beab2b 1744 struct regmap_irq_chip_data **data);
5cc2013b
MW
1745int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
1746 struct regmap *map, int irq,
1747 int irq_flags, int irq_base,
1748 const struct regmap_irq_chip *chip,
1749 struct regmap_irq_chip_data **data);
f8beab2b 1750void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
045b9848
LD
1751
1752int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
1753 int irq_flags, int irq_base,
1754 const struct regmap_irq_chip *chip,
1755 struct regmap_irq_chip_data **data);
5cc2013b
MW
1756int devm_regmap_add_irq_chip_fwnode(struct device *dev,
1757 struct fwnode_handle *fwnode,
1758 struct regmap *map, int irq,
1759 int irq_flags, int irq_base,
1760 const struct regmap_irq_chip *chip,
1761 struct regmap_irq_chip_data **data);
045b9848
LD
1762void devm_regmap_del_irq_chip(struct device *dev, int irq,
1763 struct regmap_irq_chip_data *data);
1764
209a6006 1765int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 1766int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
90f790d2 1767struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
92afb286 1768
9cde5fcd
MB
1769#else
1770
1771/*
1772 * These stubs should only ever be called by generic code which has
1773 * regmap based facilities, if they ever get called at runtime
1774 * something is going wrong and something probably needs to select
1775 * REGMAP.
1776 */
1777
1778static inline int regmap_write(struct regmap *map, unsigned int reg,
1779 unsigned int val)
1780{
1781 WARN_ONCE(1, "regmap API is disabled");
1782 return -EINVAL;
1783}
1784
915f441b
MB
1785static inline int regmap_write_async(struct regmap *map, unsigned int reg,
1786 unsigned int val)
1787{
1788 WARN_ONCE(1, "regmap API is disabled");
1789 return -EINVAL;
1790}
1791
9cde5fcd
MB
1792static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
1793 const void *val, size_t val_len)
1794{
1795 WARN_ONCE(1, "regmap API is disabled");
1796 return -EINVAL;
1797}
1798
0d509f2b
MB
1799static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1800 const void *val, size_t val_len)
1801{
1802 WARN_ONCE(1, "regmap API is disabled");
1803 return -EINVAL;
1804}
1805
cdf6b11d
BW
1806static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
1807 const void *val, size_t val_len)
1808{
1809 WARN_ONCE(1, "regmap API is disabled");
1810 return -EINVAL;
1811}
1812
9cde5fcd
MB
1813static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
1814 const void *val, size_t val_count)
1815{
1816 WARN_ONCE(1, "regmap API is disabled");
1817 return -EINVAL;
1818}
1819
1820static inline int regmap_read(struct regmap *map, unsigned int reg,
1821 unsigned int *val)
1822{
1823 WARN_ONCE(1, "regmap API is disabled");
1824 return -EINVAL;
1825}
1826
70ee853e
RF
1827static inline int regmap_read_bypassed(struct regmap *map, unsigned int reg,
1828 unsigned int *val)
1829{
1830 WARN_ONCE(1, "regmap API is disabled");
1831 return -EINVAL;
1832}
1833
9cde5fcd
MB
1834static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
1835 void *val, size_t val_len)
1836{
1837 WARN_ONCE(1, "regmap API is disabled");
1838 return -EINVAL;
1839}
1840
74fe7b55
LC
1841static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
1842 void *val, size_t val_len)
1843{
1844 WARN_ONCE(1, "regmap API is disabled");
1845 return -EINVAL;
1846}
1847
9cde5fcd
MB
1848static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
1849 void *val, size_t val_count)
1850{
1851 WARN_ONCE(1, "regmap API is disabled");
1852 return -EINVAL;
1853}
1854
91d31b9f
KM
1855static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1856 unsigned int mask, unsigned int val,
1857 bool *change, bool async, bool force)
fd4b7286
KM
1858{
1859 WARN_ONCE(1, "regmap API is disabled");
1860 return -EINVAL;
1861}
1862
aa2ff9db
BG
1863static inline int regmap_set_bits(struct regmap *map,
1864 unsigned int reg, unsigned int bits)
1865{
1866 WARN_ONCE(1, "regmap API is disabled");
1867 return -EINVAL;
1868}
1869
1870static inline int regmap_clear_bits(struct regmap *map,
1871 unsigned int reg, unsigned int bits)
1872{
1873 WARN_ONCE(1, "regmap API is disabled");
1874 return -EINVAL;
1875}
1876
d1f4390d
BG
1877static inline int regmap_assign_bits(struct regmap *map, unsigned int reg,
1878 unsigned int bits, bool value)
1879{
1880 WARN_ONCE(1, "regmap API is disabled");
1881 return -EINVAL;
1882}
1883
aa2ff9db
BG
1884static inline int regmap_test_bits(struct regmap *map,
1885 unsigned int reg, unsigned int bits)
1886{
1887 WARN_ONCE(1, "regmap API is disabled");
1888 return -EINVAL;
1889}
1890
28972eaa
KM
1891static inline int regmap_field_update_bits_base(struct regmap_field *field,
1892 unsigned int mask, unsigned int val,
1893 bool *change, bool async, bool force)
915f441b
MB
1894{
1895 WARN_ONCE(1, "regmap API is disabled");
1896 return -EINVAL;
1897}
1898
e126edec
KM
1899static inline int regmap_fields_update_bits_base(struct regmap_field *field,
1900 unsigned int id,
1901 unsigned int mask, unsigned int val,
1902 bool *change, bool async, bool force)
915f441b
MB
1903{
1904 WARN_ONCE(1, "regmap API is disabled");
1905 return -EINVAL;
1906}
1907
4b9e7edb
BG
1908static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1909 unsigned int mask, unsigned int val)
1910{
1911 WARN_ONCE(1, "regmap API is disabled");
1912 return -EINVAL;
1913}
1914
1915static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1916 unsigned int mask, unsigned int val)
1917{
1918 WARN_ONCE(1, "regmap API is disabled");
1919 return -EINVAL;
1920}
1921
1922static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1923 unsigned int mask, unsigned int val,
1924 bool *change)
1925{
1926 WARN_ONCE(1, "regmap API is disabled");
1927 return -EINVAL;
1928}
1929
1930static inline int
1931regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1932 unsigned int mask, unsigned int val,
1933 bool *change)
1934{
1935 WARN_ONCE(1, "regmap API is disabled");
1936 return -EINVAL;
1937}
1938
1939static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1940 unsigned int mask, unsigned int val)
1941{
1942 WARN_ONCE(1, "regmap API is disabled");
1943 return -EINVAL;
1944}
1945
1946static inline int regmap_field_write(struct regmap_field *field,
1947 unsigned int val)
1948{
1949 WARN_ONCE(1, "regmap API is disabled");
1950 return -EINVAL;
1951}
1952
1953static inline int regmap_field_force_write(struct regmap_field *field,
1954 unsigned int val)
1955{
1956 WARN_ONCE(1, "regmap API is disabled");
1957 return -EINVAL;
1958}
1959
1960static inline int regmap_field_update_bits(struct regmap_field *field,
1961 unsigned int mask, unsigned int val)
1962{
1963 WARN_ONCE(1, "regmap API is disabled");
1964 return -EINVAL;
1965}
1966
1967static inline int
1968regmap_field_force_update_bits(struct regmap_field *field,
1969 unsigned int mask, unsigned int val)
1970{
1971 WARN_ONCE(1, "regmap API is disabled");
1972 return -EINVAL;
1973}
1974
f67be8b7
LC
1975static inline int regmap_field_set_bits(struct regmap_field *field,
1976 unsigned int bits)
1977{
1978 WARN_ONCE(1, "regmap API is disabled");
1979 return -EINVAL;
1980}
1981
1982static inline int regmap_field_clear_bits(struct regmap_field *field,
1983 unsigned int bits)
1984{
1985 WARN_ONCE(1, "regmap API is disabled");
1986 return -EINVAL;
1987}
1988
1989static inline int regmap_field_test_bits(struct regmap_field *field,
1990 unsigned int bits)
1991{
1992 WARN_ONCE(1, "regmap API is disabled");
1993 return -EINVAL;
1994}
1995
4b9e7edb
BG
1996static inline int regmap_fields_write(struct regmap_field *field,
1997 unsigned int id, unsigned int val)
1998{
1999 WARN_ONCE(1, "regmap API is disabled");
2000 return -EINVAL;
2001}
2002
2003static inline int regmap_fields_force_write(struct regmap_field *field,
2004 unsigned int id, unsigned int val)
2005{
2006 WARN_ONCE(1, "regmap API is disabled");
2007 return -EINVAL;
2008}
2009
2010static inline int
2011regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
2012 unsigned int mask, unsigned int val)
2013{
2014 WARN_ONCE(1, "regmap API is disabled");
2015 return -EINVAL;
2016}
2017
2018static inline int
2019regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
2020 unsigned int mask, unsigned int val)
2021{
2022 WARN_ONCE(1, "regmap API is disabled");
2023 return -EINVAL;
2024}
2025
9cde5fcd
MB
2026static inline int regmap_get_val_bytes(struct regmap *map)
2027{
2028 WARN_ONCE(1, "regmap API is disabled");
2029 return -EINVAL;
2030}
2031
668abc72
SK
2032static inline int regmap_get_max_register(struct regmap *map)
2033{
2034 WARN_ONCE(1, "regmap API is disabled");
2035 return -EINVAL;
2036}
2037
a2f776cb
SK
2038static inline int regmap_get_reg_stride(struct regmap *map)
2039{
2040 WARN_ONCE(1, "regmap API is disabled");
2041 return -EINVAL;
2042}
2043
a6d99022
MW
2044static inline bool regmap_might_sleep(struct regmap *map)
2045{
2046 WARN_ONCE(1, "regmap API is disabled");
2047 return true;
2048}
2049
fd80df35
CK
2050static inline void regcache_sort_defaults(struct reg_default *defaults,
2051 unsigned int ndefaults)
2052{
2053 WARN_ONCE(1, "regmap API is disabled");
2054}
2055
9cde5fcd
MB
2056static inline int regcache_sync(struct regmap *map)
2057{
2058 WARN_ONCE(1, "regmap API is disabled");
2059 return -EINVAL;
2060}
2061
a313f9f5
MB
2062static inline int regcache_sync_region(struct regmap *map, unsigned int min,
2063 unsigned int max)
2064{
2065 WARN_ONCE(1, "regmap API is disabled");
2066 return -EINVAL;
2067}
2068
697e85bc
MB
2069static inline int regcache_drop_region(struct regmap *map, unsigned int min,
2070 unsigned int max)
2071{
2072 WARN_ONCE(1, "regmap API is disabled");
2073 return -EINVAL;
2074}
2075
9cde5fcd
MB
2076static inline void regcache_cache_only(struct regmap *map, bool enable)
2077{
2078 WARN_ONCE(1, "regmap API is disabled");
2079}
2080
2081static inline void regcache_cache_bypass(struct regmap *map, bool enable)
2082{
2083 WARN_ONCE(1, "regmap API is disabled");
2084}
2085
2086static inline void regcache_mark_dirty(struct regmap *map)
2087{
2088 WARN_ONCE(1, "regmap API is disabled");
2089}
2090
0d509f2b
MB
2091static inline void regmap_async_complete(struct regmap *map)
2092{
2093 WARN_ONCE(1, "regmap API is disabled");
2094}
2095
9cde5fcd 2096static inline int regmap_register_patch(struct regmap *map,
a6baa3de 2097 const struct reg_sequence *regs,
9cde5fcd
MB
2098 int num_regs)
2099{
2100 WARN_ONCE(1, "regmap API is disabled");
2101 return -EINVAL;
2102}
2103
13ff50c8
NC
2104static inline int regmap_parse_val(struct regmap *map, const void *buf,
2105 unsigned int *val)
2106{
2107 WARN_ONCE(1, "regmap API is disabled");
2108 return -EINVAL;
2109}
2110
72b39f6f
MB
2111static inline struct regmap *dev_get_regmap(struct device *dev,
2112 const char *name)
2113{
72b39f6f
MB
2114 return NULL;
2115}
2116
8d7d3972
TT
2117static inline struct device *regmap_get_device(struct regmap *map)
2118{
2119 WARN_ONCE(1, "regmap API is disabled");
1d33dc6b 2120 return NULL;
8d7d3972
TT
2121}
2122
9cde5fcd
MB
2123#endif
2124
b83a313b 2125#endif