[thirdparty/kernel/linux.git] / include / linux / sh_intc.h

#ifndef __SH_INTC_H
#define __SH_INTC_H

#include <linux/ioport.h>

typedef unsigned char intc_enum;

struct intc_vect {
	intc_enum enum_id;
	unsigned short vect;
};

#define INTC_VECT(enum_id, vect) { enum_id, vect }
#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))

struct intc_group {
	intc_enum enum_id;
	intc_enum enum_ids[32];
};

#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }

struct intc_mask_reg {
	unsigned long set_reg, clr_reg, reg_width;
	intc_enum enum_ids[32];
#ifdef CONFIG_INTC_BALANCING
	unsigned long dist_reg;
#endif
#ifdef CONFIG_SMP
	unsigned long smp;
#endif
};

struct intc_prio_reg {
	unsigned long set_reg, clr_reg, reg_width, field_width;
	intc_enum enum_ids[16];
#ifdef CONFIG_SMP
	unsigned long smp;
#endif
};

struct intc_sense_reg {
	unsigned long reg, reg_width, field_width;
	intc_enum enum_ids[16];
};

#ifdef CONFIG_INTC_BALANCING
#define INTC_SMP_BALANCING(reg)	.dist_reg = (reg)
#else
#define INTC_SMP_BALANCING(reg)
#endif

#ifdef CONFIG_SMP
#define INTC_SMP(stride, nr)	.smp = (stride) | ((nr) << 8)
#else
#define INTC_SMP(stride, nr)
#endif

struct intc_hw_desc {
	struct intc_vect *vectors;
	unsigned int nr_vectors;
	struct intc_group *groups;
	unsigned int nr_groups;
	struct intc_mask_reg *mask_regs;
	unsigned int nr_mask_regs;
	struct intc_prio_reg *prio_regs;
	unsigned int nr_prio_regs;
	struct intc_sense_reg *sense_regs;
	unsigned int nr_sense_regs;
	struct intc_mask_reg *ack_regs;
	unsigned int nr_ack_regs;
};

#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
#define INTC_HW_DESC(vectors, groups, mask_regs,	\
		     prio_regs,	sense_regs, ack_regs)	\
{							\
	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),	\
	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),	\
	_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs),	\
}

struct intc_desc {
	char *name;
	struct resource *resource;
	unsigned int num_resources;
	intc_enum force_enable;
	intc_enum force_disable;
	struct intc_hw_desc hw;
};

#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups,		\
	mask_regs, prio_regs, sense_regs)				\
struct intc_desc symbol __initdata = {					\
	.name = chipname,						\
	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
			   prio_regs, sense_regs, NULL),		\
}

#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups,	\
	mask_regs, prio_regs, sense_regs, ack_regs)			\
struct intc_desc symbol __initdata = {					\
	.name = chipname,						\
	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
			   prio_regs, sense_regs, ack_regs),		\
}

int __init register_intc_controller(struct intc_desc *desc);
void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs);
int intc_set_priority(unsigned int irq, unsigned int prio);
unsigned int intc_irq_lookup(const char *chipname, intc_enum enum_id);

#ifdef CONFIG_INTC_USERIMASK
int register_intc_userimask(unsigned long addr);
#else
static inline int register_intc_userimask(unsigned long addr)
{
	return 0;
}
#endif

int reserve_irq_vector(unsigned int irq);
void reserve_irq_legacy(void);

#endif /* __SH_INTC_H */
Commit	Line	Data
bbfbd8b1 PM	1	#ifndef __SH_INTC_H
	2	#define __SH_INTC_H
	3
dec710b7 MD	4	#include <linux/ioport.h>
dec710b7 MD	5
bbfbd8b1 PM	6	typedef unsigned char intc_enum;
	7
	8	struct intc_vect {
	9	intc_enum enum_id;
	10	unsigned short vect;
	11	};
	12
	13	#define INTC_VECT(enum_id, vect) { enum_id, vect }
	14	#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
	15
	16	struct intc_group {
	17	intc_enum enum_id;
	18	intc_enum enum_ids[32];
	19	};
	20
	21	#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
	22
	23	struct intc_mask_reg {
	24	unsigned long set_reg, clr_reg, reg_width;
	25	intc_enum enum_ids[32];
dc825b17 PM	26	#ifdef CONFIG_INTC_BALANCING
	27	unsigned long dist_reg;
	28	#endif
bbfbd8b1 PM	29	#ifdef CONFIG_SMP
	30	unsigned long smp;
	31	#endif
	32	};
	33
	34	struct intc_prio_reg {
	35	unsigned long set_reg, clr_reg, reg_width, field_width;
	36	intc_enum enum_ids[16];
	37	#ifdef CONFIG_SMP
	38	unsigned long smp;
	39	#endif
	40	};
	41
	42	struct intc_sense_reg {
	43	unsigned long reg, reg_width, field_width;
	44	intc_enum enum_ids[16];
	45	};
	46
dc825b17 PM	47	#ifdef CONFIG_INTC_BALANCING
	48	#define INTC_SMP_BALANCING(reg) .dist_reg = (reg)
	49	#else
	50	#define INTC_SMP_BALANCING(reg)
	51	#endif
	52
bbfbd8b1	53	#ifdef CONFIG_SMP
dc825b17	54	#define INTC_SMP(stride, nr) .smp = (stride) \| ((nr) << 8)
bbfbd8b1 PM	55	#else
	56	#define INTC_SMP(stride, nr)
	57	#endif
	58
577cd758	59	struct intc_hw_desc {
bbfbd8b1 PM	60	struct intc_vect *vectors;
	61	unsigned int nr_vectors;
	62	struct intc_group *groups;
	63	unsigned int nr_groups;
	64	struct intc_mask_reg *mask_regs;
	65	unsigned int nr_mask_regs;
	66	struct intc_prio_reg *prio_regs;
	67	unsigned int nr_prio_regs;
	68	struct intc_sense_reg *sense_regs;
	69	unsigned int nr_sense_regs;
bbfbd8b1 PM	70	struct intc_mask_reg *ack_regs;
bbfbd8b1 PM	71	unsigned int nr_ack_regs;
bbfbd8b1 PM	72	};
	73
	74	#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
577cd758 MD	75	#define INTC_HW_DESC(vectors, groups, mask_regs, \
	76	prio_regs, sense_regs, ack_regs) \
	77	{ \
	78	_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
	79	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
	80	_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
	81	}
	82
	83	struct intc_desc {
	84	char *name;
dec710b7 MD	85	struct resource *resource;
dec710b7 MD	86	unsigned int num_resources;
d5190953	87	intc_enum force_enable;
d85429a3	88	intc_enum force_disable;
577cd758 MD	89	struct intc_hw_desc hw;
	90	};
	91
bbfbd8b1 PM	92	#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
	93	mask_regs, prio_regs, sense_regs) \
	94	struct intc_desc symbol __initdata = { \
577cd758 MD	95	.name = chipname, \
	96	.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
	97	prio_regs, sense_regs, NULL), \
bbfbd8b1 PM	98	}
bbfbd8b1 PM	99
bbfbd8b1 PM	100	#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
	101	mask_regs, prio_regs, sense_regs, ack_regs) \
	102	struct intc_desc symbol __initdata = { \
577cd758 MD	103	.name = chipname, \
	104	.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
	105	prio_regs, sense_regs, ack_regs), \
bbfbd8b1	106	}
bbfbd8b1	107
01e9651a	108	int __init register_intc_controller(struct intc_desc *desc);
4bacd796	109	void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs);
bbfbd8b1	110	int intc_set_priority(unsigned int irq, unsigned int prio);
44629f57	111	unsigned int intc_irq_lookup(const char *chipname, intc_enum enum_id);
bbfbd8b1	112
43b8774d PM	113	#ifdef CONFIG_INTC_USERIMASK
	114	int register_intc_userimask(unsigned long addr);
	115	#else
	116	static inline int register_intc_userimask(unsigned long addr)
	117	{
	118	return 0;
	119	}
	120	#endif
	121
45b9deaf PM	122	int reserve_irq_vector(unsigned int irq);
	123	void reserve_irq_legacy(void);
	124
bbfbd8b1	125	#endif /* __SH_INTC_H */