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1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef __USB_TYPEC_DP_H | |
3 | #define __USB_TYPEC_DP_H | |
4 | ||
5 | #include <linux/usb/typec_altmode.h> | |
d2824078 | 6 | #include <linux/bitfield.h> |
0e3bb7d6 HK |
7 | |
8 | #define USB_TYPEC_DP_SID 0xff01 | |
cf28369c AG |
9 | /* USB IF has not assigned a Standard ID (SID) for VirtualLink, |
10 | * so the manufacturers of VirtualLink adapters use their Vendor | |
11 | * IDs as the SVID. | |
12 | */ | |
13 | #define USB_TYPEC_NVIDIA_VLINK_SID 0x955 /* NVIDIA VirtualLink */ | |
0e3bb7d6 HK |
14 | #define USB_TYPEC_DP_MODE 1 |
15 | ||
16 | /* | |
17 | * Connector states matching the pin assignments in DisplayPort Alt Mode | |
18 | * Specification. | |
19 | * | |
20 | * These values are meant primarily to be used by the mux drivers, but they are | |
21 | * also used as the "value" part in the alternate mode notification chain, so | |
22 | * receivers of those notifications will always see them. | |
23 | * | |
24 | * Note. DisplayPort USB Type-C Alt Mode Specification version 1.0b deprecated | |
25 | * pin assignments A, B and F, but they are still defined here for legacy | |
26 | * purposes. | |
27 | */ | |
28 | enum { | |
29 | TYPEC_DP_STATE_A = TYPEC_STATE_MODAL, /* Not supported after v1.0b */ | |
30 | TYPEC_DP_STATE_B, /* Not supported after v1.0b */ | |
31 | TYPEC_DP_STATE_C, | |
32 | TYPEC_DP_STATE_D, | |
33 | TYPEC_DP_STATE_E, | |
34 | TYPEC_DP_STATE_F, /* Not supported after v1.0b */ | |
35 | }; | |
36 | ||
37 | /* | |
38 | * struct typec_displayport_data - DisplayPort Alt Mode specific data | |
39 | * @status: Status Update command VDO content | |
40 | * @conf: Configure command VDO content | |
41 | * | |
42 | * This structure is delivered as the data part with the notifications. It | |
43 | * contains the VDOs from the two DisplayPort Type-C alternate mode specific | |
44 | * commands: Status Update and Configure. | |
45 | * | |
46 | * @status will show for example the status of the HPD signal. | |
47 | */ | |
48 | struct typec_displayport_data { | |
49 | u32 status; | |
50 | u32 conf; | |
51 | }; | |
52 | ||
53 | enum { | |
54 | DP_PIN_ASSIGN_A, /* Not supported after v1.0b */ | |
55 | DP_PIN_ASSIGN_B, /* Not supported after v1.0b */ | |
56 | DP_PIN_ASSIGN_C, | |
57 | DP_PIN_ASSIGN_D, | |
58 | DP_PIN_ASSIGN_E, | |
59 | DP_PIN_ASSIGN_F, /* Not supported after v1.0b */ | |
60 | }; | |
61 | ||
62 | /* DisplayPort alt mode specific commands */ | |
63 | #define DP_CMD_STATUS_UPDATE VDO_CMD_VENDOR(0) | |
64 | #define DP_CMD_CONFIGURE VDO_CMD_VENDOR(1) | |
65 | ||
66 | /* DisplayPort Capabilities VDO bits (returned with Discover Modes) */ | |
67 | #define DP_CAP_CAPABILITY(_cap_) ((_cap_) & 3) | |
68 | #define DP_CAP_UFP_D 1 | |
69 | #define DP_CAP_DFP_D 2 | |
70 | #define DP_CAP_DFP_D_AND_UFP_D 3 | |
d2824078 | 71 | #define DP_CAP_DP_SIGNALLING(_cap_) FIELD_GET(GENMASK(5, 2), _cap_) |
a17fae8f UP |
72 | #define DP_CAP_SIGNALLING_HBR3 1 |
73 | #define DP_CAP_SIGNALLING_UHBR10 2 | |
74 | #define DP_CAP_SIGNALLING_UHBR20 3 | |
0e3bb7d6 HK |
75 | #define DP_CAP_RECEPTACLE BIT(6) |
76 | #define DP_CAP_USB BIT(7) | |
d2824078 ON |
77 | #define DP_CAP_DFP_D_PIN_ASSIGN(_cap_) FIELD_GET(GENMASK(15, 8), _cap_) |
78 | #define DP_CAP_UFP_D_PIN_ASSIGN(_cap_) FIELD_GET(GENMASK(23, 16), _cap_) | |
c1e5c2f0 PS |
79 | /* Get pin assignment taking plug & receptacle into consideration */ |
80 | #define DP_CAP_PIN_ASSIGN_UFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \ | |
81 | DP_CAP_UFP_D_PIN_ASSIGN(_cap_) : DP_CAP_DFP_D_PIN_ASSIGN(_cap_)) | |
82 | #define DP_CAP_PIN_ASSIGN_DFP_D(_cap_) ((_cap_ & DP_CAP_RECEPTACLE) ? \ | |
83 | DP_CAP_DFP_D_PIN_ASSIGN(_cap_) : DP_CAP_UFP_D_PIN_ASSIGN(_cap_)) | |
a17fae8f | 84 | #define DP_CAP_UHBR_13_5_SUPPORT BIT(26) |
d2824078 | 85 | #define DP_CAP_CABLE_TYPE(_cap_) FIELD_GET(GENMASK(29, 28), _cap_) |
a17fae8f UP |
86 | #define DP_CAP_CABLE_TYPE_PASSIVE 0 |
87 | #define DP_CAP_CABLE_TYPE_RE_TIMER 1 | |
88 | #define DP_CAP_CABLE_TYPE_RE_DRIVER 2 | |
89 | #define DP_CAP_CABLE_TYPE_OPTICAL 3 | |
90 | #define DP_CAP_DPAM_VERSION BIT(30) | |
0e3bb7d6 HK |
91 | |
92 | /* DisplayPort Status Update VDO bits */ | |
93 | #define DP_STATUS_CONNECTION(_status_) ((_status_) & 3) | |
94 | #define DP_STATUS_CON_DISABLED 0 | |
95 | #define DP_STATUS_CON_DFP_D 1 | |
96 | #define DP_STATUS_CON_UFP_D 2 | |
97 | #define DP_STATUS_CON_BOTH 3 | |
98 | #define DP_STATUS_POWER_LOW BIT(2) | |
99 | #define DP_STATUS_ENABLED BIT(3) | |
100 | #define DP_STATUS_PREFER_MULTI_FUNC BIT(4) | |
101 | #define DP_STATUS_SWITCH_TO_USB BIT(5) | |
102 | #define DP_STATUS_EXIT_DP_MODE BIT(6) | |
103 | #define DP_STATUS_HPD_STATE BIT(7) /* 0 = HPD_Low, 1 = HPD_High */ | |
104 | #define DP_STATUS_IRQ_HPD BIT(8) | |
105 | ||
106 | /* DisplayPort Configurations VDO bits */ | |
107 | #define DP_CONF_CURRENTLY(_conf_) ((_conf_) & 3) | |
108 | #define DP_CONF_UFP_U_AS_DFP_D BIT(0) | |
109 | #define DP_CONF_UFP_U_AS_UFP_D BIT(1) | |
a17fae8f UP |
110 | #define DP_CONF_SIGNALLING_MASK GENMASK(5, 2) |
111 | #define DP_CONF_SIGNALLING_SHIFT 2 | |
112 | #define DP_CONF_SIGNALLING_HBR3 1 | |
113 | #define DP_CONF_SIGNALLING_UHBR10 2 | |
114 | #define DP_CONF_SIGNALLING_UHBR20 3 | |
0e3bb7d6 HK |
115 | #define DP_CONF_PIN_ASSIGNEMENT_SHIFT 8 |
116 | #define DP_CONF_PIN_ASSIGNEMENT_MASK GENMASK(15, 8) | |
117 | ||
24bb0076 | 118 | /* Helper for setting/getting the pin assignment value to the configuration */ |
382e8fa8 | 119 | #define DP_CONF_SET_PIN_ASSIGN(_a_) ((_a_) << 8) |
d2824078 | 120 | #define DP_CONF_GET_PIN_ASSIGN(_conf_) FIELD_GET(GENMASK(15, 8), _conf_) |
a17fae8f UP |
121 | #define DP_CONF_UHBR13_5_SUPPORT BIT(26) |
122 | #define DP_CONF_CABLE_TYPE_MASK GENMASK(29, 28) | |
123 | #define DP_CONF_CABLE_TYPE_SHIFT 28 | |
124 | #define DP_CONF_CABLE_TYPE_PASSIVE 0 | |
125 | #define DP_CONF_CABLE_TYPE_RE_TIMER 1 | |
126 | #define DP_CONF_CABLE_TYPE_RE_DRIVER 2 | |
127 | #define DP_CONF_CABLE_TYPE_OPTICAL 3 | |
128 | #define DP_CONF_DPAM_VERSION BIT(30) | |
382e8fa8 | 129 | |
0e3bb7d6 | 130 | #endif /* __USB_TYPEC_DP_H */ |