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arm: mvebu: Move CONFIG_SYS_TEXT_BASE to an address < 16 MiB
[people/ms/u-boot.git] / include / mc13892.h
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1/*
2 * (C) Copyright 2010
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
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8 */
9
10
11#ifndef __MC13892_H__
12#define __MC13892_H__
13
14/* REG_CHARGE */
15
888b4f43 16#define VCHRG0 (1 << 0)
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17#define VCHRG1 (1 << 1)
18#define VCHRG2 (1 << 2)
19#define ICHRG0 (1 << 3)
20#define ICHRG1 (1 << 4)
21#define ICHRG2 (1 << 5)
22#define ICHRG3 (1 << 6)
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SG
23#define TREN (1 << 7)
24#define ACKLPB (1 << 8)
25#define THCHKB (1 << 9)
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26#define FETOVRD (1 << 10)
27#define FETCTRL (1 << 11)
28#define RVRSMODE (1 << 13)
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29#define PLIM0 (1 << 15)
30#define PLIM1 (1 << 16)
31#define PLIMDIS (1 << 17)
d3588a55 32#define CHRGLEDEN (1 << 18)
888b4f43 33#define CHGTMRRST (1 << 19)
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34#define CHGRESTART (1 << 20)
35#define CHGAUTOB (1 << 21)
36#define CYCLB (1 << 22)
37#define CHGAUTOVIB (1 << 23)
38
39/* REG_SETTING_0/1 */
40#define VO_1_20V 0
41#define VO_1_30V 1
42#define VO_1_50V 2
43#define VO_1_80V 3
44#define VO_1_10V 4
45#define VO_2_00V 5
46#define VO_2_77V 6
47#define VO_2_40V 7
48
49#define VIOL 2
50#define VDIG 4
51#define VGEN 6
52
53/* SWxMode for Normal/Standby Mode */
54#define SWMODE_OFF_OFF 0
55#define SWMODE_PWM_OFF 1
56#define SWMODE_PWMPS_OFF 2
57#define SWMODE_PFM_OFF 3
58#define SWMODE_AUTO_OFF 4
59#define SWMODE_PWM_PWM 5
60#define SWMODE_PWM_AUTO 6
61#define SWMODE_AUTO_AUTO 8
62#define SWMODE_PWM_PWMPS 9
63#define SWMODE_PWMS_PWMPS 10
64#define SWMODE_PWMS_AUTO 11
65#define SWMODE_AUTO_PFM 12
66#define SWMODE_PWM_PFM 13
67#define SWMODE_PWMS_PFM 14
68#define SWMODE_PFM_PFM 15
69#define SWMODE_MASK 0x0F
70
71#define SWMODE1_SHIFT 0
72#define SWMODE2_SHIFT 10
73#define SWMODE3_SHIFT 0
74#define SWMODE4_SHIFT 8
75
76/* Fields in REG_SETTING_1 */
77#define VVIDEO_2_7 (0 << 2)
78#define VVIDEO_2_775 (1 << 2)
79#define VVIDEO_2_5 (2 << 2)
80#define VVIDEO_2_6 (3 << 2)
81#define VVIDEO_MASK (3 << 2)
82#define VAUDIO_2_3 (0 << 4)
83#define VAUDIO_2_5 (1 << 4)
84#define VAUDIO_2_775 (2 << 4)
85#define VAUDIO_3_0 (3 << 4)
86#define VAUDIO_MASK (3 << 4)
87#define VSD_1_8 (0 << 6)
88#define VSD_2_0 (1 << 6)
89#define VSD_2_6 (2 << 6)
90#define VSD_2_7 (3 << 6)
91#define VSD_2_8 (4 << 6)
92#define VSD_2_9 (5 << 6)
93#define VSD_3_0 (6 << 6)
94#define VSD_3_15 (7 << 6)
95#define VSD_MASK (7 << 6)
96#define VGEN1_1_2 0
97#define VGEN1_1_5 1
98#define VGEN1_2_775 2
99#define VGEN1_3_15 3
100#define VGEN1_MASK 3
101#define VGEN2_1_2 (0 << 6)
102#define VGEN2_1_5 (1 << 6)
103#define VGEN2_1_6 (2 << 6)
104#define VGEN2_1_8 (3 << 6)
105#define VGEN2_2_7 (4 << 6)
106#define VGEN2_2_8 (5 << 6)
107#define VGEN2_3_0 (6 << 6)
108#define VGEN2_3_15 (7 << 6)
109#define VGEN2_MASK (7 << 6)
110
111/* Fields in REG_SETTING_1 */
112#define VGEN3_1_8 (0 << 14)
113#define VGEN3_2_9 (1 << 14)
114#define VGEN3_MASK (1 << 14)
115#define VDIG_1_05 (0 << 4)
116#define VDIG_1_25 (1 << 4)
117#define VDIG_1_65 (2 << 4)
118#define VDIG_1_8 (3 << 4)
119#define VDIG_MASK (3 << 4)
120#define VCAM_2_5 (0 << 16)
121#define VCAM_2_6 (1 << 16)
122#define VCAM_2_75 (2 << 16)
123#define VCAM_3_0 (3 << 16)
124#define VCAM_MASK (3 << 16)
125
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126/* Reg Mode 0 */
127#define VGEN1EN (1 << 0)
128#define VGEN1STBY (1 << 1)
129#define VGEN1MODE (1 << 2)
130#define VIOHIEN (1 << 3)
131#define VIOHISTBY (1 << 4)
132#define VDIGEN (1 << 9)
133#define VDIGSTBY (1 << 10)
134#define VGEN2EN (1 << 12)
135#define VGEN2STBY (1 << 13)
136#define VGEN2MODE (1 << 14)
137#define VPLLEN (1 << 15)
138#define VPLLSTBY (1 << 16)
139#define VUSBEN (1 << 18)
140#define VUSBSTBY (1 << 19)
141
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142/* Reg Mode 1 */
143#define VGEN3EN (1 << 0)
144#define VGEN3STBY (1 << 1)
145#define VGEN3MODE (1 << 2)
146#define VGEN3CONFIG (1 << 3)
147#define VCAMEN (1 << 6)
148#define VCAMSTBY (1 << 7)
149#define VCAMMODE (1 << 8)
150#define VCAMCONFIG (1 << 9)
151#define VVIDEOEN (1 << 12)
152#define VIDEOSTBY (1 << 13)
153#define VVIDEOMODE (1 << 14)
154#define VAUDIOEN (1 << 15)
155#define VAUDIOSTBY (1 << 16)
156#define VSDEN (1 << 18)
157#define VSDSTBY (1 << 19)
158#define VSDMODE (1 << 20)
159
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160/* Reg Power Control 2*/
161#define WDIRESET (1 << 12)
162
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163/* SWx Output Volts */
164#define SWX_OUT_MASK 0x1F
165#define SWX_OUT_1_25 0x1A
166#define SWX_OUT_1_30 0X1C
167
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168/* Buck Switchers (SW1,2,3,4) Output Voltage */
169/*
170 * NOTE: These values are for SWxHI = 0,
171 * SWxHI = 1 adds 0.5V to the desired voltage
172 */
173#define SWx_0_600V 0
174#define SWx_0_625V 1
175#define SWx_0_650V 2
176#define SWx_0_675V 3
177#define SWx_0_700V 4
178#define SWx_0_725V 5
179#define SWx_0_750V 6
180#define SWx_0_775V 7
181#define SWx_0_800V 8
182#define SWx_0_825V 9
183#define SWx_0_850V 10
184#define SWx_0_875V 11
185#define SWx_0_900V 12
186#define SWx_0_925V 13
187#define SWx_0_950V 14
188#define SWx_0_975V 15
189#define SWx_1_000V 16
190#define SWx_1_025V 17
191#define SWx_1_050V 18
192#define SWx_1_075V 19
193#define SWx_1_100V 20
194#define SWx_1_125V 21
195#define SWx_1_150V 22
196#define SWx_1_175V 23
197#define SWx_1_200V 24
198#define SWx_1_225V 25
199#define SWx_1_250V 26
200#define SWx_1_275V 27
201#define SWx_1_300V 28
202#define SWx_1_325V 29
203#define SWx_1_350V 30
204#define SWx_1_375V 31
205#define SWx_VOLT_MASK 0x1F
206
d3588a55 207#endif