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214ec6bb 1/*----------------------------------------------------------------------------+
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2| This source code is dual-licensed. You may use it under the terms of the
3| GNU General Public License version 2, or under the license below.
214ec6bb 4|
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5| This source code has been made available to you by IBM on an AS-IS
6| basis. Anyone receiving this source is licensed under IBM
7| copyrights to use it in any way he or she deems fit, including
8| copying it, modifying it, compiling it, and redistributing it either
9| with or without modifications. No license under IBM patents or
10| patent applications is to be implied by the copyright license.
214ec6bb 11|
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12| Any user of this software should understand that IBM cannot provide
13| technical support for this software and will not be responsible for
14| any consequences resulting from the use of this software.
214ec6bb 15|
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16| Any person who transfers this source code or any derivative work
17| must include the IBM copyright notice, this paragraph, and the
18| preceding two paragraphs in the transferred software.
214ec6bb 19|
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20| COPYRIGHT I B M CORPORATION 1999
21| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
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22|
23| Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
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24+----------------------------------------------------------------------------*/
25/*----------------------------------------------------------------------------+
26|
65bd0e28 27| File Name: miiphy.h
214ec6bb 28|
65bd0e28 29| Function: Include file defining PHY registers.
214ec6bb 30|
65bd0e28 31| Author: Mark Wisner
214ec6bb 32|
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33+----------------------------------------------------------------------------*/
34#ifndef _miiphy_h_
35#define _miiphy_h_
36
5f184715 37#include <common.h>
8ef583a0 38#include <linux/mii.h>
5f184715 39#include <linux/list.h>
63ff004c 40#include <net.h>
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41#include <phy.h>
42
43struct legacy_mii_dev {
44 int (*read)(const char *devname, unsigned char addr,
f915c931 45 unsigned char reg, unsigned short *value);
5f184715 46 int (*write)(const char *devname, unsigned char addr,
f915c931 47 unsigned char reg, unsigned short value);
5f184715 48};
214ec6bb 49
f915c931 50int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
298035df 51 unsigned short *value);
f915c931 52int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
298035df 53 unsigned short value);
16a53238 54int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
298035df 55 unsigned char *model, unsigned char *rev);
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56int miiphy_reset(const char *devname, unsigned char addr);
57int miiphy_speed(const char *devname, unsigned char addr);
58int miiphy_duplex(const char *devname, unsigned char addr);
59int miiphy_is_1000base_x(const char *devname, unsigned char addr);
6d0f6bcf 60#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
16a53238 61int miiphy_link(const char *devname, unsigned char addr);
fc3e2165 62#endif
214ec6bb 63
16a53238 64void miiphy_init(void);
d9785c14 65
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66void miiphy_register(const char *devname,
67 int (*read)(const char *devname, unsigned char addr,
f915c931 68 unsigned char reg, unsigned short *value),
16a53238 69 int (*write)(const char *devname, unsigned char addr,
f915c931 70 unsigned char reg, unsigned short value));
63ff004c 71
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72int miiphy_set_current_dev(const char *devname);
73const char *miiphy_get_current_dev(void);
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74struct mii_dev *mdio_get_current_dev(void);
75struct mii_dev *miiphy_get_dev_by_name(const char *devname);
76struct phy_device *mdio_phydev_for_ethname(const char *devname);
63ff004c 77
16a53238 78void miiphy_listdev(void);
63ff004c 79
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80struct mii_dev *mdio_alloc(void);
81int mdio_register(struct mii_dev *bus);
82void mdio_list_devices(void);
83
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84#ifdef CONFIG_BITBANGMII
85
86#define BB_MII_DEVNAME "bb_miiphy"
87
88struct bb_miiphy_bus {
f6add132 89 char name[16];
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90 int (*init)(struct bb_miiphy_bus *bus);
91 int (*mdio_active)(struct bb_miiphy_bus *bus);
92 int (*mdio_tristate)(struct bb_miiphy_bus *bus);
93 int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
94 int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
95 int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
96 int (*delay)(struct bb_miiphy_bus *bus);
97#ifdef CONFIG_BITBANGMII_MULTI
98 void *priv;
99#endif
100};
101
102extern struct bb_miiphy_bus bb_miiphy_buses[];
103extern int bb_miiphy_buses_num;
63ff004c 104
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105void bb_miiphy_init(void);
106int bb_miiphy_read(const char *devname, unsigned char addr,
298035df 107 unsigned char reg, unsigned short *value);
16a53238 108int bb_miiphy_write(const char *devname, unsigned char addr,
298035df 109 unsigned char reg, unsigned short value);
4ba31ab3 110#endif
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111
112/* phy seed setup */
65bd0e28 113#define AUTO 99
298035df 114#define _1000BASET 1000
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115#define _100BASET 100
116#define _10BASET 10
117#define HALF 22
118#define FULL 44
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119
120/* phy register offsets */
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121#define MII_MIPSCR 0x11
122
123/* MII_LPA */
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124#define PHY_ANLPAR_PSB_802_3 0x0001
125#define PHY_ANLPAR_PSB_802_9 0x0002
126
8ef583a0 127/* MII_CTRL1000 masks */
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128#define PHY_1000BTCR_1000FD 0x0200
129#define PHY_1000BTCR_1000HD 0x0100
130
8ef583a0 131/* MII_STAT1000 masks */
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132#define PHY_1000BTSR_MSCF 0x8000
133#define PHY_1000BTSR_MSCR 0x4000
134#define PHY_1000BTSR_LRS 0x2000
135#define PHY_1000BTSR_RRS 0x1000
136#define PHY_1000BTSR_1000FD 0x0800
137#define PHY_1000BTSR_1000HD 0x0400
855a496f 138
71bc6e64 139/* phy EXSR */
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140#define ESTATUS_1000XF 0x8000
141#define ESTATUS_1000XH 0x4000
71bc6e64 142
214ec6bb 143#endif