projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 012771d8 WD |
1 | /* |
| 2 | * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
| 3 | * Andreas Heppel <aheppel@sysgo.de> | |
| 4 | * | |
| 5 | * See file CREDITS for list of people who contributed to this | |
| 6 | * project. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License as | |
| 10 | * published by the Free Software Foundation; either version 2 of | |
| 11 | * the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 21 | * MA 02111-1307 USA | |
| 22 | */ | |
| 23 | ||
| 24 | /* | |
| 25 | * Date & Time support for the MK48T59 RTC | |
| 26 | */ | |
| 27 | ||
| 28 | ||
| 639221c7 | 29 | #if defined(CONFIG_RTC_MK48T59) && defined(CONFIG_CMD_DATE) |
| 012771d8 | 30 | |
| 6d0f6bcf | 31 | #define RTC_PORT_ADDR0 CONFIG_SYS_ISA_IO + 0x70 |
| 012771d8 | 32 | #define RTC_PORT_ADDR1 RTC_PORT_ADDR0 + 0x1 |
| 6d0f6bcf | 33 | #define RTC_PORT_DATA CONFIG_SYS_ISA_IO + 0x76 |
| 012771d8 WD |
34 | |
| 35 | /* RTC Offsets */ | |
| 36 | #define RTC_SECONDS 0x1FF9 | |
| 37 | #define RTC_MINUTES 0x1FFA | |
| 38 | #define RTC_HOURS 0x1FFB | |
| 39 | #define RTC_DAY_OF_WEEK 0x1FFC | |
| 40 | #define RTC_DAY_OF_MONTH 0x1FFD | |
| 41 | #define RTC_MONTH 0x1FFE | |
| 42 | #define RTC_YEAR 0x1FFF | |
| 43 | ||
| 44 | #define RTC_CONTROLA 0x1FF8 | |
| 45 | #define RTC_CA_WRITE 0x80 | |
| 46 | #define RTC_CA_READ 0x40 | |
| 47 | #define RTC_CA_CALIB_SIGN 0x20 | |
| 48 | #define RTC_CA_CALIB_MASK 0x1f | |
| 49 | ||
| 50 | #define RTC_CONTROLB 0x1FF9 | |
| 51 | #define RTC_CB_STOP 0x80 | |
| 52 | ||
| 53 | #define RTC_WATCHDOG 0x1FF7 | |
| 54 | #define RTC_WDS 0x80 | |
| 55 | #define RTC_WD_RB_16TH 0x0 | |
| 56 | #define RTC_WD_RB_4TH 0x1 | |
| 57 | #define RTC_WD_RB_1 0x2 | |
| 58 | #define RTC_WD_RB_4 0x3 | |
| 59 | ||
| 60 | void rtc_set_watchdog(short multi, short res); | |
| 61 | void *nvram_read(void *dest, const short src, size_t count); | |
| 62 | void nvram_write(short dest, const void *src, size_t count); | |
| 63 | ||
| 64 | #endif |