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9345943b SA |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * NXP GPMI NAND flash driver | |
4 | * | |
5 | * Copyright (C) 2018 Toradex | |
6 | * Authors: | |
7 | * Stefan Agner <stefan.agner@toradex.com> | |
8 | */ | |
9 | ||
68748340 | 10 | #include <linux/mtd/mtd.h> |
1cefed1e | 11 | #include <linux/mtd/rawnand.h> |
68748340 SA |
12 | #include <asm/cache.h> |
13 | #include <nand.h> | |
14 | #include <asm/mach-imx/dma.h> | |
90cce058 | 15 | #include <clk.h> |
68748340 SA |
16 | |
17 | /** | |
18 | * @gf_len: The length of Galois Field. (e.g., 13 or 14) | |
19 | * @ecc_strength: A number that describes the strength of the ECC | |
20 | * algorithm. | |
616f03da YL |
21 | * @ecc_chunk0_size: The size, in bytes, of a first ECC chunk. |
22 | * @ecc_chunkn_size: The size, in bytes, of a single ECC chunk after | |
23 | * the first chunk in the page. | |
68748340 SA |
24 | * @ecc_chunk_count: The number of ECC chunks in the page, |
25 | * @block_mark_byte_offset: The byte offset in the ECC-based page view at | |
26 | * which the underlying physical block mark appears. | |
27 | * @block_mark_bit_offset: The bit offset into the ECC-based page view at | |
28 | * which the underlying physical block mark appears. | |
616f03da YL |
29 | * @ecc_for_meta: The flag to indicate if there is a dedicate ecc |
30 | * for meta. | |
68748340 SA |
31 | */ |
32 | struct bch_geometry { | |
33 | unsigned int gf_len; | |
34 | unsigned int ecc_strength; | |
616f03da YL |
35 | unsigned int ecc_chunk0_size; |
36 | unsigned int ecc_chunkn_size; | |
68748340 SA |
37 | unsigned int ecc_chunk_count; |
38 | unsigned int block_mark_byte_offset; | |
39 | unsigned int block_mark_bit_offset; | |
616f03da | 40 | unsigned int ecc_for_meta; /* ECC for meta data */ |
68748340 SA |
41 | }; |
42 | ||
43 | struct mxs_nand_info { | |
44 | struct nand_chip chip; | |
45 | struct udevice *dev; | |
46 | unsigned int max_ecc_strength_supported; | |
90cce058 | 47 | int max_chain_delay; |
68748340 SA |
48 | bool use_minimum_ecc; |
49 | int cur_chip; | |
50 | ||
51 | uint32_t cmd_queue_len; | |
52 | uint32_t data_buf_size; | |
53 | struct bch_geometry bch_geometry; | |
54 | ||
55 | uint8_t *cmd_buf; | |
56 | uint8_t *data_buf; | |
57 | uint8_t *oob_buf; | |
58 | ||
59 | uint8_t marking_block_bad; | |
60 | uint8_t raw_oob_mode; | |
61 | ||
62 | struct mxs_gpmi_regs *gpmi_regs; | |
63 | struct mxs_bch_regs *bch_regs; | |
90cce058 | 64 | struct clk *gpmi_clk; |
68748340 SA |
65 | |
66 | /* Functions with altered behaviour */ | |
67 | int (*hooked_read_oob)(struct mtd_info *mtd, | |
68 | loff_t from, struct mtd_oob_ops *ops); | |
69 | int (*hooked_write_oob)(struct mtd_info *mtd, | |
70 | loff_t to, struct mtd_oob_ops *ops); | |
71 | int (*hooked_block_markbad)(struct mtd_info *mtd, | |
72 | loff_t ofs); | |
73 | ||
74 | /* DMA descriptors */ | |
75 | struct mxs_dma_desc **desc; | |
76 | uint32_t desc_index; | |
9ab5f221 IO |
77 | |
78 | /* Hardware BCH interface and randomizer */ | |
79 | u32 en_randomizer; | |
80 | u32 writesize; | |
81 | u32 oobsize; | |
82 | u32 bch_flash0layout0; | |
83 | u32 bch_flash0layout1; | |
84 | }; | |
85 | ||
86 | struct mxs_nand_layout { | |
87 | u32 nblocks; | |
88 | u32 meta_size; | |
89 | u32 data0_size; | |
90 | u32 ecc0; | |
91 | u32 datan_size; | |
92 | u32 eccn; | |
17282f45 | 93 | u32 gf_len; |
68748340 SA |
94 | }; |
95 | ||
96 | int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info); | |
9345943b | 97 | int mxs_nand_init_spl(struct nand_chip *nand); |
5346c31e | 98 | int mxs_nand_setup_ecc(struct mtd_info *mtd); |
9ab5f221 | 99 | |
bf9382ad HX |
100 | void mxs_nand_mode_fcb_62bit(struct mtd_info *mtd); |
101 | void mxs_nand_mode_fcb_40bit(struct mtd_info *mtd); | |
9ab5f221 IO |
102 | void mxs_nand_mode_normal(struct mtd_info *mtd); |
103 | u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd); | |
104 | u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd); | |
105 | void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l); |