[people/ms/u-boot.git] / include / pcmcia.h

/*
 * (C) Copyright 2000-2004
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef _PCMCIA_H
#define _PCMCIA_H

#include <common.h>
#include <config.h>

/*
 * Allow configuration to select PCMCIA slot,
 * or try to generate a useful default
 */
#if defined(CONFIG_CMD_PCMCIA) || \
    (defined(CONFIG_CMD_IDE) && \
	(defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )

#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)

					/* The RPX series use SLOT_B	*/
#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
# define CONFIG_PCMCIA_SLOT_B
#elif defined(CONFIG_ADS)		/* The ADS  board uses SLOT_A	*/
# define CONFIG_PCMCIA_SLOT_A
#elif defined(CONFIG_FADS)		/* The FADS series are a mess	*/
# if defined(CONFIG_MPC86x) || defined(CONFIG_MPC821)
#  define CONFIG_PCMCIA_SLOT_A
# else
#  define CONFIG_PCMCIA_SLOT_B
# endif
#elif defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx)
# define	CONFIG_PCMCIA_SLOT_B	/* The TQM8xxL use SLOT_B	*/
#elif defined(CONFIG_SPD823TS)		/* The SPD8xx  use SLOT_B	*/
# define CONFIG_PCMCIA_SLOT_B
#elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)	/* The IVM* use SLOT_A	*/
# define CONFIG_PCMCIA_SLOT_A
#elif defined(CONFIG_LWMON)		/* The LWMON  use SLOT_B	*/
# define CONFIG_PCMCIA_SLOT_B
#elif defined(CONFIG_ICU862)		/* The ICU862 use SLOT_B	*/
# define CONFIG_PCMCIA_SLOT_B
#elif defined(CONFIG_R360MPI)		/* The R360MPI use SLOT_B	*/
# define CONFIG_PCMCIA_SLOT_B
#elif defined(CONFIG_ATC)		/* The ATC use SLOT_A	*/
# define CONFIG_PCMCIA_SLOT_A
#elif defined(CONFIG_NETTA)
# define CONFIG_PCMCIA_SLOT_A
#elif defined(CONFIG_UC100)		/* The UC100 use SLOT_B	        */
# define CONFIG_PCMCIA_SLOT_B
#else
# error "PCMCIA Slot not configured"
#endif

#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */

/* Make sure exactly one slot is defined - we support only one for now */
#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
#error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
#endif
#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
#error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
#endif

#ifndef PCMCIA_SOCKETS_NO
#define PCMCIA_SOCKETS_NO	1
#endif
#ifndef PCMCIA_MEM_WIN_NO
#define PCMCIA_MEM_WIN_NO	4
#endif
#define PCMCIA_IO_WIN_NO	2

/* define _slot_ to be able to optimize macros */
#ifdef CONFIG_PCMCIA_SLOT_A
# define _slot_			0
# define PCMCIA_SLOT_MSG	"slot A"
# define PCMCIA_SLOT_x		PCMCIA_PSLOT_A
#else
# define _slot_			1
# define PCMCIA_SLOT_MSG	"slot B"
# define PCMCIA_SLOT_x		PCMCIA_PSLOT_B
#endif

/*
 * The TQM850L hardware has two pins swapped! Grrrrgh!
 */
#ifdef	CONFIG_TQM850L
#define __MY_PCMCIA_GCRX_CXRESET	PCMCIA_GCRX_CXOE
#define __MY_PCMCIA_GCRX_CXOE		PCMCIA_GCRX_CXRESET
#else
#define __MY_PCMCIA_GCRX_CXRESET	PCMCIA_GCRX_CXRESET
#define __MY_PCMCIA_GCRX_CXOE		PCMCIA_GCRX_CXOE
#endif

/*
 * This structure is used to address each window in the PCMCIA controller.
 *
 * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
 * after pcmcia_win_t[n]...
 */

typedef struct {
	ulong	br;
	ulong	or;
} pcmcia_win_t;

/*
 * Definitions for PCMCIA control registers to operate in IDE mode
 *
 * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
 * to be done later (depending on CPU clock)
 */

/* Window 0:
 *	Base: 0xFE100000	CS1
 *	Port Size:     2 Bytes
 *	Port Size:    16 Bit
 *	Common Memory Space
 */

#define CONFIG_SYS_PCMCIA_PBR0		0xFE100000
#define CONFIG_SYS_PCMCIA_POR0	    (	PCMCIA_BSIZE_2	\
			    |	PCMCIA_PPS_16	\
			    |	PCMCIA_PRS_MEM	\
			    |	PCMCIA_SLOT_x	\
			    |	PCMCIA_PV	\
			    )

/* Window 1:
 *	Base: 0xFE100080	CS1
 *	Port Size:     8 Bytes
 *	Port Size:     8 Bit
 *	Common Memory Space
 */

#define CONFIG_SYS_PCMCIA_PBR1		0xFE100080
#define CONFIG_SYS_PCMCIA_POR1	    (	PCMCIA_BSIZE_8	\
			    |	PCMCIA_PPS_8	\
			    |	PCMCIA_PRS_MEM	\
			    |	PCMCIA_SLOT_x	\
			    |	PCMCIA_PV	\
			    )

/* Window 2:
 *	Base: 0xFE100100	CS2
 *	Port Size:     8 Bytes
 *	Port Size:     8 Bit
 *	Common Memory Space
 */

#define CONFIG_SYS_PCMCIA_PBR2		0xFE100100
#define CONFIG_SYS_PCMCIA_POR2	    (	PCMCIA_BSIZE_8	\
			    |	PCMCIA_PPS_8	\
			    |	PCMCIA_PRS_MEM	\
			    |	PCMCIA_SLOT_x	\
			    |	PCMCIA_PV	\
			    )

/* Window 3:
 *	not used
 */
#define CONFIG_SYS_PCMCIA_PBR3		0
#define CONFIG_SYS_PCMCIA_POR3		0

/* Window 4:
 *	Base: 0xFE100C00	CS1
 *	Port Size:     2 Bytes
 *	Port Size:    16 Bit
 *	Common Memory Space
 */

#define CONFIG_SYS_PCMCIA_PBR4		0xFE100C00
#define CONFIG_SYS_PCMCIA_POR4	    (	PCMCIA_BSIZE_2	\
			    |	PCMCIA_PPS_16	\
			    |	PCMCIA_PRS_MEM	\
			    |	PCMCIA_SLOT_x	\
			    |	PCMCIA_PV	\
			    )

/* Window 5:
 *	Base: 0xFE100C80	CS1
 *	Port Size:     8 Bytes
 *	Port Size:     8 Bit
 *	Common Memory Space
 */

#define CONFIG_SYS_PCMCIA_PBR5		0xFE100C80
#define CONFIG_SYS_PCMCIA_POR5	    (	PCMCIA_BSIZE_8	\
			    |	PCMCIA_PPS_8	\
			    |	PCMCIA_PRS_MEM	\
			    |	PCMCIA_SLOT_x	\
			    |	PCMCIA_PV	\
			    )

/* Window 6:
 *	Base: 0xFE100D00	CS2
 *	Port Size:     8 Bytes
 *	Port Size:     8 Bit
 *	Common Memory Space
 */

#define CONFIG_SYS_PCMCIA_PBR6		0xFE100D00
#define CONFIG_SYS_PCMCIA_POR6	    (	PCMCIA_BSIZE_8	\
			    |	PCMCIA_PPS_8	\
			    |	PCMCIA_PRS_MEM	\
			    |	PCMCIA_SLOT_x	\
			    |	PCMCIA_PV	\
			    )

/* Window 7:
 *	not used
 */
#define CONFIG_SYS_PCMCIA_PBR7		0
#define CONFIG_SYS_PCMCIA_POR7		0

/**********************************************************************/

/*
 * CIS Tupel codes
 */
#define CISTPL_NULL		0x00
#define CISTPL_DEVICE		0x01
#define CISTPL_LONGLINK_CB	0x02
#define CISTPL_INDIRECT		0x03
#define CISTPL_CONFIG_CB	0x04
#define CISTPL_CFTABLE_ENTRY_CB 0x05
#define CISTPL_LONGLINK_MFC	0x06
#define CISTPL_BAR		0x07
#define CISTPL_PWR_MGMNT	0x08
#define CISTPL_EXTDEVICE	0x09
#define CISTPL_CHECKSUM		0x10
#define CISTPL_LONGLINK_A	0x11
#define CISTPL_LONGLINK_C	0x12
#define CISTPL_LINKTARGET	0x13
#define CISTPL_NO_LINK		0x14
#define CISTPL_VERS_1		0x15
#define CISTPL_ALTSTR		0x16
#define CISTPL_DEVICE_A		0x17
#define CISTPL_JEDEC_C		0x18
#define CISTPL_JEDEC_A		0x19
#define CISTPL_CONFIG		0x1a
#define CISTPL_CFTABLE_ENTRY	0x1b
#define CISTPL_DEVICE_OC	0x1c
#define CISTPL_DEVICE_OA	0x1d
#define CISTPL_DEVICE_GEO	0x1e
#define CISTPL_DEVICE_GEO_A	0x1f
#define CISTPL_MANFID		0x20
#define CISTPL_FUNCID		0x21
#define CISTPL_FUNCE		0x22
#define CISTPL_SWIL		0x23
#define CISTPL_END		0xff

/*
 * CIS Function ID codes
 */
#define CISTPL_FUNCID_MULTI	0x00
#define CISTPL_FUNCID_MEMORY	0x01
#define CISTPL_FUNCID_SERIAL	0x02
#define CISTPL_FUNCID_PARALLEL	0x03
#define CISTPL_FUNCID_FIXED	0x04
#define CISTPL_FUNCID_VIDEO	0x05
#define CISTPL_FUNCID_NETWORK	0x06
#define CISTPL_FUNCID_AIMS	0x07
#define CISTPL_FUNCID_SCSI	0x08

/*
 * Fixed Disk FUNCE codes
 */
#define CISTPL_IDE_INTERFACE	0x01

#define CISTPL_FUNCE_IDE_IFACE	0x01
#define CISTPL_FUNCE_IDE_MASTER	0x02
#define CISTPL_FUNCE_IDE_SLAVE	0x03

/* First feature byte */
#define CISTPL_IDE_SILICON	0x04
#define CISTPL_IDE_UNIQUE	0x08
#define CISTPL_IDE_DUAL		0x10

/* Second feature byte */
#define CISTPL_IDE_HAS_SLEEP	0x01
#define CISTPL_IDE_HAS_STANDBY	0x02
#define CISTPL_IDE_HAS_IDLE	0x04
#define CISTPL_IDE_LOW_POWER	0x08
#define CISTPL_IDE_REG_INHIBIT	0x10
#define CISTPL_IDE_HAS_INDEX	0x20
#define CISTPL_IDE_IOIS16	0x40

#endif

#ifdef	CONFIG_8xx
extern u_int *pcmcia_pgcrx[];
#define	PCMCIA_PGCRX(slot)	(*pcmcia_pgcrx[slot])
#endif

#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
extern int check_ide_device(int slot);
#endif

#endif /* _PCMCIA_H */
Commit	Line	Data
affae2bf	1	/*
04a85b3b	2	* (C) Copyright 2000-2004
affae2bf WD	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	#ifndef _PCMCIA_H
	25	#define _PCMCIA_H
	26
	27	#include <common.h>
	28	#include <config.h>
	29
	30	/*
	31	* Allow configuration to select PCMCIA slot,
	32	* or try to generate a useful default
	33	*/
639221c7 JL	34	#if defined(CONFIG_CMD_PCMCIA) \|\| \
639221c7 JL	35	(defined(CONFIG_CMD_IDE) && \
affae2bf WD	36	(defined(CONFIG_IDE_8xx_PCCARD) \|\| defined(CONFIG_IDE_8xx_DIRECT) ) )
	37
	38	#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
	39
	40	/* The RPX series use SLOT_B */
	41	#if defined(CONFIG_RPXCLASSIC) \|\| defined(CONFIG_RPXLITE)
	42	# define CONFIG_PCMCIA_SLOT_B
180d3f74	43	#elif defined(CONFIG_ADS) /* The ADS board uses SLOT_A */
affae2bf WD	44	# define CONFIG_PCMCIA_SLOT_A
affae2bf WD	45	#elif defined(CONFIG_FADS) /* The FADS series are a mess */
180d3f74	46	# if defined(CONFIG_MPC86x) \|\| defined(CONFIG_MPC821)
affae2bf WD	47	# define CONFIG_PCMCIA_SLOT_A
	48	# else
	49	# define CONFIG_PCMCIA_SLOT_B
	50	# endif
dc7c9a1a	51	#elif defined(CONFIG_TQM8xxL) \|\| defined(CONFIG_SVM_SC8xx)
affae2bf WD	52	# define CONFIG_PCMCIA_SLOT_B /* The TQM8xxL use SLOT_B */
	53	#elif defined(CONFIG_SPD823TS) /* The SPD8xx use SLOT_B */
	54	# define CONFIG_PCMCIA_SLOT_B
	55	#elif defined(CONFIG_IVMS8) \|\| defined(CONFIG_IVML24) /* The IVM* use SLOT_A */
	56	# define CONFIG_PCMCIA_SLOT_A
	57	#elif defined(CONFIG_LWMON) /* The LWMON use SLOT_B */
	58	# define CONFIG_PCMCIA_SLOT_B
	59	#elif defined(CONFIG_ICU862) /* The ICU862 use SLOT_B */
	60	# define CONFIG_PCMCIA_SLOT_B
affae2bf WD	61	#elif defined(CONFIG_R360MPI) /* The R360MPI use SLOT_B */
affae2bf WD	62	# define CONFIG_PCMCIA_SLOT_B
66fd3d1c WD	63	#elif defined(CONFIG_ATC) /* The ATC use SLOT_A */
66fd3d1c WD	64	# define CONFIG_PCMCIA_SLOT_A
04a85b3b WD	65	#elif defined(CONFIG_NETTA)
04a85b3b WD	66	# define CONFIG_PCMCIA_SLOT_A
f7d1572b WD	67	#elif defined(CONFIG_UC100) /* The UC100 use SLOT_B */
f7d1572b WD	68	# define CONFIG_PCMCIA_SLOT_B
affae2bf WD	69	#else
	70	# error "PCMCIA Slot not configured"
	71	#endif
	72
	73	#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
	74
	75	/* Make sure exactly one slot is defined - we support only one for now */
	76	#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
	77	#error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
	78	#endif
	79	#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
	80	#error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
	81	#endif
	82
ea909b76	83	#ifndef PCMCIA_SOCKETS_NO
affae2bf	84	#define PCMCIA_SOCKETS_NO 1
ea909b76 WD	85	#endif
ea909b76 WD	86	#ifndef PCMCIA_MEM_WIN_NO
affae2bf	87	#define PCMCIA_MEM_WIN_NO 4
ea909b76	88	#endif
affae2bf WD	89	#define PCMCIA_IO_WIN_NO 2
	90
	91	/* define _slot_ to be able to optimize macros */
	92	#ifdef CONFIG_PCMCIA_SLOT_A
	93	# define _slot_ 0
	94	# define PCMCIA_SLOT_MSG "slot A"
	95	# define PCMCIA_SLOT_x PCMCIA_PSLOT_A
	96	#else
	97	# define _slot_ 1
	98	# define PCMCIA_SLOT_MSG "slot B"
	99	# define PCMCIA_SLOT_x PCMCIA_PSLOT_B
	100	#endif
	101
	102	/*
	103	* The TQM850L hardware has two pins swapped! Grrrrgh!
	104	*/
	105	#ifdef CONFIG_TQM850L
	106	#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXOE
	107	#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXRESET
	108	#else
	109	#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXRESET
	110	#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXOE
	111	#endif
	112
	113	/*
	114	* This structure is used to address each window in the PCMCIA controller.
	115	*
	116	* Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
	117	* after pcmcia_win_t[n]...
	118	*/
	119
	120	typedef struct {
	121	ulong br;
	122	ulong or;
	123	} pcmcia_win_t;
	124
	125	/*
	126	* Definitions for PCMCIA control registers to operate in IDE mode
	127	*
	128	* All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
	129	* to be done later (depending on CPU clock)
	130	*/
	131
	132	/* Window 0:
	133	* Base: 0xFE100000 CS1
	134	* Port Size: 2 Bytes
	135	* Port Size: 16 Bit
	136	* Common Memory Space
	137	*/
	138
6d0f6bcf JCPV	139	#define CONFIG_SYS_PCMCIA_PBR0 0xFE100000
6d0f6bcf JCPV	140	#define CONFIG_SYS_PCMCIA_POR0 ( PCMCIA_BSIZE_2 \
affae2bf WD	141	\| PCMCIA_PPS_16 \
	142	\| PCMCIA_PRS_MEM \
	143	\| PCMCIA_SLOT_x \
	144	\| PCMCIA_PV \
	145	)
	146
	147	/* Window 1:
	148	* Base: 0xFE100080 CS1
	149	* Port Size: 8 Bytes
	150	* Port Size: 8 Bit
	151	* Common Memory Space
	152	*/
	153
6d0f6bcf JCPV	154	#define CONFIG_SYS_PCMCIA_PBR1 0xFE100080
6d0f6bcf JCPV	155	#define CONFIG_SYS_PCMCIA_POR1 ( PCMCIA_BSIZE_8 \
affae2bf WD	156	\| PCMCIA_PPS_8 \
	157	\| PCMCIA_PRS_MEM \
	158	\| PCMCIA_SLOT_x \
	159	\| PCMCIA_PV \
	160	)
	161
	162	/* Window 2:
	163	* Base: 0xFE100100 CS2
	164	* Port Size: 8 Bytes
	165	* Port Size: 8 Bit
	166	* Common Memory Space
	167	*/
	168
6d0f6bcf JCPV	169	#define CONFIG_SYS_PCMCIA_PBR2 0xFE100100
6d0f6bcf JCPV	170	#define CONFIG_SYS_PCMCIA_POR2 ( PCMCIA_BSIZE_8 \
affae2bf WD	171	\| PCMCIA_PPS_8 \
	172	\| PCMCIA_PRS_MEM \
	173	\| PCMCIA_SLOT_x \
	174	\| PCMCIA_PV \
	175	)
	176
	177	/* Window 3:
	178	* not used
	179	*/
6d0f6bcf JCPV	180	#define CONFIG_SYS_PCMCIA_PBR3 0
6d0f6bcf JCPV	181	#define CONFIG_SYS_PCMCIA_POR3 0
affae2bf WD	182
	183	/* Window 4:
	184	* Base: 0xFE100C00 CS1
	185	* Port Size: 2 Bytes
	186	* Port Size: 16 Bit
	187	* Common Memory Space
	188	*/
	189
6d0f6bcf JCPV	190	#define CONFIG_SYS_PCMCIA_PBR4 0xFE100C00
6d0f6bcf JCPV	191	#define CONFIG_SYS_PCMCIA_POR4 ( PCMCIA_BSIZE_2 \
affae2bf WD	192	\| PCMCIA_PPS_16 \
	193	\| PCMCIA_PRS_MEM \
	194	\| PCMCIA_SLOT_x \
	195	\| PCMCIA_PV \
	196	)
	197
	198	/* Window 5:
	199	* Base: 0xFE100C80 CS1
	200	* Port Size: 8 Bytes
	201	* Port Size: 8 Bit
	202	* Common Memory Space
	203	*/
	204
6d0f6bcf JCPV	205	#define CONFIG_SYS_PCMCIA_PBR5 0xFE100C80
6d0f6bcf JCPV	206	#define CONFIG_SYS_PCMCIA_POR5 ( PCMCIA_BSIZE_8 \
affae2bf WD	207	\| PCMCIA_PPS_8 \
	208	\| PCMCIA_PRS_MEM \
	209	\| PCMCIA_SLOT_x \
	210	\| PCMCIA_PV \
	211	)
	212
	213	/* Window 6:
	214	* Base: 0xFE100D00 CS2
	215	* Port Size: 8 Bytes
	216	* Port Size: 8 Bit
	217	* Common Memory Space
	218	*/
	219
6d0f6bcf JCPV	220	#define CONFIG_SYS_PCMCIA_PBR6 0xFE100D00
6d0f6bcf JCPV	221	#define CONFIG_SYS_PCMCIA_POR6 ( PCMCIA_BSIZE_8 \
affae2bf WD	222	\| PCMCIA_PPS_8 \
	223	\| PCMCIA_PRS_MEM \
	224	\| PCMCIA_SLOT_x \
	225	\| PCMCIA_PV \
	226	)
	227
	228	/* Window 7:
	229	* not used
	230	*/
6d0f6bcf JCPV	231	#define CONFIG_SYS_PCMCIA_PBR7 0
6d0f6bcf JCPV	232	#define CONFIG_SYS_PCMCIA_POR7 0
affae2bf WD	233
	234	/**********************************************************************/
	235
	236	/*
	237	* CIS Tupel codes
	238	*/
	239	#define CISTPL_NULL 0x00
	240	#define CISTPL_DEVICE 0x01
	241	#define CISTPL_LONGLINK_CB 0x02
	242	#define CISTPL_INDIRECT 0x03
	243	#define CISTPL_CONFIG_CB 0x04
	244	#define CISTPL_CFTABLE_ENTRY_CB 0x05
	245	#define CISTPL_LONGLINK_MFC 0x06
	246	#define CISTPL_BAR 0x07
	247	#define CISTPL_PWR_MGMNT 0x08
	248	#define CISTPL_EXTDEVICE 0x09
	249	#define CISTPL_CHECKSUM 0x10
	250	#define CISTPL_LONGLINK_A 0x11
	251	#define CISTPL_LONGLINK_C 0x12
	252	#define CISTPL_LINKTARGET 0x13
	253	#define CISTPL_NO_LINK 0x14
	254	#define CISTPL_VERS_1 0x15
	255	#define CISTPL_ALTSTR 0x16
	256	#define CISTPL_DEVICE_A 0x17
	257	#define CISTPL_JEDEC_C 0x18
	258	#define CISTPL_JEDEC_A 0x19
	259	#define CISTPL_CONFIG 0x1a
	260	#define CISTPL_CFTABLE_ENTRY 0x1b
	261	#define CISTPL_DEVICE_OC 0x1c
	262	#define CISTPL_DEVICE_OA 0x1d
	263	#define CISTPL_DEVICE_GEO 0x1e
	264	#define CISTPL_DEVICE_GEO_A 0x1f
	265	#define CISTPL_MANFID 0x20
	266	#define CISTPL_FUNCID 0x21
	267	#define CISTPL_FUNCE 0x22
	268	#define CISTPL_SWIL 0x23
	269	#define CISTPL_END 0xff
	270
	271	/*
	272	* CIS Function ID codes
	273	*/
	274	#define CISTPL_FUNCID_MULTI 0x00
	275	#define CISTPL_FUNCID_MEMORY 0x01
	276	#define CISTPL_FUNCID_SERIAL 0x02
	277	#define CISTPL_FUNCID_PARALLEL 0x03
	278	#define CISTPL_FUNCID_FIXED 0x04
	279	#define CISTPL_FUNCID_VIDEO 0x05
	280	#define CISTPL_FUNCID_NETWORK 0x06
	281	#define CISTPL_FUNCID_AIMS 0x07
	282	#define CISTPL_FUNCID_SCSI 0x08
	283
	284	/*
	285	* Fixed Disk FUNCE codes
	286	*/
	287	#define CISTPL_IDE_INTERFACE 0x01
	288
	289	#define CISTPL_FUNCE_IDE_IFACE 0x01
	290	#define CISTPL_FUNCE_IDE_MASTER 0x02
	291	#define CISTPL_FUNCE_IDE_SLAVE 0x03
	292
	293	/* First feature byte */
	294	#define CISTPL_IDE_SILICON 0x04
	295	#define CISTPL_IDE_UNIQUE 0x08
	296	#define CISTPL_IDE_DUAL 0x10
297
298	/* Second feature byte */
299	#define CISTPL_IDE_HAS_SLEEP 0x01
300	#define CISTPL_IDE_HAS_STANDBY 0x02
301	#define CISTPL_IDE_HAS_IDLE 0x04
302	#define CISTPL_IDE_LOW_POWER 0x08
303	#define CISTPL_IDE_REG_INHIBIT 0x10
304	#define CISTPL_IDE_HAS_INDEX 0x20
305	#define CISTPL_IDE_IOIS16 0x40
306
068b60a0	307	#endif
affae2bf	308
9d407995 WD	309	#ifdef CONFIG_8xx
	310	extern u_int *pcmcia_pgcrx[];
	311	#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
	312	#endif
	313
c1ff6d88	314	#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
9d407995 WD	315	extern int check_ide_device(int slot);
	316	#endif
	317
affae2bf	318	#endif /* _PCMCIA_H */