[thirdparty/u-boot.git] / include / phy.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 *	Andy Fleming <afleming@gmail.com>
 *
 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
 */

#ifndef _PHY_H
#define _PHY_H

#include <dm.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/mdio.h>
#include <log.h>
#include <phy_interface.h>

#define PHY_FIXED_ID		0xa5a55a5a
#define PHY_NCSI_ID            0xbeefcafe

/*
 * There is no actual id for this.
 * This is just a dummy id for gmii2rgmmi converter.
 */
#define PHY_GMII2RGMII_ID	0x5a5a5a5a

#define PHY_MAX_ADDR 32

#define PHY_FLAG_BROKEN_RESET	(1 << 0) /* soft reset not supported */

#define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
				 SUPPORTED_TP | \
				 SUPPORTED_MII)

#define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
				 SUPPORTED_10baseT_Full)

#define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
				 SUPPORTED_100baseT_Full)

#define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
				 SUPPORTED_1000baseT_Full)

#define PHY_BASIC_FEATURES	(PHY_10BT_FEATURES | \
				 PHY_100BT_FEATURES | \
				 PHY_DEFAULT_FEATURES)

#define PHY_GBIT_FEATURES	(PHY_BASIC_FEATURES | \
				 PHY_1000BT_FEATURES)

#define PHY_10G_FEATURES	(PHY_GBIT_FEATURES | \
				SUPPORTED_10000baseT_Full)

#ifndef PHY_ANEG_TIMEOUT
#define PHY_ANEG_TIMEOUT	4000
#endif


struct phy_device;

#define MDIO_NAME_LEN 32

struct mii_dev {
	struct list_head link;
	char name[MDIO_NAME_LEN];
	void *priv;
	int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
	int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
			u16 val);
	int (*reset)(struct mii_dev *bus);
	struct phy_device *phymap[PHY_MAX_ADDR];
	u32 phy_mask;
};

/* struct phy_driver: a structure which defines PHY behavior
 *
 * uid will contain a number which represents the PHY.  During
 * startup, the driver will poll the PHY to find out what its
 * UID--as defined by registers 2 and 3--is.  The 32-bit result
 * gotten from the PHY will be masked to
 * discard any bits which may change based on revision numbers
 * unimportant to functionality
 *
 */
struct phy_driver {
	char *name;
	unsigned int uid;
	unsigned int mask;
	unsigned int mmds;

	u32 features;

	/* Called to do any driver startup necessities */
	/* Will be called during phy_connect */
	int (*probe)(struct phy_device *phydev);

	/* Called to configure the PHY, and modify the controller
	 * based on the results.  Should be called after phy_connect */
	int (*config)(struct phy_device *phydev);

	/* Called when starting up the controller */
	int (*startup)(struct phy_device *phydev);

	/* Called when bringing down the controller */
	int (*shutdown)(struct phy_device *phydev);

	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
			u16 val);

	/* Phy specific driver override for reading a MMD register */
	int (*read_mmd)(struct phy_device *phydev, int devad, int reg);

	/* Phy specific driver override for writing a MMD register */
	int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
			 u16 val);

	struct list_head list;

	/* driver private data */
	ulong data;
};

struct phy_device {
	/* Information about the PHY type */
	/* And management functions */
	struct mii_dev *bus;
	struct phy_driver *drv;
	void *priv;

#ifdef CONFIG_DM_ETH
	struct udevice *dev;
	ofnode node;
#else
	struct eth_device *dev;
#endif

	/* forced speed & duplex (no autoneg)
	 * partner speed & duplex & pause (autoneg)
	 */
	int speed;
	int duplex;

	/* The most recently read link state */
	int link;
	int port;
	phy_interface_t interface;

	u32 advertising;
	u32 supported;
	u32 mmds;

	int autoneg;
	int addr;
	int pause;
	int asym_pause;
	u32 phy_id;
	bool is_c45;
	u32 flags;
};

struct fixed_link {
	int phy_id;
	int duplex;
	int link_speed;
	int pause;
	int asym_pause;
};

static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
{
	struct mii_dev *bus = phydev->bus;

	if (!bus || !bus->read) {
		debug("%s: No bus configured\n", __func__);
		return -1;
	}

	return bus->read(bus, phydev->addr, devad, regnum);
}

static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
			u16 val)
{
	struct mii_dev *bus = phydev->bus;

	if (!bus || !bus->read) {
		debug("%s: No bus configured\n", __func__);
		return -1;
	}

	return bus->write(bus, phydev->addr, devad, regnum, val);
}

static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
					  int regnum)
{
	/* Write the desired MMD Devad */
	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);

	/* Write the desired MMD register address */
	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);

	/* Select the Function : DATA with no post increment */
	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
		  (devad | MII_MMD_CTRL_NOINCR));
}

static inline int phy_read_mmd(struct phy_device *phydev, int devad,
			       int regnum)
{
	struct phy_driver *drv = phydev->drv;

	if (regnum > (u16)~0 || devad > 32)
		return -EINVAL;

	/* driver-specific access */
	if (drv->read_mmd)
		return drv->read_mmd(phydev, devad, regnum);

	/* direct C45 / C22 access */
	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
	    devad == MDIO_DEVAD_NONE || !devad)
		return phy_read(phydev, devad, regnum);

	/* indirect C22 access */
	phy_mmd_start_indirect(phydev, devad, regnum);

	/* Read the content of the MMD's selected register */
	return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
}

static inline int phy_write_mmd(struct phy_device *phydev, int devad,
				int regnum, u16 val)
{
	struct phy_driver *drv = phydev->drv;

	if (regnum > (u16)~0 || devad > 32)
		return -EINVAL;

	/* driver-specific access */
	if (drv->write_mmd)
		return drv->write_mmd(phydev, devad, regnum, val);

	/* direct C45 / C22 access */
	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
	    devad == MDIO_DEVAD_NONE || !devad)
		return phy_write(phydev, devad, regnum, val);

	/* indirect C22 access */
	phy_mmd_start_indirect(phydev, devad, regnum);

	/* Write the data into MMD's selected register */
	return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
}

#ifdef CONFIG_PHYLIB_10G
extern struct phy_driver gen10g_driver;

/*
 * List all 10G interfaces here, the assumption being that PHYs on these
 * interfaces are C45
 */
static inline int is_10g_interface(phy_interface_t interface)
{
	return interface == PHY_INTERFACE_MODE_XGMII ||
	       interface == PHY_INTERFACE_MODE_USXGMII ||
	       interface == PHY_INTERFACE_MODE_XFI;
}

#endif

/**
 * phy_init() - Initializes the PHY drivers
 *
 * This function registers all available PHY drivers
 *
 * @return 0 if OK, -ve on error
 */
int phy_init(void);

/**
 * phy_reset() - Resets the specified PHY
 *
 * Issues a reset of the PHY and waits for it to complete
 *
 * @phydev:	PHY to reset
 * @return 0 if OK, -ve on error
 */
int phy_reset(struct phy_device *phydev);

/**
 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
 *
 * The function checks the PHY addresses flagged in phy_mask and returns a
 * phy_device pointer if it detects a PHY.
 * This function should only be called if just one PHY is expected to be present
 * in the set of addresses flagged in phy_mask.  If multiple PHYs are present,
 * it is undefined which of these PHYs is returned.
 *
 * @bus:	MII/MDIO bus to scan
 * @phy_mask:	bitmap of PYH addresses to scan
 * @interface:	type of MAC-PHY interface
 * @return pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
		phy_interface_t interface);

#ifdef CONFIG_DM_ETH

/**
 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
 * @phydev:	PHY device
 * @dev:	Ethernet device
 */
void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);

/**
 * phy_connect() - Creates a PHY device for the Ethernet interface
 *
 * Creates a PHY device for the PHY at the given address, if one doesn't exist
 * already, and associates it with the Ethernet device.
 * The function may be called with addr <= 0, in this case addr value is ignored
 * and the bus is scanned to detect a PHY.  Scanning should only be used if only
 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
 * which PHY is returned.
 *
 * @bus:	MII/MDIO bus that hosts the PHY
 * @addr:	PHY address on MDIO bus
 * @dev:	Ethernet device to associate to the PHY
 * @interface:	type of MAC-PHY interface
 * @return pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
				struct udevice *dev,
				phy_interface_t interface);

static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
	if (ofnode_valid(phydev->node))
		return phydev->node;
	else
		return dev_ofnode(phydev->dev);
}
#else

/**
 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
 * @phydev:	PHY device
 * @dev:	Ethernet device
 */
void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);

/**
 * phy_connect() - Creates a PHY device for the Ethernet interface
 *
 * Creates a PHY device for the PHY at the given address, if one doesn't exist
 * already, and associates it with the Ethernet device.
 * The function may be called with addr <= 0, in this case addr value is ignored
 * and the bus is scanned to detect a PHY.  Scanning should only be used if only
 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
 * which PHY is returned.
 *
 * @bus:	MII/MDIO bus that hosts the PHY
 * @addr:	PHY address on MDIO bus
 * @dev:	Ethernet device to associate to the PHY
 * @interface:	type of MAC-PHY interface
 * @return pointer to phy_device if a PHY is found, or NULL otherwise
 */
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
				struct eth_device *dev,
				phy_interface_t interface);

static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
	return ofnode_null();
}
#endif
int phy_startup(struct phy_device *phydev);
int phy_config(struct phy_device *phydev);
int phy_shutdown(struct phy_device *phydev);
int phy_register(struct phy_driver *drv);
int phy_set_supported(struct phy_device *phydev, u32 max_speed);
int genphy_config_aneg(struct phy_device *phydev);
int genphy_restart_aneg(struct phy_device *phydev);
int genphy_update_link(struct phy_device *phydev);
int genphy_parse_link(struct phy_device *phydev);
int genphy_config(struct phy_device *phydev);
int genphy_startup(struct phy_device *phydev);
int genphy_shutdown(struct phy_device *phydev);
int gen10g_config(struct phy_device *phydev);
int gen10g_startup(struct phy_device *phydev);
int gen10g_shutdown(struct phy_device *phydev);
int gen10g_discover_mmds(struct phy_device *phydev);

int phy_b53_init(void);
int phy_mv88e61xx_init(void);
int phy_aquantia_init(void);
int phy_atheros_init(void);
int phy_broadcom_init(void);
int phy_cortina_init(void);
int phy_davicom_init(void);
int phy_et1011c_init(void);
int phy_lxt_init(void);
int phy_marvell_init(void);
int phy_micrel_ksz8xxx_init(void);
int phy_micrel_ksz90x1_init(void);
int phy_meson_gxl_init(void);
int phy_natsemi_init(void);
int phy_realtek_init(void);
int phy_smsc_init(void);
int phy_teranetics_init(void);
int phy_ti_init(void);
int phy_vitesse_init(void);
int phy_xilinx_init(void);
int phy_mscc_init(void);
int phy_fixed_init(void);
int phy_ncsi_init(void);
int phy_xilinx_gmii2rgmii_init(void);

int board_phy_config(struct phy_device *phydev);
int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);

/**
 * phy_get_interface_by_name() - Look up a PHY interface name
 *
 * @str:	PHY interface name, e.g. "mii"
 * @return PHY_INTERFACE_MODE_... value, or -1 if not found
 */
int phy_get_interface_by_name(const char *str);

/**
 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
 * is RGMII (all variants)
 * @phydev: the phy_device struct
 */
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
	return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
		phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
}

/**
 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
 * is SGMII (all variants)
 * @phydev: the phy_device struct
 */
static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
{
	return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
		phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
}

/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340  	0x13e51002
#define PHY_UID_CS4223  	0x03e57003
#define PHY_UID_TN2020		0x00a19410
#define PHY_UID_IN112525_S03	0x02107440

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
5f184715 AF	2	/*
5f184715 AF	3	* Copyright 2011 Freescale Semiconductor, Inc.
b21f87a3	4	* Andy Fleming <afleming@gmail.com>
5f184715	5	*
5f184715 AF	6	* This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
	7	*/
	8
	9	#ifndef _PHY_H
	10	#define _PHY_H
	11
eef0b8a9	12	#include <dm.h>
f2176515	13	#include <linux/errno.h>
5f184715 AF	14	#include <linux/list.h>
	15	#include <linux/mii.h>
	16	#include <linux/ethtool.h>
	17	#include <linux/mdio.h>
e2ffeaa1	18	#include <log.h>
f070b1a2	19	#include <phy_interface.h>
5f184715	20
db40c1aa	21	#define PHY_FIXED_ID 0xa5a55a5a
f641a8ac SMJ	22	#define PHY_NCSI_ID 0xbeefcafe
f641a8ac SMJ	23
f41e588c SDPP	24	/*
	25	* There is no actual id for this.
	26	* This is just a dummy id for gmii2rgmmi converter.
	27	*/
	28	#define PHY_GMII2RGMII_ID 0x5a5a5a5a
db40c1aa	29
5f184715 AF	30	#define PHY_MAX_ADDR 32
5f184715 AF	31
ddcd1f30 SX	32	#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
ddcd1f30 SX	33
4dae610b	34	#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg \| \
5f184715 AF	35	SUPPORTED_TP \| \
	36	SUPPORTED_MII)
	37
4dae610b FF	38	#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half \| \
	39	SUPPORTED_10baseT_Full)
	40
	41	#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half \| \
	42	SUPPORTED_100baseT_Full)
	43
	44	#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half \| \
5f184715 AF	45	SUPPORTED_1000baseT_Full)
5f184715 AF	46
4dae610b FF	47	#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES \| \
	48	PHY_100BT_FEATURES \| \
	49	PHY_DEFAULT_FEATURES)
	50
	51	#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES \| \
	52	PHY_1000BT_FEATURES)
	53
5f184715 AF	54	#define PHY_10G_FEATURES (PHY_GBIT_FEATURES \| \
	55	SUPPORTED_10000baseT_Full)
	56
4fb3f0c8	57	#ifndef PHY_ANEG_TIMEOUT
5f184715	58	#define PHY_ANEG_TIMEOUT 4000
4fb3f0c8	59	#endif
5f184715 AF	60
5f184715 AF	61
5f184715 AF	62	struct phy_device;
	63
	64	#define MDIO_NAME_LEN 32
	65
	66	struct mii_dev {
	67	struct list_head link;
	68	char name[MDIO_NAME_LEN];
	69	void *priv;
	70	int (read)(struct mii_dev bus, int addr, int devad, int reg);
	71	int (write)(struct mii_dev bus, int addr, int devad, int reg,
	72	u16 val);
	73	int (reset)(struct mii_dev bus);
	74	struct phy_device *phymap[PHY_MAX_ADDR];
	75	u32 phy_mask;
	76	};
	77
	78	/* struct phy_driver: a structure which defines PHY behavior
	79	*
	80	* uid will contain a number which represents the PHY. During
	81	* startup, the driver will poll the PHY to find out what its
	82	* UID--as defined by registers 2 and 3--is. The 32-bit result
	83	* gotten from the PHY will be masked to
	84	* discard any bits which may change based on revision numbers
	85	* unimportant to functionality
	86	*
	87	*/
	88	struct phy_driver {
	89	char *name;
	90	unsigned int uid;
	91	unsigned int mask;
	92	unsigned int mmds;
	93
	94	u32 features;
	95
	96	/* Called to do any driver startup necessities */
	97	/* Will be called during phy_connect */
	98	int (probe)(struct phy_device phydev);
	99
	100	/* Called to configure the PHY, and modify the controller
	101	* based on the results. Should be called after phy_connect */
	102	int (config)(struct phy_device phydev);
	103
	104	/* Called when starting up the controller */
	105	int (startup)(struct phy_device phydev);
	106
	107	/* Called when bringing down the controller */
	108	int (shutdown)(struct phy_device phydev);
	109
b71841b9 SB	110	int (readext)(struct phy_device phydev, int addr, int devad, int reg);
	111	int (writeext)(struct phy_device phydev, int addr, int devad, int reg,
	112	u16 val);
4f6746dc CC	113
	114	/* Phy specific driver override for reading a MMD register */
	115	int (read_mmd)(struct phy_device phydev, int devad, int reg);
	116
	117	/* Phy specific driver override for writing a MMD register */
	118	int (write_mmd)(struct phy_device phydev, int devad, int reg,
	119	u16 val);
	120
5f184715	121	struct list_head list;
d718b697 AM	122
	123	/* driver private data */
	124	ulong data;
5f184715 AF	125	};
	126
	127	struct phy_device {
	128	/* Information about the PHY type */
	129	/* And management functions */
	130	struct mii_dev *bus;
	131	struct phy_driver *drv;
	132	void *priv;
	133
c74c8e66 SG	134	#ifdef CONFIG_DM_ETH
c74c8e66 SG	135	struct udevice *dev;
eef0b8a9	136	ofnode node;
c74c8e66	137	#else
5f184715	138	struct eth_device *dev;
c74c8e66	139	#endif
5f184715 AF	140
	141	/* forced speed & duplex (no autoneg)
	142	* partner speed & duplex & pause (autoneg)
	143	*/
	144	int speed;
	145	int duplex;
	146
	147	/* The most recently read link state */
	148	int link;
	149	int port;
	150	phy_interface_t interface;
	151
	152	u32 advertising;
	153	u32 supported;
	154	u32 mmds;
	155
	156	int autoneg;
	157	int addr;
	158	int pause;
	159	int asym_pause;
	160	u32 phy_id;
b3eabd82	161	bool is_c45;
5f184715 AF	162	u32 flags;
	163	};
	164
f55a776c SX	165	struct fixed_link {
	166	int phy_id;
	167	int duplex;
	168	int link_speed;
	169	int pause;
	170	int asym_pause;
	171	};
	172
5f184715 AF	173	static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
	174	{
	175	struct mii_dev *bus = phydev->bus;
	176
e2ffeaa1 SMJ	177	if (!bus \|\| !bus->read) {
	178	debug("%s: No bus configured\n", __func__);
	179	return -1;
	180	}
	181
5f184715 AF	182	return bus->read(bus, phydev->addr, devad, regnum);
	183	}
	184
	185	static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
	186	u16 val)
	187	{
	188	struct mii_dev *bus = phydev->bus;
	189
e2ffeaa1 SMJ	190	if (!bus \|\| !bus->read) {
	191	debug("%s: No bus configured\n", __func__);
	192	return -1;
	193	}
	194
5f184715 AF	195	return bus->write(bus, phydev->addr, devad, regnum, val);
	196	}
	197
4f6746dc CC	198	static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
	199	int regnum)
	200	{
	201	/* Write the desired MMD Devad */
	202	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
	203
	204	/* Write the desired MMD register address */
	205	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
	206
	207	/* Select the Function : DATA with no post increment */
	208	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
	209	(devad \| MII_MMD_CTRL_NOINCR));
	210	}
	211
	212	static inline int phy_read_mmd(struct phy_device *phydev, int devad,
	213	int regnum)
	214	{
	215	struct phy_driver *drv = phydev->drv;
	216
	217	if (regnum > (u16)~0 \|\| devad > 32)
	218	return -EINVAL;
	219
	220	/* driver-specific access */
	221	if (drv->read_mmd)
	222	return drv->read_mmd(phydev, devad, regnum);
	223
	224	/* direct C45 / C22 access */
	225	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES \|\|
	226	devad == MDIO_DEVAD_NONE \|\| !devad)
	227	return phy_read(phydev, devad, regnum);
	228
	229	/* indirect C22 access */
	230	phy_mmd_start_indirect(phydev, devad, regnum);
	231
	232	/* Read the content of the MMD's selected register */
	233	return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
	234	}
	235
	236	static inline int phy_write_mmd(struct phy_device *phydev, int devad,
	237	int regnum, u16 val)
	238	{
	239	struct phy_driver *drv = phydev->drv;
	240
	241	if (regnum > (u16)~0 \|\| devad > 32)
	242	return -EINVAL;
	243
	244	/* driver-specific access */
	245	if (drv->write_mmd)
	246	return drv->write_mmd(phydev, devad, regnum, val);
	247
	248	/* direct C45 / C22 access */
	249	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES \|\|
	250	devad == MDIO_DEVAD_NONE \|\| !devad)
	251	return phy_write(phydev, devad, regnum, val);
	252
	253	/* indirect C22 access */
	254	phy_mmd_start_indirect(phydev, devad, regnum);
	255
	256	/* Write the data into MMD's selected register */
	257	return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
	258	}
	259
5f184715 AF	260	#ifdef CONFIG_PHYLIB_10G
	261	extern struct phy_driver gen10g_driver;
	262
9810489c AM	263	/*
	264	* List all 10G interfaces here, the assumption being that PHYs on these
	265	* interfaces are C45
	266	*/
5f184715 AF	267	static inline int is_10g_interface(phy_interface_t interface)
5f184715 AF	268	{
9810489c AM	269	return interface == PHY_INTERFACE_MODE_XGMII \|\|
	270	interface == PHY_INTERFACE_MODE_USXGMII \|\|
	271	interface == PHY_INTERFACE_MODE_XFI;
5f184715 AF	272	}
	273
	274	#endif
	275
c38ac289 AM	276	/**
	277	* phy_init() - Initializes the PHY drivers
	278	*
	279	* This function registers all available PHY drivers
	280	*
	281	* @return 0 if OK, -ve on error
	282	*/
5f184715	283	int phy_init(void);
c38ac289 AM	284
	285	/**
	286	* phy_reset() - Resets the specified PHY
	287	*
	288	* Issues a reset of the PHY and waits for it to complete
	289	*
	290	* @phydev: PHY to reset
	291	* @return 0 if OK, -ve on error
	292	*/
5f184715	293	int phy_reset(struct phy_device *phydev);
c38ac289 AM	294
	295	/**
	296	* phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
	297	*
	298	* The function checks the PHY addresses flagged in phy_mask and returns a
	299	* phy_device pointer if it detects a PHY.
	300	* This function should only be called if just one PHY is expected to be present
	301	* in the set of addresses flagged in phy_mask. If multiple PHYs are present,
	302	* it is undefined which of these PHYs is returned.
	303	*
	304	* @bus: MII/MDIO bus to scan
	305	* @phy_mask: bitmap of PYH addresses to scan
	306	* @interface: type of MAC-PHY interface
	307	* @return pointer to phy_device if a PHY is found, or NULL otherwise
	308	*/
1adb406b TK	309	struct phy_device phy_find_by_mask(struct mii_dev bus, unsigned phy_mask,
1adb406b TK	310	phy_interface_t interface);
c38ac289	311
c74c8e66	312	#ifdef CONFIG_DM_ETH
c38ac289 AM	313
	314	/**
	315	* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
	316	* @phydev: PHY device
	317	* @dev: Ethernet device
	318	*/
c74c8e66	319	void phy_connect_dev(struct phy_device phydev, struct udevice dev);
c38ac289 AM	320
	321	/**
	322	* phy_connect() - Creates a PHY device for the Ethernet interface
	323	*
	324	* Creates a PHY device for the PHY at the given address, if one doesn't exist
	325	* already, and associates it with the Ethernet device.
	326	* The function may be called with addr <= 0, in this case addr value is ignored
	327	* and the bus is scanned to detect a PHY. Scanning should only be used if only
	328	* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
	329	* which PHY is returned.
	330	*
	331	* @bus: MII/MDIO bus that hosts the PHY
	332	* @addr: PHY address on MDIO bus
	333	* @dev: Ethernet device to associate to the PHY
	334	* @interface: type of MAC-PHY interface
	335	* @return pointer to phy_device if a PHY is found, or NULL otherwise
	336	*/
c74c8e66 SG	337	struct phy_device phy_connect(struct mii_dev bus, int addr,
	338	struct udevice *dev,
	339	phy_interface_t interface);
c38ac289	340
eef0b8a9 GS	341	static inline ofnode phy_get_ofnode(struct phy_device *phydev)
	342	{
	343	if (ofnode_valid(phydev->node))
	344	return phydev->node;
	345	else
	346	return dev_ofnode(phydev->dev);
	347	}
c74c8e66	348	#else
c38ac289 AM	349
	350	/**
	351	* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
	352	* @phydev: PHY device
	353	* @dev: Ethernet device
	354	*/
1adb406b	355	void phy_connect_dev(struct phy_device phydev, struct eth_device dev);
c38ac289 AM	356
	357	/**
	358	* phy_connect() - Creates a PHY device for the Ethernet interface
	359	*
	360	* Creates a PHY device for the PHY at the given address, if one doesn't exist
	361	* already, and associates it with the Ethernet device.
	362	* The function may be called with addr <= 0, in this case addr value is ignored
	363	* and the bus is scanned to detect a PHY. Scanning should only be used if only
	364	* one PHY is expected to be present on the MDIO bus, otherwise it is undefined
	365	* which PHY is returned.
	366	*
	367	* @bus: MII/MDIO bus that hosts the PHY
	368	* @addr: PHY address on MDIO bus
	369	* @dev: Ethernet device to associate to the PHY
	370	* @interface: type of MAC-PHY interface
	371	* @return pointer to phy_device if a PHY is found, or NULL otherwise
	372	*/
5f184715 AF	373	struct phy_device phy_connect(struct mii_dev bus, int addr,
	374	struct eth_device *dev,
	375	phy_interface_t interface);
c38ac289	376
eef0b8a9 GS	377	static inline ofnode phy_get_ofnode(struct phy_device *phydev)
	378	{
	379	return ofnode_null();
	380	}
c74c8e66	381	#endif
5f184715 AF	382	int phy_startup(struct phy_device *phydev);
	383	int phy_config(struct phy_device *phydev);
	384	int phy_shutdown(struct phy_device *phydev);
	385	int phy_register(struct phy_driver *drv);
b18acb0a	386	int phy_set_supported(struct phy_device *phydev, u32 max_speed);
5f184715	387	int genphy_config_aneg(struct phy_device *phydev);
8682aba7	388	int genphy_restart_aneg(struct phy_device *phydev);
5f184715	389	int genphy_update_link(struct phy_device *phydev);
e2043f5c	390	int genphy_parse_link(struct phy_device *phydev);
5f184715 AF	391	int genphy_config(struct phy_device *phydev);
	392	int genphy_startup(struct phy_device *phydev);
	393	int genphy_shutdown(struct phy_device *phydev);
	394	int gen10g_config(struct phy_device *phydev);
	395	int gen10g_startup(struct phy_device *phydev);
	396	int gen10g_shutdown(struct phy_device *phydev);
	397	int gen10g_discover_mmds(struct phy_device *phydev);
	398
137963d7	399	int phy_b53_init(void);
24ae3961	400	int phy_mv88e61xx_init(void);
f7c38cf8	401	int phy_aquantia_init(void);
9082eeac AF	402	int phy_atheros_init(void);
9082eeac AF	403	int phy_broadcom_init(void);
9b18e519	404	int phy_cortina_init(void);
9082eeac	405	int phy_davicom_init(void);
f485c8a3	406	int phy_et1011c_init(void);
9082eeac AF	407	int phy_lxt_init(void);
9082eeac AF	408	int phy_marvell_init(void);
d397f7c4 AG	409	int phy_micrel_ksz8xxx_init(void);
d397f7c4 AG	410	int phy_micrel_ksz90x1_init(void);
8995a96d	411	int phy_meson_gxl_init(void);
9082eeac AF	412	int phy_natsemi_init(void);
9082eeac AF	413	int phy_realtek_init(void);
b6abf555	414	int phy_smsc_init(void);
9082eeac	415	int phy_teranetics_init(void);
721aed79	416	int phy_ti_init(void);
9082eeac	417	int phy_vitesse_init(void);
ed6fad3e	418	int phy_xilinx_init(void);
a5fd13ad	419	int phy_mscc_init(void);
db40c1aa	420	int phy_fixed_init(void);
e2ffeaa1	421	int phy_ncsi_init(void);
f41e588c	422	int phy_xilinx_gmii2rgmii_init(void);
a836626c	423
2fb63964	424	int board_phy_config(struct phy_device *phydev);
5707d5ff	425	int get_phy_id(struct mii_dev bus, int addr, int devad, u32 phy_id);
2fb63964	426
c74c8e66 SG	427	/**
	428	* phy_get_interface_by_name() - Look up a PHY interface name
	429	*
	430	* @str: PHY interface name, e.g. "mii"
	431	* @return PHY_INTERFACE_MODE_... value, or -1 if not found
	432	*/
	433	int phy_get_interface_by_name(const char *str);
	434
3ab72fe8 DM	435	/**
	436	* phy_interface_is_rgmii - Convenience function for testing if a PHY interface
	437	* is RGMII (all variants)
	438	* @phydev: the phy_device struct
	439	*/
	440	static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
	441	{
	442	return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
	443	phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
	444	}
	445
3c221af3 DM	446	/**
	447	* phy_interface_is_sgmii - Convenience function for testing if a PHY interface
	448	* is SGMII (all variants)
	449	* @phydev: the phy_device struct
	450	*/
	451	static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
	452	{
	453	return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
	454	phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
	455	}
	456
a836626c	457	/* PHY UIDs for various PHYs that are referenced in external code */
1ddcf5ed PJ	458	#define PHY_UID_CS4340 0x13e51002
	459	#define PHY_UID_CS4223 0x03e57003
	460	#define PHY_UID_TN2020 0x00a19410
	461	#define PHY_UID_IN112525_S03 0x02107440
a836626c	462
5f184715	463	#endif