[people/ms/u-boot.git] / include / qfw.h

/*
 * (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __FW_CFG__
#define __FW_CFG__

#include <linux/list.h>

enum qemu_fwcfg_items {
	FW_CFG_SIGNATURE	= 0x00,
	FW_CFG_ID		= 0x01,
	FW_CFG_UUID		= 0x02,
	FW_CFG_RAM_SIZE		= 0x03,
	FW_CFG_NOGRAPHIC	= 0x04,
	FW_CFG_NB_CPUS		= 0x05,
	FW_CFG_MACHINE_ID	= 0x06,
	FW_CFG_KERNEL_ADDR	= 0x07,
	FW_CFG_KERNEL_SIZE	= 0x08,
	FW_CFG_KERNEL_CMDLINE   = 0x09,
	FW_CFG_INITRD_ADDR	= 0x0a,
	FW_CFG_INITRD_SIZE	= 0x0b,
	FW_CFG_BOOT_DEVICE	= 0x0c,
	FW_CFG_NUMA		= 0x0d,
	FW_CFG_BOOT_MENU	= 0x0e,
	FW_CFG_MAX_CPUS		= 0x0f,
	FW_CFG_KERNEL_ENTRY	= 0x10,
	FW_CFG_KERNEL_DATA	= 0x11,
	FW_CFG_INITRD_DATA	= 0x12,
	FW_CFG_CMDLINE_ADDR	= 0x13,
	FW_CFG_CMDLINE_SIZE	= 0x14,
	FW_CFG_CMDLINE_DATA	= 0x15,
	FW_CFG_SETUP_ADDR	= 0x16,
	FW_CFG_SETUP_SIZE	= 0x17,
	FW_CFG_SETUP_DATA	= 0x18,
	FW_CFG_FILE_DIR		= 0x19,
	FW_CFG_FILE_FIRST	= 0x20,
	FW_CFG_WRITE_CHANNEL	= 0x4000,
	FW_CFG_ARCH_LOCAL	= 0x8000,
	FW_CFG_INVALID		= 0xffff,
};

enum {
	BIOS_LINKER_LOADER_COMMAND_ALLOCATE	= 0x1,
	BIOS_LINKER_LOADER_COMMAND_ADD_POINTER  = 0x2,
	BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM = 0x3,
};

enum {
	BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH = 0x1,
	BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG = 0x2,
};

#define FW_CFG_FILE_SLOTS	0x10
#define FW_CFG_MAX_ENTRY	(FW_CFG_FILE_FIRST + FW_CFG_FILE_SLOTS)
#define FW_CFG_ENTRY_MASK	 ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)

#define FW_CFG_MAX_FILE_PATH	56
#define BIOS_LINKER_LOADER_FILESZ FW_CFG_MAX_FILE_PATH

#define QEMU_FW_CFG_SIGNATURE	(('Q' << 24) | ('E' << 16) | ('M' << 8) | 'U')

#define FW_CFG_DMA_ERROR	(1 << 0)
#define FW_CFG_DMA_READ	(1 << 1)
#define FW_CFG_DMA_SKIP	(1 << 2)
#define FW_CFG_DMA_SELECT	(1 << 3)

#define FW_CFG_DMA_ENABLED	(1 << 1)

struct fw_cfg_file {
	__be32 size;
	__be16 select;
	__be16 reserved;
	char name[FW_CFG_MAX_FILE_PATH];
};

struct fw_file {
	struct fw_cfg_file cfg; /* firmware file information */
	unsigned long addr;     /* firmware file in-memory address */
	struct list_head list;  /* list node to link to fw_list */
};

struct fw_cfg_file_iter {
	struct list_head *entry; /* structure to iterate file list */
};

struct fw_cfg_dma_access {
	__be32 control;
	__be32 length;
	__be64 address;
};

struct fw_cfg_arch_ops {
	void (*arch_read_pio)(uint16_t selector, uint32_t size,
			void *address);
	void (*arch_read_dma)(struct fw_cfg_dma_access *dma);
};

struct bios_linker_entry {
	__le32 command;
	union {
		/*
		 * COMMAND_ALLOCATE - allocate a table from @alloc.file
		 * subject to @alloc.align alignment (must be power of 2)
		 * and @alloc.zone (can be HIGH or FSEG) requirements.
		 *
		 * Must appear exactly once for each file, and before
		 * this file is referenced by any other command.
		 */
		struct {
			char file[BIOS_LINKER_LOADER_FILESZ];
			__le32 align;
			uint8_t zone;
		} alloc;

		/*
		 * COMMAND_ADD_POINTER - patch the table (originating from
		 * @dest_file) at @pointer.offset, by adding a pointer to the
		 * table originating from @src_file. 1,2,4 or 8 byte unsigned
		 * addition is used depending on @pointer.size.
		 */
		struct {
			char dest_file[BIOS_LINKER_LOADER_FILESZ];
			char src_file[BIOS_LINKER_LOADER_FILESZ];
			__le32 offset;
			uint8_t size;
		} pointer;

		/*
		 * COMMAND_ADD_CHECKSUM - calculate checksum of the range
		 * specified by @cksum_start and @cksum_length fields,
		 * and then add the value at @cksum.offset.
		 * Checksum simply sums -X for each byte X in the range
		 * using 8-bit math.
		 */
		struct {
			char file[BIOS_LINKER_LOADER_FILESZ];
			__le32 offset;
			__le32 start;
			__le32 length;
		} cksum;

		/* padding */
		char pad[124];
	};
} __packed;

/**
 * Initialize QEMU fw_cfg interface
 *
 * @ops: arch specific read operations
 */
void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops);

void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address);
int qemu_fwcfg_read_firmware_list(void);
struct fw_file *qemu_fwcfg_find_file(const char *name);

/**
 * Get system cpu number
 *
 * @return:   cpu number in system
 */
int qemu_fwcfg_online_cpus(void);

/* helper functions to iterate firmware file list */
struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter);
struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter);
bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter);

bool qemu_fwcfg_present(void);
bool qemu_fwcfg_dma_present(void);

#endif
Commit	Line	Data
f60df20a MY	1	/*
	2	* (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __FW_CFG__
	8	#define __FW_CFG__
	9
25757220 MY	10	#include <linux/list.h>
25757220 MY	11
f60df20a MY	12	enum qemu_fwcfg_items {
	13	FW_CFG_SIGNATURE = 0x00,
	14	FW_CFG_ID = 0x01,
	15	FW_CFG_UUID = 0x02,
	16	FW_CFG_RAM_SIZE = 0x03,
	17	FW_CFG_NOGRAPHIC = 0x04,
	18	FW_CFG_NB_CPUS = 0x05,
	19	FW_CFG_MACHINE_ID = 0x06,
	20	FW_CFG_KERNEL_ADDR = 0x07,
	21	FW_CFG_KERNEL_SIZE = 0x08,
	22	FW_CFG_KERNEL_CMDLINE = 0x09,
	23	FW_CFG_INITRD_ADDR = 0x0a,
	24	FW_CFG_INITRD_SIZE = 0x0b,
	25	FW_CFG_BOOT_DEVICE = 0x0c,
	26	FW_CFG_NUMA = 0x0d,
	27	FW_CFG_BOOT_MENU = 0x0e,
	28	FW_CFG_MAX_CPUS = 0x0f,
	29	FW_CFG_KERNEL_ENTRY = 0x10,
	30	FW_CFG_KERNEL_DATA = 0x11,
	31	FW_CFG_INITRD_DATA = 0x12,
	32	FW_CFG_CMDLINE_ADDR = 0x13,
	33	FW_CFG_CMDLINE_SIZE = 0x14,
	34	FW_CFG_CMDLINE_DATA = 0x15,
	35	FW_CFG_SETUP_ADDR = 0x16,
	36	FW_CFG_SETUP_SIZE = 0x17,
	37	FW_CFG_SETUP_DATA = 0x18,
	38	FW_CFG_FILE_DIR = 0x19,
	39	FW_CFG_FILE_FIRST = 0x20,
	40	FW_CFG_WRITE_CHANNEL = 0x4000,
	41	FW_CFG_ARCH_LOCAL = 0x8000,
	42	FW_CFG_INVALID = 0xffff,
	43	};
	44
fa287b15 MY	45	enum {
	46	BIOS_LINKER_LOADER_COMMAND_ALLOCATE = 0x1,
	47	BIOS_LINKER_LOADER_COMMAND_ADD_POINTER = 0x2,
	48	BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM = 0x3,
	49	};
	50
	51	enum {
	52	BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH = 0x1,
	53	BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG = 0x2,
	54	};
	55
f60df20a MY	56	#define FW_CFG_FILE_SLOTS 0x10
	57	#define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST + FW_CFG_FILE_SLOTS)
	58	#define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL \| FW_CFG_ARCH_LOCAL)
	59
	60	#define FW_CFG_MAX_FILE_PATH 56
fa287b15	61	#define BIOS_LINKER_LOADER_FILESZ FW_CFG_MAX_FILE_PATH
f60df20a MY	62
	63	#define QEMU_FW_CFG_SIGNATURE (('Q' << 24) \| ('E' << 16) \| ('M' << 8) \| 'U')
	64
	65	#define FW_CFG_DMA_ERROR (1 << 0)
	66	#define FW_CFG_DMA_READ (1 << 1)
	67	#define FW_CFG_DMA_SKIP (1 << 2)
	68	#define FW_CFG_DMA_SELECT (1 << 3)
	69
	70	#define FW_CFG_DMA_ENABLED (1 << 1)
	71
	72	struct fw_cfg_file {
	73	__be32 size;
	74	__be16 select;
	75	__be16 reserved;
	76	char name[FW_CFG_MAX_FILE_PATH];
	77	};
	78
25757220 MY	79	struct fw_file {
	80	struct fw_cfg_file cfg; /* firmware file information */
	81	unsigned long addr; /* firmware file in-memory address */
	82	struct list_head list; /* list node to link to fw_list */
f60df20a MY	83	};
f60df20a MY	84
099b2196 MY	85	struct fw_cfg_file_iter {
	86	struct list_head entry; / structure to iterate file list */
	87	};
	88
f60df20a MY	89	struct fw_cfg_dma_access {
	90	__be32 control;
	91	__be32 length;
	92	__be64 address;
	93	};
	94
2e82e745 MY	95	struct fw_cfg_arch_ops {
	96	void (*arch_read_pio)(uint16_t selector, uint32_t size,
	97	void *address);
	98	void (arch_read_dma)(struct fw_cfg_dma_access dma);
	99	};
	100
fa287b15 MY	101	struct bios_linker_entry {
	102	__le32 command;
	103	union {
	104	/*
	105	* COMMAND_ALLOCATE - allocate a table from @alloc.file
	106	* subject to @alloc.align alignment (must be power of 2)
	107	* and @alloc.zone (can be HIGH or FSEG) requirements.
	108	*
	109	* Must appear exactly once for each file, and before
	110	* this file is referenced by any other command.
	111	*/
	112	struct {
	113	char file[BIOS_LINKER_LOADER_FILESZ];
	114	__le32 align;
	115	uint8_t zone;
	116	} alloc;
	117
	118	/*
	119	* COMMAND_ADD_POINTER - patch the table (originating from
	120	* @dest_file) at @pointer.offset, by adding a pointer to the
	121	* table originating from @src_file. 1,2,4 or 8 byte unsigned
	122	* addition is used depending on @pointer.size.
	123	*/
	124	struct {
	125	char dest_file[BIOS_LINKER_LOADER_FILESZ];
	126	char src_file[BIOS_LINKER_LOADER_FILESZ];
	127	__le32 offset;
	128	uint8_t size;
	129	} pointer;
	130
	131	/*
	132	* COMMAND_ADD_CHECKSUM - calculate checksum of the range
	133	* specified by @cksum_start and @cksum_length fields,
	134	* and then add the value at @cksum.offset.
	135	* Checksum simply sums -X for each byte X in the range
	136	* using 8-bit math.
	137	*/
	138	struct {
	139	char file[BIOS_LINKER_LOADER_FILESZ];
	140	__le32 offset;
	141	__le32 start;
	142	__le32 length;
	143	} cksum;
	144
	145	/* padding */
	146	char pad[124];
	147	};
	148	} __packed;
	149
f60df20a MY	150	/**
f60df20a MY	151	* Initialize QEMU fw_cfg interface
2e82e745 MY	152	*
2e82e745 MY	153	* @ops: arch specific read operations
f60df20a	154	*/
2e82e745	155	void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops);
f60df20a	156
dd6f3abb TR	157	void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address);
	158	int qemu_fwcfg_read_firmware_list(void);
	159	struct fw_file qemu_fwcfg_find_file(const char name);
dd6f3abb	160
f60df20a MY	161	/**
	162	* Get system cpu number
	163	*
	164	* @return: cpu number in system
	165	*/
	166	int qemu_fwcfg_online_cpus(void);
	167
099b2196 MY	168	/* helper functions to iterate firmware file list */
	169	struct fw_file qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter iter);
	170	struct fw_file qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter iter);
	171	bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter);
	172
d3ad0623 MY	173	bool qemu_fwcfg_present(void);
	174	bool qemu_fwcfg_dma_present(void);
	175
f60df20a	176	#endif