[thirdparty/u-boot.git] / include / spi_flash.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Common SPI flash Interface
 *
 * Copyright (C) 2008 Atmel Corporation
 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
 */

#ifndef _SPI_FLASH_H_
#define _SPI_FLASH_H_

#include <dm.h>	/* Because we dereference struct udevice here */
#include <linux/types.h>

#ifndef CONFIG_SF_DEFAULT_SPEED
# define CONFIG_SF_DEFAULT_SPEED	1000000
#endif
#ifndef CONFIG_SF_DEFAULT_MODE
# define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
#endif
#ifndef CONFIG_SF_DEFAULT_CS
# define CONFIG_SF_DEFAULT_CS		0
#endif
#ifndef CONFIG_SF_DEFAULT_BUS
# define CONFIG_SF_DEFAULT_BUS		0
#endif

struct spi_slave;

/**
 * struct spi_flash - SPI flash structure
 *
 * @spi:		SPI slave
 * @dev:		SPI flash device
 * @name:		Name of SPI flash
 * @dual_flash:		Indicates dual flash memories - dual stacked, parallel
 * @shift:		Flash shift useful in dual parallel
 * @flags:		Indication of spi flash flags
 * @size:		Total flash size
 * @page_size:		Write (page) size
 * @sector_size:	Sector size
 * @erase_size:		Erase size
 * @bank_read_cmd:	Bank read cmd
 * @bank_write_cmd:	Bank write cmd
 * @bank_curr:		Current flash bank
 * @erase_cmd:		Erase cmd 4K, 32K, 64K
 * @read_cmd:		Read cmd - Array Fast, Extn read and quad read.
 * @write_cmd:		Write cmd - page and quad program.
 * @dummy_byte:		Dummy cycles for read operation.
 * @memory_map:		Address of read-only SPI flash access
 * @flash_lock:		lock a region of the SPI Flash
 * @flash_unlock:	unlock a region of the SPI Flash
 * @flash_is_locked:	check if a region of the SPI Flash is completely locked
 * @read:		Flash read ops: Read len bytes at offset into buf
 *			Supported cmds: Fast Array Read
 * @write:		Flash write ops: Write len bytes from buf into offset
 *			Supported cmds: Page Program
 * @erase:		Flash erase ops: Erase len bytes from offset
 *			Supported cmds: Sector erase 4K, 32K, 64K
 * return 0 - Success, 1 - Failure
 */
struct spi_flash {
	struct spi_slave *spi;
#ifdef CONFIG_DM_SPI_FLASH
	struct udevice *dev;
#endif
	const char *name;
	u8 dual_flash;
	u8 shift;
	u16 flags;

	u32 size;
	u32 page_size;
	u32 sector_size;
	u32 erase_size;
#ifdef CONFIG_SPI_FLASH_BAR
	u8 bank_read_cmd;
	u8 bank_write_cmd;
	u8 bank_curr;
#endif
	u8 erase_cmd;
	u8 read_cmd;
	u8 write_cmd;
	u8 dummy_byte;

	void *memory_map;

	int (*flash_lock)(struct spi_flash *flash, u32 ofs, size_t len);
	int (*flash_unlock)(struct spi_flash *flash, u32 ofs, size_t len);
	int (*flash_is_locked)(struct spi_flash *flash, u32 ofs, size_t len);
#ifndef CONFIG_DM_SPI_FLASH
	/*
	 * These are not strictly needed for driver model, but keep them here
	 * while the transition is in progress.
	 *
	 * Normally each driver would provide its own operations, but for
	 * SPI flash most chips use the same algorithms. One approach is
	 * to create a 'common' SPI flash device which knows how to talk
	 * to most devices, and then allow other drivers to be used instead
	 * if required, perhaps with a way of scanning through the list to
	 * find the driver that matches the device.
	 */
	int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
	int (*write)(struct spi_flash *flash, u32 offset, size_t len,
			const void *buf);
	int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
#endif
};

struct dm_spi_flash_ops {
	int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf);
	int (*write)(struct udevice *dev, u32 offset, size_t len,
		     const void *buf);
	int (*erase)(struct udevice *dev, u32 offset, size_t len);
};

/* Access the serial operations for a device */
#define sf_get_ops(dev) ((struct dm_spi_flash_ops *)(dev)->driver->ops)

#ifdef CONFIG_DM_SPI_FLASH
/**
 * spi_flash_read_dm() - Read data from SPI flash
 *
 * @dev:	SPI flash device
 * @offset:	Offset into device in bytes to read from
 * @len:	Number of bytes to read
 * @buf:	Buffer to put the data that is read
 * @return 0 if OK, -ve on error
 */
int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf);

/**
 * spi_flash_write_dm() - Write data to SPI flash
 *
 * @dev:	SPI flash device
 * @offset:	Offset into device in bytes to write to
 * @len:	Number of bytes to write
 * @buf:	Buffer containing bytes to write
 * @return 0 if OK, -ve on error
 */
int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
		       const void *buf);

/**
 * spi_flash_erase_dm() - Erase blocks of the SPI flash
 *
 * Note that @len must be a muiltiple of the flash sector size.
 *
 * @dev:	SPI flash device
 * @offset:	Offset into device in bytes to start erasing
 * @len:	Number of bytes to erase
 * @return 0 if OK, -ve on error
 */
int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len);

int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
			   unsigned int max_hz, unsigned int spi_mode,
			   struct udevice **devp);

/* Compatibility function - this is the old U-Boot API */
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
				  unsigned int max_hz, unsigned int spi_mode);

/* Compatibility function - this is the old U-Boot API */
void spi_flash_free(struct spi_flash *flash);

static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
				 size_t len, void *buf)
{
	return spi_flash_read_dm(flash->dev, offset, len, buf);
}

static inline int spi_flash_write(struct spi_flash *flash, u32 offset,
				  size_t len, const void *buf)
{
	return spi_flash_write_dm(flash->dev, offset, len, buf);
}

static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
				  size_t len)
{
	return spi_flash_erase_dm(flash->dev, offset, len);
}

struct sandbox_state;

int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
			 struct udevice *bus, ofnode node, const char *spec);

void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);

#else
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
		unsigned int max_hz, unsigned int spi_mode);

void spi_flash_free(struct spi_flash *flash);

static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
		size_t len, void *buf)
{
	return flash->read(flash, offset, len, buf);
}

static inline int spi_flash_write(struct spi_flash *flash, u32 offset,
		size_t len, const void *buf)
{
	return flash->write(flash, offset, len, buf);
}

static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
		size_t len)
{
	return flash->erase(flash, offset, len);
}
#endif

static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,
					bool prot)
{
	if (!flash->flash_lock || !flash->flash_unlock)
		return -EOPNOTSUPP;

	if (prot)
		return flash->flash_lock(flash, ofs, len);
	else
		return flash->flash_unlock(flash, ofs, len);
}

#endif /* _SPI_FLASH_H_ */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0 */
d25ce7d2	2	/*
a5e8199a	3	* Common SPI flash Interface
d25ce7d2 HS	4	*
d25ce7d2 HS	5	* Copyright (C) 2008 Atmel Corporation
a5e8199a	6	* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
d25ce7d2	7	*/
a5e8199a	8
d25ce7d2 HS	9	#ifndef _SPI_FLASH_H_
	10	#define _SPI_FLASH_H_
	11
4c2dbefd	12	#include <dm.h> /* Because we dereference struct udevice here */
e06ab654	13	#include <linux/types.h>
d25ce7d2	14
88e34e5f NK	15	#ifndef CONFIG_SF_DEFAULT_SPEED
	16	# define CONFIG_SF_DEFAULT_SPEED 1000000
	17	#endif
	18	#ifndef CONFIG_SF_DEFAULT_MODE
	19	# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
	20	#endif
	21	#ifndef CONFIG_SF_DEFAULT_CS
	22	# define CONFIG_SF_DEFAULT_CS 0
	23	#endif
	24	#ifndef CONFIG_SF_DEFAULT_BUS
	25	# define CONFIG_SF_DEFAULT_BUS 0
	26	#endif
	27
ff0960f9	28	struct spi_slave;
33adfb5f	29
7ab35d92 JT	30	/**
	31	* struct spi_flash - SPI flash structure
	32	*
	33	* @spi: SPI slave
5d69df35	34	* @dev: SPI flash device
7ab35d92	35	* @name: Name of SPI flash
5d69df35	36	* @dual_flash: Indicates dual flash memories - dual stacked, parallel
056fbc73	37	* @shift: Flash shift useful in dual parallel
1fabefdd	38	* @flags: Indication of spi flash flags
7ab35d92 JT	39	* @size: Total flash size
	40	* @page_size: Write (page) size
	41	* @sector_size: Sector size
5d69df35	42	* @erase_size: Erase size
7ab35d92 JT	43	* @bank_read_cmd: Bank read cmd
	44	* @bank_write_cmd: Bank write cmd
	45	* @bank_curr: Current flash bank
7ab35d92	46	* @erase_cmd: Erase cmd 4K, 32K, 64K
3163aaa6 JT	47	* @read_cmd: Read cmd - Array Fast, Extn read and quad read.
3163aaa6 JT	48	* @write_cmd: Write cmd - page and quad program.
5d69df35 JT	49	* @dummy_byte: Dummy cycles for read operation.
5d69df35 JT	50	* @memory_map: Address of read-only SPI flash access
c3c016cf FE	51	* @flash_lock: lock a region of the SPI Flash
	52	* @flash_unlock: unlock a region of the SPI Flash
	53	* @flash_is_locked: check if a region of the SPI Flash is completely locked
7ab35d92 JT	54	* @read: Flash read ops: Read len bytes at offset into buf
7ab35d92 JT	55	* Supported cmds: Fast Array Read
801cec59	56	* @write: Flash write ops: Write len bytes from buf into offset
7ab35d92 JT	57	* Supported cmds: Page Program
	58	* @erase: Flash erase ops: Erase len bytes from offset
	59	* Supported cmds: Sector erase 4K, 32K, 64K
801cec59	60	* return 0 - Success, 1 - Failure
7ab35d92	61	*/
d25ce7d2 HS	62	struct spi_flash {
d25ce7d2 HS	63	struct spi_slave *spi;
d15e74f1	64	#ifdef CONFIG_DM_SPI_FLASH
4c2dbefd	65	struct udevice *dev;
4c2dbefd	66	#endif
7ab35d92	67	const char *name;
f77f4691	68	u8 dual_flash;
056fbc73	69	u8 shift;
1fabefdd	70	u16 flags;
d25ce7d2	71
7ab35d92 JT	72	u32 size;
	73	u32 page_size;
	74	u32 sector_size;
	75	u32 erase_size;
1dcd6d03	76	#ifdef CONFIG_SPI_FLASH_BAR
7ab35d92 JT	77	u8 bank_read_cmd;
	78	u8 bank_write_cmd;
	79	u8 bank_curr;
1dcd6d03	80	#endif
7ab35d92	81	u8 erase_cmd;
4e09cc1e	82	u8 read_cmd;
3163aaa6	83	u8 write_cmd;
ff063ed4	84	u8 dummy_byte;
615a1561	85
7ab35d92	86	void *memory_map;
c3c016cf FE	87
	88	int (flash_lock)(struct spi_flash flash, u32 ofs, size_t len);
	89	int (flash_unlock)(struct spi_flash flash, u32 ofs, size_t len);
	90	int (flash_is_locked)(struct spi_flash flash, u32 ofs, size_t len);
4c2dbefd SG	91	#ifndef CONFIG_DM_SPI_FLASH
	92	/*
	93	* These are not strictly needed for driver model, but keep them here
d15e74f1	94	* while the transition is in progress.
4c2dbefd SG	95	*
	96	* Normally each driver would provide its own operations, but for
	97	* SPI flash most chips use the same algorithms. One approach is
	98	* to create a 'common' SPI flash device which knows how to talk
	99	* to most devices, and then allow other drivers to be used instead
d15e74f1	100	* if required, perhaps with a way of scanning through the list to
4c2dbefd SG	101	* find the driver that matches the device.
4c2dbefd SG	102	*/
7ab35d92 JT	103	int (read)(struct spi_flash flash, u32 offset, size_t len, void *buf);
	104	int (write)(struct spi_flash flash, u32 offset, size_t len,
	105	const void *buf);
	106	int (erase)(struct spi_flash flash, u32 offset, size_t len);
4c2dbefd SG	107	#endif
	108	};
	109
	110	struct dm_spi_flash_ops {
	111	int (read)(struct udevice dev, u32 offset, size_t len, void *buf);
	112	int (write)(struct udevice dev, u32 offset, size_t len,
	113	const void *buf);
	114	int (erase)(struct udevice dev, u32 offset, size_t len);
d25ce7d2 HS	115	};
d25ce7d2 HS	116
4c2dbefd SG	117	/* Access the serial operations for a device */
	118	#define sf_get_ops(dev) ((struct dm_spi_flash_ops *)(dev)->driver->ops)
	119
	120	#ifdef CONFIG_DM_SPI_FLASH
8d987abc SG	121	/**
	122	* spi_flash_read_dm() - Read data from SPI flash
	123	*
	124	* @dev: SPI flash device
	125	* @offset: Offset into device in bytes to read from
	126	* @len: Number of bytes to read
	127	* @buf: Buffer to put the data that is read
	128	* @return 0 if OK, -ve on error
	129	*/
	130	int spi_flash_read_dm(struct udevice dev, u32 offset, size_t len, void buf);
	131
	132	/**
	133	* spi_flash_write_dm() - Write data to SPI flash
	134	*
	135	* @dev: SPI flash device
	136	* @offset: Offset into device in bytes to write to
	137	* @len: Number of bytes to write
	138	* @buf: Buffer containing bytes to write
	139	* @return 0 if OK, -ve on error
	140	*/
	141	int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
	142	const void *buf);
	143
	144	/**
	145	* spi_flash_erase_dm() - Erase blocks of the SPI flash
	146	*
	147	* Note that @len must be a muiltiple of the flash sector size.
	148	*
	149	* @dev: SPI flash device
	150	* @offset: Offset into device in bytes to start erasing
	151	* @len: Number of bytes to erase
	152	* @return 0 if OK, -ve on error
	153	*/
	154	int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len);
	155
4c2dbefd SG	156	int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
	157	unsigned int max_hz, unsigned int spi_mode,
	158	struct udevice **devp);
	159
	160	/* Compatibility function - this is the old U-Boot API */
	161	struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
	162	unsigned int max_hz, unsigned int spi_mode);
	163
	164	/* Compatibility function - this is the old U-Boot API */
	165	void spi_flash_free(struct spi_flash *flash);
	166
4c2dbefd	167	static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
8d987abc	168	size_t len, void *buf)
4c2dbefd	169	{
8d987abc	170	return spi_flash_read_dm(flash->dev, offset, len, buf);
4c2dbefd SG	171	}
	172
	173	static inline int spi_flash_write(struct spi_flash *flash, u32 offset,
8d987abc	174	size_t len, const void *buf)
4c2dbefd	175	{
8d987abc	176	return spi_flash_write_dm(flash->dev, offset, len, buf);
4c2dbefd SG	177	}
	178
	179	static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
8d987abc	180	size_t len)
4c2dbefd	181	{
8d987abc	182	return spi_flash_erase_dm(flash->dev, offset, len);
4c2dbefd SG	183	}
	184
	185	struct sandbox_state;
	186
	187	int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
008dcddf	188	struct udevice bus, ofnode node, const char spec);
4c2dbefd SG	189
	190	void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
	191
	192	#else
d25ce7d2 HS	193	struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
d25ce7d2 HS	194	unsigned int max_hz, unsigned int spi_mode);
0efc0249	195
d25ce7d2 HS	196	void spi_flash_free(struct spi_flash *flash);
	197
	198	static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
	199	size_t len, void *buf)
	200	{
	201	return flash->read(flash, offset, len, buf);
	202	}
	203
	204	static inline int spi_flash_write(struct spi_flash *flash, u32 offset,
	205	size_t len, const void *buf)
	206	{
	207	return flash->write(flash, offset, len, buf);
	208	}
	209
	210	static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
	211	size_t len)
	212	{
	213	return flash->erase(flash, offset, len);
	214	}
4c2dbefd	215	#endif
d25ce7d2	216
c3c016cf FE	217	static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,
	218	bool prot)
	219	{
439fcb9b	220	if (!flash->flash_lock \|\| !flash->flash_unlock)
c3c016cf FE	221	return -EOPNOTSUPP;
	222
	223	if (prot)
	224	return flash->flash_lock(flash, ofs, len);
	225	else
	226	return flash->flash_unlock(flash, ofs, len);
	227	}
	228
d25ce7d2	229	#endif /* _SPI_FLASH_H_ */