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Commit | Line | Data |
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d25ce7d2 | 1 | /* |
a5e8199a | 2 | * Common SPI flash Interface |
d25ce7d2 HS |
3 | * |
4 | * Copyright (C) 2008 Atmel Corporation | |
a5e8199a | 5 | * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. |
d25ce7d2 HS |
6 | * |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
3765b3e7 | 12 | * version 2 as published by the Free Software Foundation. |
d25ce7d2 | 13 | */ |
a5e8199a | 14 | |
d25ce7d2 HS |
15 | #ifndef _SPI_FLASH_H_ |
16 | #define _SPI_FLASH_H_ | |
17 | ||
18 | #include <spi.h> | |
e06ab654 | 19 | #include <linux/types.h> |
32b11273 | 20 | #include <linux/compiler.h> |
d25ce7d2 | 21 | |
3163aaa6 JT |
22 | /* No enum list for write commands only QPP */ |
23 | #define WR_QPP 1 << 4 | |
24 | ||
25 | /* Enum list - Full read commands */ | |
4e09cc1e JT |
26 | enum spi_read_cmds { |
27 | ARRAY_SLOW = 1 << 0, | |
28 | DUAL_OUTPUT_FAST = 1 << 1, | |
29 | DUAL_IO_FAST = 1 << 2, | |
3163aaa6 | 30 | QUAD_OUTPUT_FAST = 1 << 3, |
c4ba0d82 | 31 | QUAD_IO_FAST = 1 << 4, |
4e09cc1e JT |
32 | }; |
33 | #define RD_EXTN ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST | |
c4ba0d82 | 34 | #define RD_FULL RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST |
4e09cc1e | 35 | |
33adfb5f JT |
36 | /** |
37 | * struct spi_flash_params - SPI/QSPI flash device params structure | |
38 | * | |
39 | * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) | |
40 | * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) | |
41 | * @ext_jedec: Device ext_jedec ID | |
42 | * @sector_size: Sector size of this device | |
43 | * @nr_sectors: No.of sectors on this device | |
44 | * @e_rd_cmd: Enum list for read commands | |
45 | * @flags: Importent param, for flash specific behaviour | |
46 | */ | |
47 | struct spi_flash_params { | |
48 | const char *name; | |
49 | u32 jedec; | |
50 | u16 ext_jedec; | |
51 | u32 sector_size; | |
52 | u32 nr_sectors; | |
53 | u8 e_rd_cmd; | |
54 | u16 flags; | |
55 | }; | |
56 | ||
57 | extern const struct spi_flash_params spi_flash_params_table[]; | |
58 | ||
7ab35d92 JT |
59 | /** |
60 | * struct spi_flash - SPI flash structure | |
61 | * | |
62 | * @spi: SPI slave | |
63 | * @name: Name of SPI flash | |
64 | * @size: Total flash size | |
65 | * @page_size: Write (page) size | |
66 | * @sector_size: Sector size | |
ce22b922 | 67 | * @erase_size: Erase size |
7ab35d92 JT |
68 | * @bank_read_cmd: Bank read cmd |
69 | * @bank_write_cmd: Bank write cmd | |
70 | * @bank_curr: Current flash bank | |
71 | * @poll_cmd: Poll cmd - for flash erase/program | |
72 | * @erase_cmd: Erase cmd 4K, 32K, 64K | |
3163aaa6 JT |
73 | * @read_cmd: Read cmd - Array Fast, Extn read and quad read. |
74 | * @write_cmd: Write cmd - page and quad program. | |
ff063ed4 | 75 | * @dummy_byte: Dummy cycles for read operation. |
ce22b922 | 76 | * @memory_map: Address of read-only SPI flash access |
7ab35d92 JT |
77 | * @read: Flash read ops: Read len bytes at offset into buf |
78 | * Supported cmds: Fast Array Read | |
79 | * @write: Flash write ops: Write len bytes from buf into offeset | |
80 | * Supported cmds: Page Program | |
81 | * @erase: Flash erase ops: Erase len bytes from offset | |
82 | * Supported cmds: Sector erase 4K, 32K, 64K | |
83 | * return 0 - Sucess, 1 - Failure | |
84 | */ | |
d25ce7d2 HS |
85 | struct spi_flash { |
86 | struct spi_slave *spi; | |
7ab35d92 | 87 | const char *name; |
d25ce7d2 | 88 | |
7ab35d92 JT |
89 | u32 size; |
90 | u32 page_size; | |
91 | u32 sector_size; | |
92 | u32 erase_size; | |
1dcd6d03 | 93 | #ifdef CONFIG_SPI_FLASH_BAR |
7ab35d92 JT |
94 | u8 bank_read_cmd; |
95 | u8 bank_write_cmd; | |
96 | u8 bank_curr; | |
1dcd6d03 | 97 | #endif |
7ab35d92 JT |
98 | u8 poll_cmd; |
99 | u8 erase_cmd; | |
4e09cc1e | 100 | u8 read_cmd; |
3163aaa6 | 101 | u8 write_cmd; |
ff063ed4 | 102 | u8 dummy_byte; |
615a1561 | 103 | |
7ab35d92 JT |
104 | void *memory_map; |
105 | int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); | |
106 | int (*write)(struct spi_flash *flash, u32 offset, size_t len, | |
107 | const void *buf); | |
108 | int (*erase)(struct spi_flash *flash, u32 offset, size_t len); | |
d25ce7d2 HS |
109 | }; |
110 | ||
111 | struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, | |
112 | unsigned int max_hz, unsigned int spi_mode); | |
0efc0249 SG |
113 | |
114 | /** | |
115 | * Set up a new SPI flash from an fdt node | |
116 | * | |
117 | * @param blob Device tree blob | |
118 | * @param slave_node Pointer to this SPI slave node in the device tree | |
119 | * @param spi_node Cached pointer to the SPI interface this node belongs | |
120 | * to | |
121 | * @return 0 if ok, -1 on error | |
122 | */ | |
123 | struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, | |
124 | int spi_node); | |
125 | ||
d25ce7d2 HS |
126 | void spi_flash_free(struct spi_flash *flash); |
127 | ||
128 | static inline int spi_flash_read(struct spi_flash *flash, u32 offset, | |
129 | size_t len, void *buf) | |
130 | { | |
131 | return flash->read(flash, offset, len, buf); | |
132 | } | |
133 | ||
134 | static inline int spi_flash_write(struct spi_flash *flash, u32 offset, | |
135 | size_t len, const void *buf) | |
136 | { | |
137 | return flash->write(flash, offset, len, buf); | |
138 | } | |
139 | ||
140 | static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, | |
141 | size_t len) | |
142 | { | |
143 | return flash->erase(flash, offset, len); | |
144 | } | |
145 | ||
32b11273 CR |
146 | void spi_boot(void) __noreturn; |
147 | ||
d25ce7d2 | 148 | #endif /* _SPI_FLASH_H_ */ |