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tpm: Convert to use a device parameter
[thirdparty/u-boot.git] / include / tpm-v2.h
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1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (c) 2018 Bootlin
4 * Author: Miquel Raynal <miquel.raynal@bootlin.com>
5 */
6
7#ifndef __TPM_V2_H
8#define __TPM_V2_H
9
10#include <tpm-common.h>
11
12#define TPM2_DIGEST_LEN 32
13
14/**
15 * TPM2 Structure Tags for command/response buffers.
16 *
17 * @TPM2_ST_NO_SESSIONS: the command does not need an authentication.
18 * @TPM2_ST_SESSIONS: the command needs an authentication.
19 */
20enum tpm2_structures {
21 TPM2_ST_NO_SESSIONS = 0x8001,
22 TPM2_ST_SESSIONS = 0x8002,
23};
24
25/**
26 * TPM2 type of boolean.
27 */
28enum tpm2_yes_no {
29 TPMI_YES = 1,
30 TPMI_NO = 0,
31};
32
33/**
34 * TPM2 startup values.
35 *
36 * @TPM2_SU_CLEAR: reset the internal state.
37 * @TPM2_SU_STATE: restore saved state (if any).
38 */
39enum tpm2_startup_types {
40 TPM2_SU_CLEAR = 0x0000,
41 TPM2_SU_STATE = 0x0001,
42};
43
44/**
45 * TPM2 permanent handles.
46 *
47 * @TPM2_RH_OWNER: refers to the 'owner' hierarchy.
48 * @TPM2_RS_PW: indicates a password.
49 * @TPM2_RH_LOCKOUT: refers to the 'lockout' hierarchy.
50 * @TPM2_RH_ENDORSEMENT: refers to the 'endorsement' hierarchy.
51 * @TPM2_RH_PLATFORM: refers to the 'platform' hierarchy.
52 */
53enum tpm2_handles {
54 TPM2_RH_OWNER = 0x40000001,
55 TPM2_RS_PW = 0x40000009,
56 TPM2_RH_LOCKOUT = 0x4000000A,
57 TPM2_RH_ENDORSEMENT = 0x4000000B,
58 TPM2_RH_PLATFORM = 0x4000000C,
59};
60
61/**
62 * TPM2 command codes used at the beginning of a buffer, gives the command.
63 *
64 * @TPM2_CC_STARTUP: TPM2_Startup().
65 * @TPM2_CC_SELF_TEST: TPM2_SelfTest().
66 * @TPM2_CC_CLEAR: TPM2_Clear().
67 * @TPM2_CC_CLEARCONTROL: TPM2_ClearControl().
68 * @TPM2_CC_HIERCHANGEAUTH: TPM2_HierarchyChangeAuth().
69 * @TPM2_CC_PCR_SETAUTHPOL: TPM2_PCR_SetAuthPolicy().
70 * @TPM2_CC_DAM_RESET: TPM2_DictionaryAttackLockReset().
71 * @TPM2_CC_DAM_PARAMETERS: TPM2_DictionaryAttackParameters().
72 * @TPM2_CC_GET_CAPABILITY: TPM2_GetCapibility().
73 * @TPM2_CC_PCR_READ: TPM2_PCR_Read().
74 * @TPM2_CC_PCR_EXTEND: TPM2_PCR_Extend().
75 * @TPM2_CC_PCR_SETAUTHVAL: TPM2_PCR_SetAuthValue().
76 */
77enum tpm2_command_codes {
78 TPM2_CC_STARTUP = 0x0144,
79 TPM2_CC_SELF_TEST = 0x0143,
80 TPM2_CC_CLEAR = 0x0126,
81 TPM2_CC_CLEARCONTROL = 0x0127,
82 TPM2_CC_HIERCHANGEAUTH = 0x0129,
b9dd4fab 83 TPM2_CC_PCR_SETAUTHPOL = 0x012C,
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84 TPM2_CC_DAM_RESET = 0x0139,
85 TPM2_CC_DAM_PARAMETERS = 0x013A,
998af319 86 TPM2_CC_NV_READ = 0x014E,
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87 TPM2_CC_GET_CAPABILITY = 0x017A,
88 TPM2_CC_PCR_READ = 0x017E,
89 TPM2_CC_PCR_EXTEND = 0x0182,
b9dd4fab 90 TPM2_CC_PCR_SETAUTHVAL = 0x0183,
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91};
92
93/**
94 * TPM2 return codes.
95 */
96enum tpm2_return_codes {
97 TPM2_RC_SUCCESS = 0x0000,
98 TPM2_RC_BAD_TAG = 0x001E,
99 TPM2_RC_FMT1 = 0x0080,
100 TPM2_RC_HASH = TPM2_RC_FMT1 + 0x0003,
101 TPM2_RC_VALUE = TPM2_RC_FMT1 + 0x0004,
102 TPM2_RC_SIZE = TPM2_RC_FMT1 + 0x0015,
103 TPM2_RC_BAD_AUTH = TPM2_RC_FMT1 + 0x0022,
104 TPM2_RC_HANDLE = TPM2_RC_FMT1 + 0x000B,
105 TPM2_RC_VER1 = 0x0100,
106 TPM2_RC_INITIALIZE = TPM2_RC_VER1 + 0x0000,
107 TPM2_RC_FAILURE = TPM2_RC_VER1 + 0x0001,
108 TPM2_RC_DISABLED = TPM2_RC_VER1 + 0x0020,
109 TPM2_RC_AUTH_MISSING = TPM2_RC_VER1 + 0x0025,
110 TPM2_RC_COMMAND_CODE = TPM2_RC_VER1 + 0x0043,
111 TPM2_RC_AUTHSIZE = TPM2_RC_VER1 + 0x0044,
112 TPM2_RC_AUTH_CONTEXT = TPM2_RC_VER1 + 0x0045,
113 TPM2_RC_NEEDS_TEST = TPM2_RC_VER1 + 0x0053,
114 TPM2_RC_WARN = 0x0900,
115 TPM2_RC_TESTING = TPM2_RC_WARN + 0x000A,
116 TPM2_RC_REFERENCE_H0 = TPM2_RC_WARN + 0x0010,
117 TPM2_RC_LOCKOUT = TPM2_RC_WARN + 0x0021,
118};
119
120/**
121 * TPM2 algorithms.
122 */
123enum tpm2_algorithms {
124 TPM2_ALG_XOR = 0x0A,
125 TPM2_ALG_SHA256 = 0x0B,
126 TPM2_ALG_SHA384 = 0x0C,
127 TPM2_ALG_SHA512 = 0x0D,
128 TPM2_ALG_NULL = 0x10,
129};
130
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131/**
132 * Issue a TPM2_Startup command.
133 *
abdc7b8a 134 * @dev TPM device
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135 * @mode TPM startup mode
136 *
137 * @return code of the operation
138 */
abdc7b8a 139u32 tpm2_startup(struct udevice *dev, enum tpm2_startup_types mode);
1922df20 140
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141/**
142 * Issue a TPM2_SelfTest command.
143 *
abdc7b8a 144 * @dev TPM device
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145 * @full_test Asking to perform all tests or only the untested ones
146 *
147 * @return code of the operation
148 */
abdc7b8a 149u32 tpm2_self_test(struct udevice *dev, enum tpm2_yes_no full_test);
2dc6d97e 150
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151/**
152 * Issue a TPM2_Clear command.
153 *
abdc7b8a 154 * @dev TPM device
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155 * @handle Handle
156 * @pw Password
157 * @pw_sz Length of the password
158 *
159 * @return code of the operation
160 */
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161u32 tpm2_clear(struct udevice *dev, u32 handle, const char *pw,
162 const ssize_t pw_sz);
bad8ff56 163
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164/**
165 * Issue a TPM2_PCR_Extend command.
166 *
abdc7b8a 167 * @dev TPM device
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168 * @index Index of the PCR
169 * @digest Value representing the event to be recorded
170 *
171 * @return code of the operation
172 */
abdc7b8a 173u32 tpm2_pcr_extend(struct udevice *dev, u32 index, const uint8_t *digest);
6284be5a 174
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175/**
176 * Issue a TPM2_PCR_Read command.
177 *
abdc7b8a 178 * @dev TPM device
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179 * @idx Index of the PCR
180 * @idx_min_sz Minimum size in bytes of the pcrSelect array
181 * @data Output buffer for contents of the named PCR
182 * @updates Optional out parameter: number of updates for this PCR
183 *
184 * @return code of the operation
185 */
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186u32 tpm2_pcr_read(struct udevice *dev, u32 idx, unsigned int idx_min_sz,
187 void *data, unsigned int *updates);
1c4ea8f4 188
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189/**
190 * Issue a TPM2_GetCapability command. This implementation is limited
191 * to query property index that is 4-byte wide.
192 *
abdc7b8a 193 * @dev TPM device
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194 * @capability Partition of capabilities
195 * @property Further definition of capability, limited to be 4 bytes wide
196 * @buf Output buffer for capability information
197 * @prop_count Size of output buffer
198 *
199 * @return code of the operation
200 */
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201u32 tpm2_get_capability(struct udevice *dev, u32 capability, u32 property,
202 void *buf, size_t prop_count);
69cd8f06 203
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204/**
205 * Issue a TPM2_DictionaryAttackLockReset command.
206 *
abdc7b8a 207 * @dev TPM device
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208 * @pw Password
209 * @pw_sz Length of the password
210 *
211 * @return code of the operation
212 */
abdc7b8a 213u32 tpm2_dam_reset(struct udevice *dev, const char *pw, const ssize_t pw_sz);
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214
215/**
216 * Issue a TPM2_DictionaryAttackParameters command.
217 *
abdc7b8a 218 * @dev TPM device
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219 * @pw Password
220 * @pw_sz Length of the password
221 * @max_tries Count of authorizations before lockout
222 * @recovery_time Time before decrementation of the failure count
223 * @lockout_recovery Time to wait after a lockout
224 *
225 * @return code of the operation
226 */
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227u32 tpm2_dam_parameters(struct udevice *dev, const char *pw,
228 const ssize_t pw_sz, unsigned int max_tries,
229 unsigned int recovery_time,
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230 unsigned int lockout_recovery);
231
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232/**
233 * Issue a TPM2_HierarchyChangeAuth command.
234 *
abdc7b8a 235 * @dev TPM device
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236 * @handle Handle
237 * @newpw New password
238 * @newpw_sz Length of the new password
239 * @oldpw Old password
240 * @oldpw_sz Length of the old password
241 *
242 * @return code of the operation
243 */
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244int tpm2_change_auth(struct udevice *dev, u32 handle, const char *newpw,
245 const ssize_t newpw_sz, const char *oldpw,
246 const ssize_t oldpw_sz);
dc26e913 247
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248/**
249 * Issue a TPM_PCR_SetAuthPolicy command.
250 *
abdc7b8a 251 * @dev TPM device
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252 * @pw Platform password
253 * @pw_sz Length of the password
254 * @index Index of the PCR
255 * @digest New key to access the PCR
256 *
257 * @return code of the operation
258 */
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259u32 tpm2_pcr_setauthpolicy(struct udevice *dev, const char *pw,
260 const ssize_t pw_sz, u32 index, const char *key);
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261
262/**
263 * Issue a TPM_PCR_SetAuthValue command.
264 *
abdc7b8a 265 * @dev TPM device
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266 * @pw Platform password
267 * @pw_sz Length of the password
268 * @index Index of the PCR
269 * @digest New key to access the PCR
270 * @key_sz Length of the new key
271 *
272 * @return code of the operation
273 */
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274u32 tpm2_pcr_setauthvalue(struct udevice *dev, const char *pw,
275 const ssize_t pw_sz, u32 index, const char *key,
276 const ssize_t key_sz);
b9dd4fab 277
ff32245b 278#endif /* __TPM_V2_H */