[people/ms/u-boot.git] / include / usb / ulpi.h

/*
 * Generic ULPI interface.
 *
 * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
 * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
 *
 * Authors: Jana Rapava <fermata7@gmail.com>
 *	    Igor Grinberg <grinberg@compulab.co.il>
 *
 * Register offsets taken from:
 * linux/include/linux/usb/ulpi.h
 *
 * Original Copyrights follow:
 * Copyright (C) 2010 Nokia Corporation
 *
 * This software is distributed under the terms of the GNU General
 * Public License ("GPL") as published by the Free Software Foundation,
 * version 2 of that License.
 */

#ifndef __USB_ULPI_H__
#define __USB_ULPI_H__

#define ULPI_ERROR	(1 << 8) /* overflow from any register value */

#ifndef CONFIG_USB_ULPI_TIMEOUT
#define CONFIG_USB_ULPI_TIMEOUT 1000	/* timeout in us */
#endif

/*
 * ulpi view port address and
 * Port_number that can be passed.
 * Any additional data to be passed can
 * be extended from this structure
 */
struct ulpi_viewport {
	u32 viewport_addr;
	u32 port_num;
};

/*
 * Initialize the ULPI transciever and check the interface integrity.
 * @ulpi_vp -  structure containing ULPI viewport data
 *
 * returns 0 on success, ULPI_ERROR on failure.
 */
int ulpi_init(struct ulpi_viewport *ulpi_vp);

/*
 * Select transceiver speed.
 * @speed	- ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default),
 *                ULPI_FC_LOW_SPEED,  ULPI_FC_FS4LS
 * returns 0 on success, ULPI_ERROR on failure.
 */
int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed);

/*
 * Enable/disable VBUS.
 * @ext_power		- external VBUS supply is used (default is false)
 * @ext_indicator	- external VBUS over-current indicator is used
 *
 * returns 0 on success, ULPI_ERROR on failure.
 */
int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp,
			int on, int ext_power, int ext_ind);

/*
 * Enable/disable pull-down resistors on D+ and D- USB lines.
 *
 * returns 0 on success, ULPI_ERROR on failure.
 */
int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable);

/*
 * Select OpMode.
 * @opmode	- ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING,
 *		  ULPI_FC_OPMODE_DISABLE_NRZI,	   ULPI_FC_OPMODE_NOSYNC_NOEOP
 *
 * returns 0 on success, ULPI_ERROR on failure.
 */
int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode);

/*
 * Switch to Serial Mode.
 * @smode	- ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE
 *
 * returns 0 on success, ULPI_ERROR on failure.
 *
 * Notes:
 * Switches immediately to Serial Mode.
 * To return from Serial Mode, STP line needs to be asserted.
 */
int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode);

/*
 * Put PHY into low power mode.
 *
 * returns 0 on success, ULPI_ERROR on failure.
 *
 * Notes:
 * STP line must be driven low to keep the PHY in suspend.
 * To resume the PHY, STP line needs to be asserted.
 */
int ulpi_suspend(struct ulpi_viewport *ulpi_vp);

/*
 * Reset the transceiver. ULPI interface and registers are not affected.
 *
 * returns 0 on success, ULPI_ERROR on failure.
 */
int ulpi_reset(struct ulpi_viewport *ulpi_vp);


/* ULPI access methods below must be implemented for each ULPI viewport. */

/*
 * Write to the ULPI PHY register via the viewport.
 * @reg		- the ULPI register (one of the fields in struct ulpi_regs).
 * @value	- the value - only 8 lower bits are used, others ignored.
 *
 * returns 0 on success, ULPI_ERROR on failure.
 */
int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value);

/*
 * Read the ULPI PHY register content via the viewport.
 * @reg		- the ULPI register (one of the fields in struct ulpi_regs).
 *
 * returns register content on success, ULPI_ERROR on failure.
 */
u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg);

/*
 * Wait for the reset to complete.
 * The Link must not attempt to access the PHY until the reset has
 * completed and DIR line is de-asserted.
 */
int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp);

/* Access Extended Register Set (indicator) */
#define ACCESS_EXT_REGS_OFFSET	0x2f	/* read-write */
/* Vendor-specific */
#define VENDOR_SPEC_OFFSET	0x30

/*
 * Extended Register Set
 *
 * Addresses 0x00-0x3F map directly to Immediate Register Set.
 * Addresses 0x40-0x7F are reserved.
 * Addresses 0x80-0xff are vendor-specific.
 */
#define EXT_VENDOR_SPEC_OFFSET	0x80

/* ULPI registers, bits and offsets definitions */
struct ulpi_regs {
	/* Vendor ID and Product ID: 0x00 - 0x03 Read-only */
	u8	vendor_id_low;
	u8	vendor_id_high;
	u8	product_id_low;
	u8	product_id_high;
	/* Function Control: 0x04 - 0x06 Read */
	u8	function_ctrl;		/* 0x04 Write */
	u8	function_ctrl_set;	/* 0x05 Set */
	u8	function_ctrl_clear;	/* 0x06 Clear */
	/* Interface Control: 0x07 - 0x09 Read */
	u8	iface_ctrl;		/* 0x07 Write */
	u8	iface_ctrl_set;		/* 0x08 Set */
	u8	iface_ctrl_clear;	/* 0x09 Clear */
	/* OTG Control: 0x0A - 0x0C Read */
	u8	otg_ctrl;		/* 0x0A Write */
	u8	otg_ctrl_set;		/* 0x0B Set */
	u8	otg_ctrl_clear;		/* 0x0C Clear */
	/* USB Interrupt Enable Rising: 0x0D - 0x0F Read */
	u8	usb_ie_rising;		/* 0x0D Write */
	u8	usb_ie_rising_set;	/* 0x0E Set */
	u8	usb_ie_rising_clear;	/* 0x0F Clear */
	/* USB Interrupt Enable Falling: 0x10 - 0x12 Read */
	u8	usb_ie_falling;		/* 0x10 Write */
	u8	usb_ie_falling_set;	/* 0x11 Set */
	u8	usb_ie_falling_clear;	/* 0x12 Clear */
	/* USB Interrupt Status: 0x13 Read-only */
	u8	usb_int_status;
	/* USB Interrupt Latch: 0x14 Read-only with auto-clear */
	u8	usb_int_latch;
	/* Debug: 0x15 Read-only */
	u8	debug;
	/* Scratch Register: 0x16 - 0x18 Read */
	u8	scratch;		/* 0x16 Write */
	u8	scratch_set;		/* 0x17 Set */
	u8	scratch_clear;		/* 0x18 Clear */
	/*
	 * Optional Carkit registers:
	 * Carkit Control: 0x19 - 0x1B Read
	 */
	u8	carkit_ctrl;		/* 0x19 Write */
	u8	carkit_ctrl_set;	/* 0x1A Set */
	u8	carkit_ctrl_clear;	/* 0x1B Clear */
	/* Carkit Interrupt Delay: 0x1C Read, Write */
	u8	carkit_int_delay;
	/* Carkit Interrupt Enable: 0x1D - 0x1F Read */
	u8	carkit_ie;		/* 0x1D Write */
	u8	carkit_ie_set;		/* 0x1E Set */
	u8	carkit_ie_clear;	/* 0x1F Clear */
	/* Carkit Interrupt Status: 0x20 Read-only */
	u8	carkit_int_status;
	/* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */
	u8	carkit_int_latch;
	/* Carkit Pulse Control: 0x22 - 0x24 Read */
	u8	carkit_pulse_ctrl;		/* 0x22 Write */
	u8	carkit_pulse_ctrl_set;		/* 0x23 Set */
	u8	carkit_pulse_ctrl_clear;	/* 0x24 Clear */
	/*
	 * Other optional registers:
	 * Transmit Positive Width: 0x25 Read, Write
	 */
	u8	transmit_pos_width;
	/* Transmit Negative Width: 0x26 Read, Write */
	u8	transmit_neg_width;
	/* Receive Polarity Recovery: 0x27 Read, Write */
	u8	recv_pol_recovery;
	/*
	 * Addresses 0x28 - 0x2E are reserved, so we use offsets
	 * for immediate registers with higher addresses
	 */
};

/*
 * Register Bits
 */

/* Function Control */
#define ULPI_FC_XCVRSEL_MASK		(3 << 0)
#define ULPI_FC_HIGH_SPEED		(0 << 0)
#define ULPI_FC_FULL_SPEED		(1 << 0)
#define ULPI_FC_LOW_SPEED		(2 << 0)
#define ULPI_FC_FS4LS			(3 << 0)
#define ULPI_FC_TERMSELECT		(1 << 2)
#define ULPI_FC_OPMODE_MASK		(3 << 3)
#define ULPI_FC_OPMODE_NORMAL		(0 << 3)
#define ULPI_FC_OPMODE_NONDRIVING	(1 << 3)
#define ULPI_FC_OPMODE_DISABLE_NRZI	(2 << 3)
#define ULPI_FC_OPMODE_NOSYNC_NOEOP	(3 << 3)
#define ULPI_FC_RESET			(1 << 5)
#define ULPI_FC_SUSPENDM		(1 << 6)

/* Interface Control */
#define ULPI_IFACE_6_PIN_SERIAL_MODE	(1 << 0)
#define ULPI_IFACE_3_PIN_SERIAL_MODE	(1 << 1)
#define ULPI_IFACE_CARKITMODE		(1 << 2)
#define ULPI_IFACE_CLOCKSUSPENDM	(1 << 3)
#define ULPI_IFACE_AUTORESUME		(1 << 4)
#define ULPI_IFACE_EXTVBUS_COMPLEMENT	(1 << 5)
#define ULPI_IFACE_PASSTHRU		(1 << 6)
#define ULPI_IFACE_PROTECT_IFC_DISABLE	(1 << 7)

/* OTG Control */
#define ULPI_OTG_ID_PULLUP		(1 << 0)
#define ULPI_OTG_DP_PULLDOWN		(1 << 1)
#define ULPI_OTG_DM_PULLDOWN		(1 << 2)
#define ULPI_OTG_DISCHRGVBUS		(1 << 3)
#define ULPI_OTG_CHRGVBUS		(1 << 4)
#define ULPI_OTG_DRVVBUS		(1 << 5)
#define ULPI_OTG_DRVVBUS_EXT		(1 << 6)
#define ULPI_OTG_EXTVBUSIND		(1 << 7)

/*
 * USB Interrupt Enable Rising,
 * USB Interrupt Enable Falling,
 * USB Interrupt Status and
 * USB Interrupt Latch
 */
#define ULPI_INT_HOST_DISCONNECT	(1 << 0)
#define ULPI_INT_VBUS_VALID		(1 << 1)
#define ULPI_INT_SESS_VALID		(1 << 2)
#define ULPI_INT_SESS_END		(1 << 3)
#define ULPI_INT_IDGRD			(1 << 4)

/* Debug */
#define ULPI_DEBUG_LINESTATE0		(1 << 0)
#define ULPI_DEBUG_LINESTATE1		(1 << 1)

/* Carkit Control */
#define ULPI_CARKIT_CTRL_CARKITPWR		(1 << 0)
#define ULPI_CARKIT_CTRL_IDGNDDRV		(1 << 1)
#define ULPI_CARKIT_CTRL_TXDEN			(1 << 2)
#define ULPI_CARKIT_CTRL_RXDEN			(1 << 3)
#define ULPI_CARKIT_CTRL_SPKLEFTEN		(1 << 4)
#define ULPI_CARKIT_CTRL_SPKRIGHTEN		(1 << 5)
#define ULPI_CARKIT_CTRL_MICEN			(1 << 6)

/* Carkit Interrupt Enable */
#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE		(1 << 0)
#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL		(1 << 1)
#define ULPI_CARKIT_INT_EN_CARINTDET		(1 << 2)
#define ULPI_CARKIT_INT_EN_DP_RISE		(1 << 3)
#define ULPI_CARKIT_INT_EN_DP_FALL		(1 << 4)

/* Carkit Interrupt Status and Latch */
#define ULPI_CARKIT_INT_IDFLOAT			(1 << 0)
#define ULPI_CARKIT_INT_CARINTDET		(1 << 1)
#define ULPI_CARKIT_INT_DP			(1 << 2)

/* Carkit Pulse Control*/
#define ULPI_CARKIT_PLS_CTRL_TXPLSEN		(1 << 0)
#define ULPI_CARKIT_PLS_CTRL_RXPLSEN		(1 << 1)
#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN	(1 << 2)
#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN	(1 << 3)


#endif /* __USB_ULPI_H__ */
Commit	Line	Data
f93022c3 JR	1	/*
	2	* Generic ULPI interface.
	3	*
	4	* Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
	5	* Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
	6	*
	7	* Authors: Jana Rapava <fermata7@gmail.com>
	8	* Igor Grinberg <grinberg@compulab.co.il>
	9	*
	10	* Register offsets taken from:
	11	* linux/include/linux/usb/ulpi.h
	12	*
	13	* Original Copyrights follow:
	14	* Copyright (C) 2010 Nokia Corporation
	15	*
	16	* This software is distributed under the terms of the GNU General
	17	* Public License ("GPL") as published by the Free Software Foundation,
	18	* version 2 of that License.
	19	*/
	20
	21	#ifndef __USB_ULPI_H__
	22	#define __USB_ULPI_H__
	23
	24	#define ULPI_ERROR (1 << 8) /* overflow from any register value */
	25
	26	#ifndef CONFIG_USB_ULPI_TIMEOUT
	27	#define CONFIG_USB_ULPI_TIMEOUT 1000 /* timeout in us */
	28	#endif
	29
3e6e809f G	30	/*
	31	* ulpi view port address and
	32	* Port_number that can be passed.
	33	* Any additional data to be passed can
	34	* be extended from this structure
	35	*/
	36	struct ulpi_viewport {
	37	u32 viewport_addr;
	38	u32 port_num;
	39	};
	40
f93022c3 JR	41	/*
f93022c3 JR	42	* Initialize the ULPI transciever and check the interface integrity.
3e6e809f	43	* @ulpi_vp - structure containing ULPI viewport data
f93022c3 JR	44	*
	45	* returns 0 on success, ULPI_ERROR on failure.
	46	*/
3e6e809f	47	int ulpi_init(struct ulpi_viewport *ulpi_vp);
f93022c3 JR	48
	49	/*
	50	* Select transceiver speed.
	51	* @speed - ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default),
	52	* ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS
	53	* returns 0 on success, ULPI_ERROR on failure.
	54	*/
3e6e809f	55	int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed);
f93022c3 JR	56
	57	/*
	58	* Enable/disable VBUS.
	59	* @ext_power - external VBUS supply is used (default is false)
	60	* @ext_indicator - external VBUS over-current indicator is used
	61	*
	62	* returns 0 on success, ULPI_ERROR on failure.
	63	*/
749f8180	64	int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp,
3e6e809f	65	int on, int ext_power, int ext_ind);
f93022c3 JR	66
	67	/*
	68	* Enable/disable pull-down resistors on D+ and D- USB lines.
	69	*
	70	* returns 0 on success, ULPI_ERROR on failure.
	71	*/
3e6e809f	72	int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable);
f93022c3 JR	73
	74	/*
	75	* Select OpMode.
	76	* @opmode - ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING,
	77	* ULPI_FC_OPMODE_DISABLE_NRZI, ULPI_FC_OPMODE_NOSYNC_NOEOP
	78	*
	79	* returns 0 on success, ULPI_ERROR on failure.
	80	*/
3e6e809f	81	int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode);
f93022c3 JR	82
	83	/*
	84	* Switch to Serial Mode.
	85	* @smode - ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE
	86	*
	87	* returns 0 on success, ULPI_ERROR on failure.
	88	*
	89	* Notes:
	90	* Switches immediately to Serial Mode.
	91	* To return from Serial Mode, STP line needs to be asserted.
	92	*/
3e6e809f	93	int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode);
f93022c3 JR	94
	95	/*
	96	* Put PHY into low power mode.
	97	*
	98	* returns 0 on success, ULPI_ERROR on failure.
	99	*
	100	* Notes:
	101	* STP line must be driven low to keep the PHY in suspend.
	102	* To resume the PHY, STP line needs to be asserted.
	103	*/
3e6e809f	104	int ulpi_suspend(struct ulpi_viewport *ulpi_vp);
f93022c3 JR	105
	106	/*
	107	* Reset the transceiver. ULPI interface and registers are not affected.
	108	*
	109	* returns 0 on success, ULPI_ERROR on failure.
	110	*/
3e6e809f	111	int ulpi_reset(struct ulpi_viewport *ulpi_vp);
f93022c3 JR	112
	113
	114	/* ULPI access methods below must be implemented for each ULPI viewport. */
	115
	116	/*
	117	* Write to the ULPI PHY register via the viewport.
	118	* @reg - the ULPI register (one of the fields in struct ulpi_regs).
	119	* @value - the value - only 8 lower bits are used, others ignored.
	120	*
	121	* returns 0 on success, ULPI_ERROR on failure.
	122	*/
3e6e809f	123	int ulpi_write(struct ulpi_viewport ulpi_vp, u8 reg, u32 value);
f93022c3 JR	124
	125	/*
	126	* Read the ULPI PHY register content via the viewport.
	127	* @reg - the ULPI register (one of the fields in struct ulpi_regs).
	128	*
	129	* returns register content on success, ULPI_ERROR on failure.
	130	*/
3e6e809f	131	u32 ulpi_read(struct ulpi_viewport ulpi_vp, u8 reg);
f93022c3 JR	132
	133	/*
	134	* Wait for the reset to complete.
	135	* The Link must not attempt to access the PHY until the reset has
	136	* completed and DIR line is de-asserted.
	137	*/
3e6e809f	138	int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp);
f93022c3 JR	139
	140	/* Access Extended Register Set (indicator) */
	141	#define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */
	142	/* Vendor-specific */
	143	#define VENDOR_SPEC_OFFSET 0x30
	144
	145	/*
	146	* Extended Register Set
	147	*
	148	* Addresses 0x00-0x3F map directly to Immediate Register Set.
	149	* Addresses 0x40-0x7F are reserved.
	150	* Addresses 0x80-0xff are vendor-specific.
	151	*/
	152	#define EXT_VENDOR_SPEC_OFFSET 0x80
	153
	154	/* ULPI registers, bits and offsets definitions */
	155	struct ulpi_regs {
	156	/* Vendor ID and Product ID: 0x00 - 0x03 Read-only */
	157	u8 vendor_id_low;
	158	u8 vendor_id_high;
	159	u8 product_id_low;
	160	u8 product_id_high;
	161	/* Function Control: 0x04 - 0x06 Read */
	162	u8 function_ctrl; /* 0x04 Write */
	163	u8 function_ctrl_set; /* 0x05 Set */
	164	u8 function_ctrl_clear; /* 0x06 Clear */
	165	/* Interface Control: 0x07 - 0x09 Read */
	166	u8 iface_ctrl; /* 0x07 Write */
	167	u8 iface_ctrl_set; /* 0x08 Set */
	168	u8 iface_ctrl_clear; /* 0x09 Clear */
	169	/* OTG Control: 0x0A - 0x0C Read */
	170	u8 otg_ctrl; /* 0x0A Write */
	171	u8 otg_ctrl_set; /* 0x0B Set */
	172	u8 otg_ctrl_clear; /* 0x0C Clear */
	173	/* USB Interrupt Enable Rising: 0x0D - 0x0F Read */
	174	u8 usb_ie_rising; /* 0x0D Write */
	175	u8 usb_ie_rising_set; /* 0x0E Set */
	176	u8 usb_ie_rising_clear; /* 0x0F Clear */
	177	/* USB Interrupt Enable Falling: 0x10 - 0x12 Read */
	178	u8 usb_ie_falling; /* 0x10 Write */
	179	u8 usb_ie_falling_set; /* 0x11 Set */
	180	u8 usb_ie_falling_clear; /* 0x12 Clear */
	181	/* USB Interrupt Status: 0x13 Read-only */
	182	u8 usb_int_status;
	183	/* USB Interrupt Latch: 0x14 Read-only with auto-clear */
	184	u8 usb_int_latch;
	185	/* Debug: 0x15 Read-only */
	186	u8 debug;
	187	/* Scratch Register: 0x16 - 0x18 Read */
	188	u8 scratch; /* 0x16 Write */
	189	u8 scratch_set; /* 0x17 Set */
	190	u8 scratch_clear; /* 0x18 Clear */
	191	/*
	192	* Optional Carkit registers:
	193	* Carkit Control: 0x19 - 0x1B Read
	194	*/
	195	u8 carkit_ctrl; /* 0x19 Write */
	196	u8 carkit_ctrl_set; /* 0x1A Set */
	197	u8 carkit_ctrl_clear; /* 0x1B Clear */
	198	/* Carkit Interrupt Delay: 0x1C Read, Write */
	199	u8 carkit_int_delay;
	200	/* Carkit Interrupt Enable: 0x1D - 0x1F Read */
	201	u8 carkit_ie; /* 0x1D Write */
	202	u8 carkit_ie_set; /* 0x1E Set */
203	u8 carkit_ie_clear; /* 0x1F Clear */
204	/* Carkit Interrupt Status: 0x20 Read-only */
205	u8 carkit_int_status;
206	/* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */
207	u8 carkit_int_latch;
208	/* Carkit Pulse Control: 0x22 - 0x24 Read */
209	u8 carkit_pulse_ctrl; /* 0x22 Write */
210	u8 carkit_pulse_ctrl_set; /* 0x23 Set */
211	u8 carkit_pulse_ctrl_clear; /* 0x24 Clear */
212	/*
213	* Other optional registers:
214	* Transmit Positive Width: 0x25 Read, Write
215	*/
216	u8 transmit_pos_width;
217	/* Transmit Negative Width: 0x26 Read, Write */
218	u8 transmit_neg_width;
219	/* Receive Polarity Recovery: 0x27 Read, Write */
220	u8 recv_pol_recovery;
221	/*
222	* Addresses 0x28 - 0x2E are reserved, so we use offsets
223	* for immediate registers with higher addresses
224	*/
225	};
226
227	/*
228	* Register Bits
229	*/
230
231	/* Function Control */
232	#define ULPI_FC_XCVRSEL_MASK (3 << 0)
233	#define ULPI_FC_HIGH_SPEED (0 << 0)
234	#define ULPI_FC_FULL_SPEED (1 << 0)
235	#define ULPI_FC_LOW_SPEED (2 << 0)
236	#define ULPI_FC_FS4LS (3 << 0)
237	#define ULPI_FC_TERMSELECT (1 << 2)
238	#define ULPI_FC_OPMODE_MASK (3 << 3)
239	#define ULPI_FC_OPMODE_NORMAL (0 << 3)
240	#define ULPI_FC_OPMODE_NONDRIVING (1 << 3)
241	#define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3)
242	#define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3)
243	#define ULPI_FC_RESET (1 << 5)
244	#define ULPI_FC_SUSPENDM (1 << 6)
245
246	/* Interface Control */
247	#define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0)
248	#define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1)
249	#define ULPI_IFACE_CARKITMODE (1 << 2)
250	#define ULPI_IFACE_CLOCKSUSPENDM (1 << 3)
251	#define ULPI_IFACE_AUTORESUME (1 << 4)
252	#define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5)
253	#define ULPI_IFACE_PASSTHRU (1 << 6)
254	#define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7)
255
256	/* OTG Control */
257	#define ULPI_OTG_ID_PULLUP (1 << 0)
258	#define ULPI_OTG_DP_PULLDOWN (1 << 1)
259	#define ULPI_OTG_DM_PULLDOWN (1 << 2)
260	#define ULPI_OTG_DISCHRGVBUS (1 << 3)
261	#define ULPI_OTG_CHRGVBUS (1 << 4)
262	#define ULPI_OTG_DRVVBUS (1 << 5)
263	#define ULPI_OTG_DRVVBUS_EXT (1 << 6)
264	#define ULPI_OTG_EXTVBUSIND (1 << 7)
265
266	/*
267	* USB Interrupt Enable Rising,
268	* USB Interrupt Enable Falling,
269	* USB Interrupt Status and
270	* USB Interrupt Latch
271	*/
272	#define ULPI_INT_HOST_DISCONNECT (1 << 0)
273	#define ULPI_INT_VBUS_VALID (1 << 1)
274	#define ULPI_INT_SESS_VALID (1 << 2)
275	#define ULPI_INT_SESS_END (1 << 3)
276	#define ULPI_INT_IDGRD (1 << 4)
277
278	/* Debug */
279	#define ULPI_DEBUG_LINESTATE0 (1 << 0)
280	#define ULPI_DEBUG_LINESTATE1 (1 << 1)
281
282	/* Carkit Control */
283	#define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0)
284	#define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1)
285	#define ULPI_CARKIT_CTRL_TXDEN (1 << 2)
286	#define ULPI_CARKIT_CTRL_RXDEN (1 << 3)
287	#define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4)
288	#define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5)
289	#define ULPI_CARKIT_CTRL_MICEN (1 << 6)
290
291	/* Carkit Interrupt Enable */
292	#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0)
293	#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1)
294	#define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2)
295	#define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3)
296	#define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4)
297
298	/* Carkit Interrupt Status and Latch */
299	#define ULPI_CARKIT_INT_IDFLOAT (1 << 0)
300	#define ULPI_CARKIT_INT_CARINTDET (1 << 1)
301	#define ULPI_CARKIT_INT_DP (1 << 2)
302
303	/* Carkit Pulse Control*/
304	#define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
305	#define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
306	#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
307	#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
308
309
310	#endif /* __USB_ULPI_H__ */