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c609719b WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. | |
4 | * Keith Outwater, keith_outwater@mvis.com | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
c609719b WD |
7 | */ |
8 | ||
9 | #ifndef _VIRTEX2_H_ | |
10 | #define _VIRTEX2_H_ | |
11 | ||
12 | #include <xilinx.h> | |
13 | ||
14cfc4f3 | 14 | extern struct xilinx_fpga_op virtex2_op; |
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15 | |
16 | /* | |
17 | * Slave SelectMap Implementation function table. | |
18 | */ | |
19 | typedef struct { | |
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20 | xilinx_pre_fn pre; |
21 | xilinx_pgm_fn pgm; | |
22 | xilinx_init_fn init; | |
23 | xilinx_err_fn err; | |
24 | xilinx_done_fn done; | |
25 | xilinx_clk_fn clk; | |
26 | xilinx_cs_fn cs; | |
27 | xilinx_wr_fn wr; | |
28 | xilinx_rdata_fn rdata; | |
29 | xilinx_wdata_fn wdata; | |
30 | xilinx_busy_fn busy; | |
31 | xilinx_abort_fn abort; | |
32 | xilinx_post_fn post; | |
d9071ce0 | 33 | } xilinx_virtex2_slave_selectmap_fns; |
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34 | |
35 | /* Slave Serial Implementation function table */ | |
36 | typedef struct { | |
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37 | xilinx_pgm_fn pgm; |
38 | xilinx_clk_fn clk; | |
39 | xilinx_rdata_fn rdata; | |
40 | xilinx_wdata_fn wdata; | |
d9071ce0 | 41 | } xilinx_virtex2_slave_serial_fns; |
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42 | |
43 | /* Device Image Sizes (in bytes) | |
44 | *********************************************************************/ | |
45 | #define XILINX_XC2V40_SIZE (338208 / 8) | |
46 | #define XILINX_XC2V80_SIZE (597408 / 8) | |
47 | #define XILINX_XC2V250_SIZE (1591584 / 8) | |
48 | #define XILINX_XC2V500_SIZE (2557857 / 8) | |
49 | #define XILINX_XC2V1000_SIZE (3749408 / 8) | |
50 | #define XILINX_XC2V1500_SIZE (5166240 / 8) | |
51 | #define XILINX_XC2V2000_SIZE (6808352 / 8) | |
52 | #define XILINX_XC2V3000_SIZE (9589408 / 8) | |
53 | #define XILINX_XC2V4000_SIZE (14220192 / 8) | |
54 | #define XILINX_XC2V6000_SIZE (19752096 / 8) | |
55 | #define XILINX_XC2V8000_SIZE (26185120 / 8) | |
56 | #define XILINX_XC2V10000_SIZE (33519264 / 8) | |
57 | ||
58 | /* Descriptor Macros | |
59 | *********************************************************************/ | |
60 | #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 61 | { xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op } |
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62 | |
63 | #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 64 | { xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op } |
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65 | |
66 | #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 67 | { xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op } |
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68 | |
69 | #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 70 | { xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op } |
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71 | |
72 | #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 73 | { xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op } |
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74 | |
75 | #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 76 | { xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op } |
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77 | |
78 | #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 79 | { xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op } |
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80 | |
81 | #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 82 | { xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op } |
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83 | |
84 | #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 85 | { xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op } |
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86 | |
87 | #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 88 | { xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op } |
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89 | |
90 | #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 91 | { xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op } |
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92 | |
93 | #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \ | |
14cfc4f3 | 94 | { xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op } |
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95 | |
96 | #endif /* _VIRTEX2_H_ */ |