projects / people / amarx / ipfire-3.x.git / blame
| Commit | Line | Data |
|---|---|---|
| 94cce289 MT |
1 | From 12833bacf5d904c2dac0c3f52b2ebde5f2c5a2bc Mon Sep 17 00:00:00 2001 |
| 2 | From: Ard Biesheuvel <ard.biesheuvel@linaro.org> | |
| 3 | Date: Wed, 25 Mar 2015 07:41:43 +0100 | |
| 4 | Subject: ARM: 8325/1: exynos: move resume code to .text section | |
| 5 | ||
| 6 | This code calls cpu_resume() using a straight branch (b), so | |
| 7 | now that we have moved cpu_resume() back to .text, this should | |
| 8 | be moved there as well. Any direct references to symbols that will | |
| 9 | remain in the .data section are replaced with explicit PC-relative | |
| 10 | references. | |
| 11 | ||
| 12 | Acked-by: Nicolas Pitre <nico@linaro.org> | |
| 13 | Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> | |
| 14 | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | |
| 15 | ||
| 16 | diff --git a/arch/arm/mach-exynos/sleep.S b/arch/arm/mach-exynos/sleep.S | |
| 17 | index 31d2583..cf95079 100644 | |
| 18 | --- a/arch/arm/mach-exynos/sleep.S | |
| 19 | +++ b/arch/arm/mach-exynos/sleep.S | |
| 20 | @@ -23,14 +23,7 @@ | |
| 21 | #define CPU_MASK 0xff0ffff0 | |
| 22 | #define CPU_CORTEX_A9 0x410fc090 | |
| 23 | ||
| 24 | - /* | |
| 25 | - * The following code is located into the .data section. This is to | |
| 26 | - * allow l2x0_regs_phys to be accessed with a relative load while we | |
| 27 | - * can't rely on any MMU translation. We could have put l2x0_regs_phys | |
| 28 | - * in the .text section as well, but some setups might insist on it to | |
| 29 | - * be truly read-only. (Reference from: arch/arm/kernel/sleep.S) | |
| 30 | - */ | |
| 31 | - .data | |
| 32 | + .text | |
| 33 | .align | |
| 34 | ||
| 35 | /* | |
| 36 | @@ -69,10 +62,12 @@ ENTRY(exynos_cpu_resume_ns) | |
| 37 | cmp r0, r1 | |
| 38 | bne skip_cp15 | |
| 39 | ||
| 40 | - adr r0, cp15_save_power | |
| 41 | + adr r0, _cp15_save_power | |
| 42 | ldr r1, [r0] | |
| 43 | - adr r0, cp15_save_diag | |
| 44 | + ldr r1, [r0, r1] | |
| 45 | + adr r0, _cp15_save_diag | |
| 46 | ldr r2, [r0] | |
| 47 | + ldr r2, [r0, r2] | |
| 48 | mov r0, #SMC_CMD_C15RESUME | |
| 49 | dsb | |
| 50 | smc #0 | |
| 51 | @@ -118,14 +113,20 @@ skip_l2x0: | |
| 52 | skip_cp15: | |
| 53 | b cpu_resume | |
| 54 | ENDPROC(exynos_cpu_resume_ns) | |
| 55 | + | |
| 56 | + .align | |
| 57 | +_cp15_save_power: | |
| 58 | + .long cp15_save_power - . | |
| 59 | +_cp15_save_diag: | |
| 60 | + .long cp15_save_diag - . | |
| 61 | +#ifdef CONFIG_CACHE_L2X0 | |
| 62 | +1: .long l2x0_saved_regs - . | |
| 63 | +#endif /* CONFIG_CACHE_L2X0 */ | |
| 64 | + | |
| 65 | + .data | |
| 66 | .globl cp15_save_diag | |
| 67 | cp15_save_diag: | |
| 68 | .long 0 @ cp15 diagnostic | |
| 69 | .globl cp15_save_power | |
| 70 | cp15_save_power: | |
| 71 | .long 0 @ cp15 power control | |
| 72 | - | |
| 73 | -#ifdef CONFIG_CACHE_L2X0 | |
| 74 | - .align | |
| 75 | -1: .long l2x0_saved_regs - . | |
| 76 | -#endif /* CONFIG_CACHE_L2X0 */ | |
| 77 | -- | |
| 78 | cgit v0.10.2 | |
| 79 |