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Commit | Line | Data |
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0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * For licencing details see kernel-base/COPYING | |
8 | */ | |
9 | ||
10 | #include <linux/fs.h> | |
11 | #include <linux/cpu.h> | |
12 | #include <linux/smp.h> | |
04289bb9 | 13 | #include <linux/file.h> |
0793a61d TG |
14 | #include <linux/poll.h> |
15 | #include <linux/sysfs.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/percpu.h> | |
18 | #include <linux/uaccess.h> | |
19 | #include <linux/syscalls.h> | |
20 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 21 | #include <linux/kernel_stat.h> |
0793a61d TG |
22 | #include <linux/perf_counter.h> |
23 | ||
24 | /* | |
25 | * Each CPU has a list of per CPU counters: | |
26 | */ | |
27 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
28 | ||
088e2852 | 29 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
30 | static int perf_reserved_percpu __read_mostly; |
31 | static int perf_overcommit __read_mostly = 1; | |
32 | ||
33 | /* | |
34 | * Mutex for (sysadmin-configurable) counter reservations: | |
35 | */ | |
36 | static DEFINE_MUTEX(perf_resource_mutex); | |
37 | ||
38 | /* | |
39 | * Architecture provided APIs - weak aliases: | |
40 | */ | |
5c92d124 | 41 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 42 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 43 | { |
ff6f0541 | 44 | return NULL; |
0793a61d TG |
45 | } |
46 | ||
01b2838c | 47 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 48 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 49 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
50 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
51 | struct perf_cpu_context *cpuctx, | |
52 | struct perf_counter_context *ctx, int cpu) | |
53 | { | |
54 | return 0; | |
55 | } | |
0793a61d | 56 | |
4eb96fcf PM |
57 | void __weak perf_counter_print_debug(void) { } |
58 | ||
04289bb9 IM |
59 | static void |
60 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
61 | { | |
62 | struct perf_counter *group_leader = counter->group_leader; | |
63 | ||
64 | /* | |
65 | * Depending on whether it is a standalone or sibling counter, | |
66 | * add it straight to the context's counter list, or to the group | |
67 | * leader's sibling list: | |
68 | */ | |
69 | if (counter->group_leader == counter) | |
70 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
71 | else | |
72 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); | |
73 | } | |
74 | ||
75 | static void | |
76 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
77 | { | |
78 | struct perf_counter *sibling, *tmp; | |
79 | ||
80 | list_del_init(&counter->list_entry); | |
81 | ||
04289bb9 IM |
82 | /* |
83 | * If this was a group counter with sibling counters then | |
84 | * upgrade the siblings to singleton counters by adding them | |
85 | * to the context list directly: | |
86 | */ | |
87 | list_for_each_entry_safe(sibling, tmp, | |
88 | &counter->sibling_list, list_entry) { | |
89 | ||
90 | list_del_init(&sibling->list_entry); | |
91 | list_add_tail(&sibling->list_entry, &ctx->counter_list); | |
04289bb9 IM |
92 | sibling->group_leader = sibling; |
93 | } | |
94 | } | |
95 | ||
0793a61d TG |
96 | /* |
97 | * Cross CPU call to remove a performance counter | |
98 | * | |
99 | * We disable the counter on the hardware level first. After that we | |
100 | * remove it from the context list. | |
101 | */ | |
04289bb9 | 102 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
103 | { |
104 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
105 | struct perf_counter *counter = info; | |
106 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 107 | unsigned long flags; |
5c92d124 | 108 | u64 perf_flags; |
0793a61d TG |
109 | |
110 | /* | |
111 | * If this is a task context, we need to check whether it is | |
112 | * the current task context of this cpu. If not it has been | |
113 | * scheduled out before the smp call arrived. | |
114 | */ | |
115 | if (ctx->task && cpuctx->task_ctx != ctx) | |
116 | return; | |
117 | ||
aa9c4c0f IM |
118 | curr_rq_lock_irq_save(&flags); |
119 | spin_lock(&ctx->lock); | |
0793a61d | 120 | |
6a930700 | 121 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
6a930700 | 122 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
235c7fc7 | 123 | counter->hw_ops->disable(counter); |
0793a61d TG |
124 | ctx->nr_active--; |
125 | cpuctx->active_oncpu--; | |
126 | counter->task = NULL; | |
235c7fc7 | 127 | counter->oncpu = -1; |
0793a61d TG |
128 | } |
129 | ctx->nr_counters--; | |
130 | ||
131 | /* | |
132 | * Protect the list operation against NMI by disabling the | |
133 | * counters on a global level. NOP for non NMI based counters. | |
134 | */ | |
01b2838c | 135 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 136 | list_del_counter(counter, ctx); |
01b2838c | 137 | hw_perf_restore(perf_flags); |
0793a61d TG |
138 | |
139 | if (!ctx->task) { | |
140 | /* | |
141 | * Allow more per task counters with respect to the | |
142 | * reservation: | |
143 | */ | |
144 | cpuctx->max_pertask = | |
145 | min(perf_max_counters - ctx->nr_counters, | |
146 | perf_max_counters - perf_reserved_percpu); | |
147 | } | |
148 | ||
aa9c4c0f IM |
149 | spin_unlock(&ctx->lock); |
150 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
151 | } |
152 | ||
153 | ||
154 | /* | |
155 | * Remove the counter from a task's (or a CPU's) list of counters. | |
156 | * | |
157 | * Must be called with counter->mutex held. | |
158 | * | |
159 | * CPU counters are removed with a smp call. For task counters we only | |
160 | * call when the task is on a CPU. | |
161 | */ | |
04289bb9 | 162 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
163 | { |
164 | struct perf_counter_context *ctx = counter->ctx; | |
165 | struct task_struct *task = ctx->task; | |
166 | ||
167 | if (!task) { | |
168 | /* | |
169 | * Per cpu counters are removed via an smp call and | |
170 | * the removal is always sucessful. | |
171 | */ | |
172 | smp_call_function_single(counter->cpu, | |
04289bb9 | 173 | __perf_counter_remove_from_context, |
0793a61d TG |
174 | counter, 1); |
175 | return; | |
176 | } | |
177 | ||
178 | retry: | |
04289bb9 | 179 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
180 | counter); |
181 | ||
182 | spin_lock_irq(&ctx->lock); | |
183 | /* | |
184 | * If the context is active we need to retry the smp call. | |
185 | */ | |
04289bb9 | 186 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
187 | spin_unlock_irq(&ctx->lock); |
188 | goto retry; | |
189 | } | |
190 | ||
191 | /* | |
192 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 193 | * can remove the counter safely, if the call above did not |
0793a61d TG |
194 | * succeed. |
195 | */ | |
04289bb9 | 196 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 197 | ctx->nr_counters--; |
04289bb9 | 198 | list_del_counter(counter, ctx); |
0793a61d TG |
199 | counter->task = NULL; |
200 | } | |
201 | spin_unlock_irq(&ctx->lock); | |
202 | } | |
203 | ||
235c7fc7 IM |
204 | static int |
205 | counter_sched_in(struct perf_counter *counter, | |
206 | struct perf_cpu_context *cpuctx, | |
207 | struct perf_counter_context *ctx, | |
208 | int cpu) | |
209 | { | |
210 | if (counter->state == PERF_COUNTER_STATE_OFF) | |
211 | return 0; | |
212 | ||
213 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
214 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
215 | /* | |
216 | * The new state must be visible before we turn it on in the hardware: | |
217 | */ | |
218 | smp_wmb(); | |
219 | ||
220 | if (counter->hw_ops->enable(counter)) { | |
221 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
222 | counter->oncpu = -1; | |
223 | return -EAGAIN; | |
224 | } | |
225 | ||
226 | cpuctx->active_oncpu++; | |
227 | ctx->nr_active++; | |
228 | ||
229 | return 0; | |
230 | } | |
231 | ||
0793a61d | 232 | /* |
235c7fc7 | 233 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
234 | */ |
235 | static void __perf_install_in_context(void *info) | |
236 | { | |
237 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
238 | struct perf_counter *counter = info; | |
239 | struct perf_counter_context *ctx = counter->ctx; | |
240 | int cpu = smp_processor_id(); | |
9b51f66d | 241 | unsigned long flags; |
5c92d124 | 242 | u64 perf_flags; |
0793a61d TG |
243 | |
244 | /* | |
245 | * If this is a task context, we need to check whether it is | |
246 | * the current task context of this cpu. If not it has been | |
247 | * scheduled out before the smp call arrived. | |
248 | */ | |
249 | if (ctx->task && cpuctx->task_ctx != ctx) | |
250 | return; | |
251 | ||
aa9c4c0f IM |
252 | curr_rq_lock_irq_save(&flags); |
253 | spin_lock(&ctx->lock); | |
0793a61d TG |
254 | |
255 | /* | |
256 | * Protect the list operation against NMI by disabling the | |
257 | * counters on a global level. NOP for non NMI based counters. | |
258 | */ | |
01b2838c | 259 | perf_flags = hw_perf_save_disable(); |
0793a61d | 260 | |
235c7fc7 | 261 | list_add_counter(counter, ctx); |
0793a61d TG |
262 | ctx->nr_counters++; |
263 | ||
235c7fc7 | 264 | counter_sched_in(counter, cpuctx, ctx, cpu); |
0793a61d TG |
265 | |
266 | if (!ctx->task && cpuctx->max_pertask) | |
267 | cpuctx->max_pertask--; | |
268 | ||
235c7fc7 IM |
269 | hw_perf_restore(perf_flags); |
270 | ||
aa9c4c0f IM |
271 | spin_unlock(&ctx->lock); |
272 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
273 | } |
274 | ||
275 | /* | |
276 | * Attach a performance counter to a context | |
277 | * | |
278 | * First we add the counter to the list with the hardware enable bit | |
279 | * in counter->hw_config cleared. | |
280 | * | |
281 | * If the counter is attached to a task which is on a CPU we use a smp | |
282 | * call to enable it in the task context. The task might have been | |
283 | * scheduled away, but we check this in the smp call again. | |
284 | */ | |
285 | static void | |
286 | perf_install_in_context(struct perf_counter_context *ctx, | |
287 | struct perf_counter *counter, | |
288 | int cpu) | |
289 | { | |
290 | struct task_struct *task = ctx->task; | |
291 | ||
292 | counter->ctx = ctx; | |
293 | if (!task) { | |
294 | /* | |
295 | * Per cpu counters are installed via an smp call and | |
296 | * the install is always sucessful. | |
297 | */ | |
298 | smp_call_function_single(cpu, __perf_install_in_context, | |
299 | counter, 1); | |
300 | return; | |
301 | } | |
302 | ||
303 | counter->task = task; | |
304 | retry: | |
305 | task_oncpu_function_call(task, __perf_install_in_context, | |
306 | counter); | |
307 | ||
308 | spin_lock_irq(&ctx->lock); | |
309 | /* | |
0793a61d TG |
310 | * we need to retry the smp call. |
311 | */ | |
04289bb9 | 312 | if (ctx->nr_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
313 | spin_unlock_irq(&ctx->lock); |
314 | goto retry; | |
315 | } | |
316 | ||
317 | /* | |
318 | * The lock prevents that this context is scheduled in so we | |
319 | * can add the counter safely, if it the call above did not | |
320 | * succeed. | |
321 | */ | |
04289bb9 IM |
322 | if (list_empty(&counter->list_entry)) { |
323 | list_add_counter(counter, ctx); | |
0793a61d TG |
324 | ctx->nr_counters++; |
325 | } | |
326 | spin_unlock_irq(&ctx->lock); | |
327 | } | |
328 | ||
04289bb9 IM |
329 | static void |
330 | counter_sched_out(struct perf_counter *counter, | |
331 | struct perf_cpu_context *cpuctx, | |
332 | struct perf_counter_context *ctx) | |
333 | { | |
6a930700 | 334 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) |
04289bb9 IM |
335 | return; |
336 | ||
6a930700 | 337 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
235c7fc7 | 338 | counter->hw_ops->disable(counter); |
6a930700 | 339 | counter->oncpu = -1; |
04289bb9 IM |
340 | |
341 | cpuctx->active_oncpu--; | |
342 | ctx->nr_active--; | |
343 | } | |
344 | ||
345 | static void | |
346 | group_sched_out(struct perf_counter *group_counter, | |
347 | struct perf_cpu_context *cpuctx, | |
348 | struct perf_counter_context *ctx) | |
349 | { | |
350 | struct perf_counter *counter; | |
351 | ||
3cbed429 PM |
352 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) |
353 | return; | |
354 | ||
04289bb9 IM |
355 | counter_sched_out(group_counter, cpuctx, ctx); |
356 | ||
357 | /* | |
358 | * Schedule out siblings (if any): | |
359 | */ | |
360 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
361 | counter_sched_out(counter, cpuctx, ctx); | |
362 | } | |
363 | ||
235c7fc7 IM |
364 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
365 | struct perf_cpu_context *cpuctx) | |
366 | { | |
367 | struct perf_counter *counter; | |
3cbed429 | 368 | u64 flags; |
235c7fc7 IM |
369 | |
370 | if (likely(!ctx->nr_counters)) | |
371 | return; | |
372 | ||
373 | spin_lock(&ctx->lock); | |
3cbed429 | 374 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
375 | if (ctx->nr_active) { |
376 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
377 | group_sched_out(counter, cpuctx, ctx); | |
378 | } | |
3cbed429 | 379 | hw_perf_restore(flags); |
235c7fc7 IM |
380 | spin_unlock(&ctx->lock); |
381 | } | |
382 | ||
0793a61d TG |
383 | /* |
384 | * Called from scheduler to remove the counters of the current task, | |
385 | * with interrupts disabled. | |
386 | * | |
387 | * We stop each counter and update the counter value in counter->count. | |
388 | * | |
7671581f | 389 | * This does not protect us against NMI, but disable() |
0793a61d TG |
390 | * sets the disabled bit in the control field of counter _before_ |
391 | * accessing the counter control register. If a NMI hits, then it will | |
392 | * not restart the counter. | |
393 | */ | |
394 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
395 | { | |
396 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
397 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
0793a61d TG |
398 | |
399 | if (likely(!cpuctx->task_ctx)) | |
400 | return; | |
401 | ||
235c7fc7 IM |
402 | __perf_counter_sched_out(ctx, cpuctx); |
403 | ||
0793a61d TG |
404 | cpuctx->task_ctx = NULL; |
405 | } | |
406 | ||
235c7fc7 | 407 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 408 | { |
235c7fc7 | 409 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
410 | } |
411 | ||
7995888f | 412 | static int |
04289bb9 IM |
413 | group_sched_in(struct perf_counter *group_counter, |
414 | struct perf_cpu_context *cpuctx, | |
415 | struct perf_counter_context *ctx, | |
416 | int cpu) | |
417 | { | |
95cdd2e7 | 418 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
419 | int ret; |
420 | ||
421 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
422 | return 0; | |
423 | ||
424 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
425 | if (ret) | |
426 | return ret < 0 ? ret : 0; | |
04289bb9 | 427 | |
95cdd2e7 IM |
428 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
429 | return -EAGAIN; | |
04289bb9 IM |
430 | |
431 | /* | |
432 | * Schedule in siblings as one group (if any): | |
433 | */ | |
7995888f | 434 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
95cdd2e7 IM |
435 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
436 | partial_group = counter; | |
437 | goto group_error; | |
438 | } | |
95cdd2e7 IM |
439 | } |
440 | ||
3cbed429 | 441 | return 0; |
95cdd2e7 IM |
442 | |
443 | group_error: | |
444 | /* | |
445 | * Groups can be scheduled in as one unit only, so undo any | |
446 | * partial group before returning: | |
447 | */ | |
448 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
449 | if (counter == partial_group) | |
450 | break; | |
451 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 452 | } |
95cdd2e7 | 453 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 454 | |
95cdd2e7 | 455 | return -EAGAIN; |
04289bb9 IM |
456 | } |
457 | ||
dd0e6ba2 PM |
458 | /* |
459 | * Return 1 for a software counter, 0 for a hardware counter | |
460 | */ | |
461 | static inline int is_software_counter(struct perf_counter *counter) | |
462 | { | |
463 | return !counter->hw_event.raw && counter->hw_event.type < 0; | |
464 | } | |
465 | ||
466 | /* | |
467 | * Return 1 for a group consisting entirely of software counters, | |
468 | * 0 if the group contains any hardware counters. | |
469 | */ | |
470 | static int is_software_only_group(struct perf_counter *leader) | |
471 | { | |
472 | struct perf_counter *counter; | |
473 | ||
474 | if (!is_software_counter(leader)) | |
475 | return 0; | |
476 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
477 | if (!is_software_counter(counter)) | |
478 | return 0; | |
479 | return 1; | |
480 | } | |
481 | ||
235c7fc7 IM |
482 | static void |
483 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
484 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 485 | { |
0793a61d | 486 | struct perf_counter *counter; |
3cbed429 | 487 | u64 flags; |
dd0e6ba2 | 488 | int can_add_hw = 1; |
0793a61d TG |
489 | |
490 | if (likely(!ctx->nr_counters)) | |
491 | return; | |
492 | ||
493 | spin_lock(&ctx->lock); | |
3cbed429 | 494 | flags = hw_perf_save_disable(); |
04289bb9 | 495 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
04289bb9 IM |
496 | /* |
497 | * Listen to the 'cpu' scheduling filter constraint | |
498 | * of counters: | |
499 | */ | |
0793a61d TG |
500 | if (counter->cpu != -1 && counter->cpu != cpu) |
501 | continue; | |
502 | ||
7995888f | 503 | /* |
3cbed429 | 504 | * If we scheduled in a group atomically and exclusively, |
dd0e6ba2 PM |
505 | * or if this group can't go on, don't add any more |
506 | * hardware counters. | |
7995888f | 507 | */ |
dd0e6ba2 PM |
508 | if (can_add_hw || is_software_only_group(counter)) |
509 | if (group_sched_in(counter, cpuctx, ctx, cpu)) | |
510 | can_add_hw = 0; | |
0793a61d | 511 | } |
3cbed429 | 512 | hw_perf_restore(flags); |
0793a61d | 513 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
514 | } |
515 | ||
516 | /* | |
517 | * Called from scheduler to add the counters of the current task | |
518 | * with interrupts disabled. | |
519 | * | |
520 | * We restore the counter value and then enable it. | |
521 | * | |
522 | * This does not protect us against NMI, but enable() | |
523 | * sets the enabled bit in the control field of counter _before_ | |
524 | * accessing the counter control register. If a NMI hits, then it will | |
525 | * keep the counter running. | |
526 | */ | |
527 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
528 | { | |
529 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
530 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 531 | |
235c7fc7 | 532 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
533 | cpuctx->task_ctx = ctx; |
534 | } | |
535 | ||
235c7fc7 IM |
536 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
537 | { | |
538 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
539 | ||
540 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
541 | } | |
542 | ||
1d1c7ddb IM |
543 | int perf_counter_task_disable(void) |
544 | { | |
545 | struct task_struct *curr = current; | |
546 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
547 | struct perf_counter *counter; | |
aa9c4c0f | 548 | unsigned long flags; |
1d1c7ddb IM |
549 | u64 perf_flags; |
550 | int cpu; | |
551 | ||
552 | if (likely(!ctx->nr_counters)) | |
553 | return 0; | |
554 | ||
aa9c4c0f | 555 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
556 | cpu = smp_processor_id(); |
557 | ||
aa9c4c0f IM |
558 | /* force the update of the task clock: */ |
559 | __task_delta_exec(curr, 1); | |
560 | ||
1d1c7ddb IM |
561 | perf_counter_task_sched_out(curr, cpu); |
562 | ||
563 | spin_lock(&ctx->lock); | |
564 | ||
565 | /* | |
566 | * Disable all the counters: | |
567 | */ | |
568 | perf_flags = hw_perf_save_disable(); | |
569 | ||
9b51f66d | 570 | list_for_each_entry(counter, &ctx->counter_list, list_entry) |
6a930700 | 571 | counter->state = PERF_COUNTER_STATE_OFF; |
9b51f66d | 572 | |
1d1c7ddb IM |
573 | hw_perf_restore(perf_flags); |
574 | ||
575 | spin_unlock(&ctx->lock); | |
576 | ||
aa9c4c0f | 577 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
578 | |
579 | return 0; | |
580 | } | |
581 | ||
582 | int perf_counter_task_enable(void) | |
583 | { | |
584 | struct task_struct *curr = current; | |
585 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
586 | struct perf_counter *counter; | |
aa9c4c0f | 587 | unsigned long flags; |
1d1c7ddb IM |
588 | u64 perf_flags; |
589 | int cpu; | |
590 | ||
591 | if (likely(!ctx->nr_counters)) | |
592 | return 0; | |
593 | ||
aa9c4c0f | 594 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
595 | cpu = smp_processor_id(); |
596 | ||
aa9c4c0f IM |
597 | /* force the update of the task clock: */ |
598 | __task_delta_exec(curr, 1); | |
599 | ||
235c7fc7 IM |
600 | perf_counter_task_sched_out(curr, cpu); |
601 | ||
1d1c7ddb IM |
602 | spin_lock(&ctx->lock); |
603 | ||
604 | /* | |
605 | * Disable all the counters: | |
606 | */ | |
607 | perf_flags = hw_perf_save_disable(); | |
608 | ||
609 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
6a930700 | 610 | if (counter->state != PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 611 | continue; |
6a930700 | 612 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
aa9c4c0f | 613 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
614 | } |
615 | hw_perf_restore(perf_flags); | |
616 | ||
617 | spin_unlock(&ctx->lock); | |
618 | ||
619 | perf_counter_task_sched_in(curr, cpu); | |
620 | ||
aa9c4c0f | 621 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
622 | |
623 | return 0; | |
624 | } | |
625 | ||
235c7fc7 IM |
626 | /* |
627 | * Round-robin a context's counters: | |
628 | */ | |
629 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 630 | { |
0793a61d | 631 | struct perf_counter *counter; |
5c92d124 | 632 | u64 perf_flags; |
0793a61d | 633 | |
235c7fc7 | 634 | if (!ctx->nr_counters) |
0793a61d TG |
635 | return; |
636 | ||
0793a61d | 637 | spin_lock(&ctx->lock); |
0793a61d | 638 | /* |
04289bb9 | 639 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 640 | */ |
01b2838c | 641 | perf_flags = hw_perf_save_disable(); |
04289bb9 IM |
642 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
643 | list_del(&counter->list_entry); | |
644 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
0793a61d TG |
645 | break; |
646 | } | |
01b2838c | 647 | hw_perf_restore(perf_flags); |
0793a61d TG |
648 | |
649 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
650 | } |
651 | ||
652 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
653 | { | |
654 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
655 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
656 | const int rotate_percpu = 0; | |
657 | ||
658 | if (rotate_percpu) | |
659 | perf_counter_cpu_sched_out(cpuctx); | |
660 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 661 | |
235c7fc7 IM |
662 | if (rotate_percpu) |
663 | rotate_ctx(&cpuctx->ctx); | |
664 | rotate_ctx(ctx); | |
665 | ||
666 | if (rotate_percpu) | |
667 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
668 | perf_counter_task_sched_in(curr, cpu); |
669 | } | |
670 | ||
0793a61d TG |
671 | /* |
672 | * Cross CPU call to read the hardware counter | |
673 | */ | |
7671581f | 674 | static void __read(void *info) |
0793a61d | 675 | { |
621a01ea | 676 | struct perf_counter *counter = info; |
aa9c4c0f | 677 | unsigned long flags; |
621a01ea | 678 | |
aa9c4c0f | 679 | curr_rq_lock_irq_save(&flags); |
7671581f | 680 | counter->hw_ops->read(counter); |
aa9c4c0f | 681 | curr_rq_unlock_irq_restore(&flags); |
0793a61d TG |
682 | } |
683 | ||
04289bb9 | 684 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
685 | { |
686 | /* | |
687 | * If counter is enabled and currently active on a CPU, update the | |
688 | * value in the counter structure: | |
689 | */ | |
6a930700 | 690 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 691 | smp_call_function_single(counter->oncpu, |
7671581f | 692 | __read, counter, 1); |
0793a61d TG |
693 | } |
694 | ||
ee06094f | 695 | return atomic64_read(&counter->count); |
0793a61d TG |
696 | } |
697 | ||
698 | /* | |
699 | * Cross CPU call to switch performance data pointers | |
700 | */ | |
701 | static void __perf_switch_irq_data(void *info) | |
702 | { | |
703 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
704 | struct perf_counter *counter = info; | |
705 | struct perf_counter_context *ctx = counter->ctx; | |
706 | struct perf_data *oldirqdata = counter->irqdata; | |
707 | ||
708 | /* | |
709 | * If this is a task context, we need to check whether it is | |
710 | * the current task context of this cpu. If not it has been | |
711 | * scheduled out before the smp call arrived. | |
712 | */ | |
713 | if (ctx->task) { | |
714 | if (cpuctx->task_ctx != ctx) | |
715 | return; | |
716 | spin_lock(&ctx->lock); | |
717 | } | |
718 | ||
719 | /* Change the pointer NMI safe */ | |
720 | atomic_long_set((atomic_long_t *)&counter->irqdata, | |
721 | (unsigned long) counter->usrdata); | |
722 | counter->usrdata = oldirqdata; | |
723 | ||
724 | if (ctx->task) | |
725 | spin_unlock(&ctx->lock); | |
726 | } | |
727 | ||
728 | static struct perf_data *perf_switch_irq_data(struct perf_counter *counter) | |
729 | { | |
730 | struct perf_counter_context *ctx = counter->ctx; | |
731 | struct perf_data *oldirqdata = counter->irqdata; | |
732 | struct task_struct *task = ctx->task; | |
733 | ||
734 | if (!task) { | |
735 | smp_call_function_single(counter->cpu, | |
736 | __perf_switch_irq_data, | |
737 | counter, 1); | |
738 | return counter->usrdata; | |
739 | } | |
740 | ||
741 | retry: | |
742 | spin_lock_irq(&ctx->lock); | |
6a930700 | 743 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) { |
0793a61d TG |
744 | counter->irqdata = counter->usrdata; |
745 | counter->usrdata = oldirqdata; | |
746 | spin_unlock_irq(&ctx->lock); | |
747 | return oldirqdata; | |
748 | } | |
749 | spin_unlock_irq(&ctx->lock); | |
750 | task_oncpu_function_call(task, __perf_switch_irq_data, counter); | |
751 | /* Might have failed, because task was scheduled out */ | |
752 | if (counter->irqdata == oldirqdata) | |
753 | goto retry; | |
754 | ||
755 | return counter->usrdata; | |
756 | } | |
757 | ||
758 | static void put_context(struct perf_counter_context *ctx) | |
759 | { | |
760 | if (ctx->task) | |
761 | put_task_struct(ctx->task); | |
762 | } | |
763 | ||
764 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
765 | { | |
766 | struct perf_cpu_context *cpuctx; | |
767 | struct perf_counter_context *ctx; | |
768 | struct task_struct *task; | |
769 | ||
770 | /* | |
771 | * If cpu is not a wildcard then this is a percpu counter: | |
772 | */ | |
773 | if (cpu != -1) { | |
774 | /* Must be root to operate on a CPU counter: */ | |
775 | if (!capable(CAP_SYS_ADMIN)) | |
776 | return ERR_PTR(-EACCES); | |
777 | ||
778 | if (cpu < 0 || cpu > num_possible_cpus()) | |
779 | return ERR_PTR(-EINVAL); | |
780 | ||
781 | /* | |
782 | * We could be clever and allow to attach a counter to an | |
783 | * offline CPU and activate it when the CPU comes up, but | |
784 | * that's for later. | |
785 | */ | |
786 | if (!cpu_isset(cpu, cpu_online_map)) | |
787 | return ERR_PTR(-ENODEV); | |
788 | ||
789 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
790 | ctx = &cpuctx->ctx; | |
791 | ||
0793a61d TG |
792 | return ctx; |
793 | } | |
794 | ||
795 | rcu_read_lock(); | |
796 | if (!pid) | |
797 | task = current; | |
798 | else | |
799 | task = find_task_by_vpid(pid); | |
800 | if (task) | |
801 | get_task_struct(task); | |
802 | rcu_read_unlock(); | |
803 | ||
804 | if (!task) | |
805 | return ERR_PTR(-ESRCH); | |
806 | ||
807 | ctx = &task->perf_counter_ctx; | |
808 | ctx->task = task; | |
809 | ||
810 | /* Reuse ptrace permission checks for now. */ | |
811 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
812 | put_context(ctx); | |
813 | return ERR_PTR(-EACCES); | |
814 | } | |
815 | ||
816 | return ctx; | |
817 | } | |
818 | ||
819 | /* | |
820 | * Called when the last reference to the file is gone. | |
821 | */ | |
822 | static int perf_release(struct inode *inode, struct file *file) | |
823 | { | |
824 | struct perf_counter *counter = file->private_data; | |
825 | struct perf_counter_context *ctx = counter->ctx; | |
826 | ||
827 | file->private_data = NULL; | |
828 | ||
829 | mutex_lock(&counter->mutex); | |
830 | ||
04289bb9 | 831 | perf_counter_remove_from_context(counter); |
0793a61d TG |
832 | put_context(ctx); |
833 | ||
834 | mutex_unlock(&counter->mutex); | |
835 | ||
836 | kfree(counter); | |
837 | ||
838 | return 0; | |
839 | } | |
840 | ||
841 | /* | |
842 | * Read the performance counter - simple non blocking version for now | |
843 | */ | |
844 | static ssize_t | |
845 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
846 | { | |
847 | u64 cntval; | |
848 | ||
849 | if (count != sizeof(cntval)) | |
850 | return -EINVAL; | |
851 | ||
852 | mutex_lock(&counter->mutex); | |
04289bb9 | 853 | cntval = perf_counter_read(counter); |
0793a61d TG |
854 | mutex_unlock(&counter->mutex); |
855 | ||
856 | return put_user(cntval, (u64 __user *) buf) ? -EFAULT : sizeof(cntval); | |
857 | } | |
858 | ||
859 | static ssize_t | |
860 | perf_copy_usrdata(struct perf_data *usrdata, char __user *buf, size_t count) | |
861 | { | |
862 | if (!usrdata->len) | |
863 | return 0; | |
864 | ||
865 | count = min(count, (size_t)usrdata->len); | |
866 | if (copy_to_user(buf, usrdata->data + usrdata->rd_idx, count)) | |
867 | return -EFAULT; | |
868 | ||
869 | /* Adjust the counters */ | |
870 | usrdata->len -= count; | |
871 | if (!usrdata->len) | |
872 | usrdata->rd_idx = 0; | |
873 | else | |
874 | usrdata->rd_idx += count; | |
875 | ||
876 | return count; | |
877 | } | |
878 | ||
879 | static ssize_t | |
880 | perf_read_irq_data(struct perf_counter *counter, | |
881 | char __user *buf, | |
882 | size_t count, | |
883 | int nonblocking) | |
884 | { | |
885 | struct perf_data *irqdata, *usrdata; | |
886 | DECLARE_WAITQUEUE(wait, current); | |
887 | ssize_t res; | |
888 | ||
889 | irqdata = counter->irqdata; | |
890 | usrdata = counter->usrdata; | |
891 | ||
892 | if (usrdata->len + irqdata->len >= count) | |
893 | goto read_pending; | |
894 | ||
895 | if (nonblocking) | |
896 | return -EAGAIN; | |
897 | ||
898 | spin_lock_irq(&counter->waitq.lock); | |
899 | __add_wait_queue(&counter->waitq, &wait); | |
900 | for (;;) { | |
901 | set_current_state(TASK_INTERRUPTIBLE); | |
902 | if (usrdata->len + irqdata->len >= count) | |
903 | break; | |
904 | ||
905 | if (signal_pending(current)) | |
906 | break; | |
907 | ||
908 | spin_unlock_irq(&counter->waitq.lock); | |
909 | schedule(); | |
910 | spin_lock_irq(&counter->waitq.lock); | |
911 | } | |
912 | __remove_wait_queue(&counter->waitq, &wait); | |
913 | __set_current_state(TASK_RUNNING); | |
914 | spin_unlock_irq(&counter->waitq.lock); | |
915 | ||
916 | if (usrdata->len + irqdata->len < count) | |
917 | return -ERESTARTSYS; | |
918 | read_pending: | |
919 | mutex_lock(&counter->mutex); | |
920 | ||
921 | /* Drain pending data first: */ | |
922 | res = perf_copy_usrdata(usrdata, buf, count); | |
923 | if (res < 0 || res == count) | |
924 | goto out; | |
925 | ||
926 | /* Switch irq buffer: */ | |
927 | usrdata = perf_switch_irq_data(counter); | |
928 | if (perf_copy_usrdata(usrdata, buf + res, count - res) < 0) { | |
929 | if (!res) | |
930 | res = -EFAULT; | |
931 | } else { | |
932 | res = count; | |
933 | } | |
934 | out: | |
935 | mutex_unlock(&counter->mutex); | |
936 | ||
937 | return res; | |
938 | } | |
939 | ||
940 | static ssize_t | |
941 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
942 | { | |
943 | struct perf_counter *counter = file->private_data; | |
944 | ||
9f66a381 | 945 | switch (counter->hw_event.record_type) { |
0793a61d TG |
946 | case PERF_RECORD_SIMPLE: |
947 | return perf_read_hw(counter, buf, count); | |
948 | ||
949 | case PERF_RECORD_IRQ: | |
950 | case PERF_RECORD_GROUP: | |
951 | return perf_read_irq_data(counter, buf, count, | |
952 | file->f_flags & O_NONBLOCK); | |
953 | } | |
954 | return -EINVAL; | |
955 | } | |
956 | ||
957 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
958 | { | |
959 | struct perf_counter *counter = file->private_data; | |
960 | unsigned int events = 0; | |
961 | unsigned long flags; | |
962 | ||
963 | poll_wait(file, &counter->waitq, wait); | |
964 | ||
965 | spin_lock_irqsave(&counter->waitq.lock, flags); | |
966 | if (counter->usrdata->len || counter->irqdata->len) | |
967 | events |= POLLIN; | |
968 | spin_unlock_irqrestore(&counter->waitq.lock, flags); | |
969 | ||
970 | return events; | |
971 | } | |
972 | ||
973 | static const struct file_operations perf_fops = { | |
974 | .release = perf_release, | |
975 | .read = perf_read, | |
976 | .poll = perf_poll, | |
977 | }; | |
978 | ||
95cdd2e7 | 979 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
5c92d124 | 980 | { |
9abf8a08 PM |
981 | int cpu = raw_smp_processor_id(); |
982 | ||
983 | atomic64_set(&counter->hw.prev_count, cpu_clock(cpu)); | |
95cdd2e7 | 984 | return 0; |
5c92d124 IM |
985 | } |
986 | ||
9abf8a08 PM |
987 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
988 | { | |
989 | int cpu = raw_smp_processor_id(); | |
990 | s64 prev; | |
991 | u64 now; | |
992 | ||
993 | now = cpu_clock(cpu); | |
994 | prev = atomic64_read(&counter->hw.prev_count); | |
995 | atomic64_set(&counter->hw.prev_count, now); | |
996 | atomic64_add(now - prev, &counter->count); | |
997 | } | |
998 | ||
5c92d124 IM |
999 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
1000 | { | |
9abf8a08 | 1001 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1002 | } |
1003 | ||
1004 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
1005 | { | |
9abf8a08 | 1006 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1007 | } |
1008 | ||
1009 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
1010 | .enable = cpu_clock_perf_counter_enable, |
1011 | .disable = cpu_clock_perf_counter_disable, | |
1012 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
1013 | }; |
1014 | ||
aa9c4c0f IM |
1015 | /* |
1016 | * Called from within the scheduler: | |
1017 | */ | |
1018 | static u64 task_clock_perf_counter_val(struct perf_counter *counter, int update) | |
bae43c99 | 1019 | { |
aa9c4c0f IM |
1020 | struct task_struct *curr = counter->task; |
1021 | u64 delta; | |
1022 | ||
aa9c4c0f IM |
1023 | delta = __task_delta_exec(curr, update); |
1024 | ||
1025 | return curr->se.sum_exec_runtime + delta; | |
1026 | } | |
1027 | ||
1028 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) | |
1029 | { | |
1030 | u64 prev; | |
8cb391e8 IM |
1031 | s64 delta; |
1032 | ||
1033 | prev = atomic64_read(&counter->hw.prev_count); | |
8cb391e8 IM |
1034 | |
1035 | atomic64_set(&counter->hw.prev_count, now); | |
1036 | ||
1037 | delta = now - prev; | |
8cb391e8 IM |
1038 | |
1039 | atomic64_add(delta, &counter->count); | |
bae43c99 IM |
1040 | } |
1041 | ||
8cb391e8 | 1042 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
bae43c99 | 1043 | { |
aa9c4c0f IM |
1044 | u64 now = task_clock_perf_counter_val(counter, 1); |
1045 | ||
1046 | task_clock_perf_counter_update(counter, now); | |
bae43c99 IM |
1047 | } |
1048 | ||
95cdd2e7 | 1049 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 1050 | { |
aa9c4c0f IM |
1051 | u64 now = task_clock_perf_counter_val(counter, 0); |
1052 | ||
1053 | atomic64_set(&counter->hw.prev_count, now); | |
95cdd2e7 IM |
1054 | |
1055 | return 0; | |
8cb391e8 IM |
1056 | } |
1057 | ||
1058 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 1059 | { |
aa9c4c0f IM |
1060 | u64 now = task_clock_perf_counter_val(counter, 0); |
1061 | ||
1062 | task_clock_perf_counter_update(counter, now); | |
bae43c99 IM |
1063 | } |
1064 | ||
1065 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
1066 | .enable = task_clock_perf_counter_enable, |
1067 | .disable = task_clock_perf_counter_disable, | |
1068 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
1069 | }; |
1070 | ||
e06c61a8 IM |
1071 | static u64 get_page_faults(void) |
1072 | { | |
1073 | struct task_struct *curr = current; | |
1074 | ||
1075 | return curr->maj_flt + curr->min_flt; | |
1076 | } | |
1077 | ||
1078 | static void page_faults_perf_counter_update(struct perf_counter *counter) | |
1079 | { | |
1080 | u64 prev, now; | |
1081 | s64 delta; | |
1082 | ||
1083 | prev = atomic64_read(&counter->hw.prev_count); | |
1084 | now = get_page_faults(); | |
1085 | ||
1086 | atomic64_set(&counter->hw.prev_count, now); | |
1087 | ||
1088 | delta = now - prev; | |
e06c61a8 IM |
1089 | |
1090 | atomic64_add(delta, &counter->count); | |
1091 | } | |
1092 | ||
1093 | static void page_faults_perf_counter_read(struct perf_counter *counter) | |
1094 | { | |
1095 | page_faults_perf_counter_update(counter); | |
1096 | } | |
1097 | ||
95cdd2e7 | 1098 | static int page_faults_perf_counter_enable(struct perf_counter *counter) |
e06c61a8 IM |
1099 | { |
1100 | /* | |
1101 | * page-faults is a per-task value already, | |
1102 | * so we dont have to clear it on switch-in. | |
1103 | */ | |
95cdd2e7 IM |
1104 | |
1105 | return 0; | |
e06c61a8 IM |
1106 | } |
1107 | ||
1108 | static void page_faults_perf_counter_disable(struct perf_counter *counter) | |
1109 | { | |
1110 | page_faults_perf_counter_update(counter); | |
1111 | } | |
1112 | ||
1113 | static const struct hw_perf_counter_ops perf_ops_page_faults = { | |
7671581f IM |
1114 | .enable = page_faults_perf_counter_enable, |
1115 | .disable = page_faults_perf_counter_disable, | |
1116 | .read = page_faults_perf_counter_read, | |
e06c61a8 IM |
1117 | }; |
1118 | ||
5d6a27d8 IM |
1119 | static u64 get_context_switches(void) |
1120 | { | |
1121 | struct task_struct *curr = current; | |
1122 | ||
1123 | return curr->nvcsw + curr->nivcsw; | |
1124 | } | |
1125 | ||
1126 | static void context_switches_perf_counter_update(struct perf_counter *counter) | |
1127 | { | |
1128 | u64 prev, now; | |
1129 | s64 delta; | |
1130 | ||
1131 | prev = atomic64_read(&counter->hw.prev_count); | |
1132 | now = get_context_switches(); | |
1133 | ||
1134 | atomic64_set(&counter->hw.prev_count, now); | |
1135 | ||
1136 | delta = now - prev; | |
5d6a27d8 IM |
1137 | |
1138 | atomic64_add(delta, &counter->count); | |
1139 | } | |
1140 | ||
1141 | static void context_switches_perf_counter_read(struct perf_counter *counter) | |
1142 | { | |
1143 | context_switches_perf_counter_update(counter); | |
1144 | } | |
1145 | ||
95cdd2e7 | 1146 | static int context_switches_perf_counter_enable(struct perf_counter *counter) |
5d6a27d8 IM |
1147 | { |
1148 | /* | |
1149 | * ->nvcsw + curr->nivcsw is a per-task value already, | |
1150 | * so we dont have to clear it on switch-in. | |
1151 | */ | |
95cdd2e7 IM |
1152 | |
1153 | return 0; | |
5d6a27d8 IM |
1154 | } |
1155 | ||
1156 | static void context_switches_perf_counter_disable(struct perf_counter *counter) | |
1157 | { | |
1158 | context_switches_perf_counter_update(counter); | |
1159 | } | |
1160 | ||
1161 | static const struct hw_perf_counter_ops perf_ops_context_switches = { | |
7671581f IM |
1162 | .enable = context_switches_perf_counter_enable, |
1163 | .disable = context_switches_perf_counter_disable, | |
1164 | .read = context_switches_perf_counter_read, | |
5d6a27d8 IM |
1165 | }; |
1166 | ||
6c594c21 IM |
1167 | static inline u64 get_cpu_migrations(void) |
1168 | { | |
1169 | return current->se.nr_migrations; | |
1170 | } | |
1171 | ||
1172 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
1173 | { | |
1174 | u64 prev, now; | |
1175 | s64 delta; | |
1176 | ||
1177 | prev = atomic64_read(&counter->hw.prev_count); | |
1178 | now = get_cpu_migrations(); | |
1179 | ||
1180 | atomic64_set(&counter->hw.prev_count, now); | |
1181 | ||
1182 | delta = now - prev; | |
6c594c21 IM |
1183 | |
1184 | atomic64_add(delta, &counter->count); | |
1185 | } | |
1186 | ||
1187 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
1188 | { | |
1189 | cpu_migrations_perf_counter_update(counter); | |
1190 | } | |
1191 | ||
95cdd2e7 | 1192 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 IM |
1193 | { |
1194 | /* | |
1195 | * se.nr_migrations is a per-task value already, | |
1196 | * so we dont have to clear it on switch-in. | |
1197 | */ | |
95cdd2e7 IM |
1198 | |
1199 | return 0; | |
6c594c21 IM |
1200 | } |
1201 | ||
1202 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
1203 | { | |
1204 | cpu_migrations_perf_counter_update(counter); | |
1205 | } | |
1206 | ||
1207 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
1208 | .enable = cpu_migrations_perf_counter_enable, |
1209 | .disable = cpu_migrations_perf_counter_disable, | |
1210 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
1211 | }; |
1212 | ||
5c92d124 IM |
1213 | static const struct hw_perf_counter_ops * |
1214 | sw_perf_counter_init(struct perf_counter *counter) | |
1215 | { | |
1216 | const struct hw_perf_counter_ops *hw_ops = NULL; | |
1217 | ||
1218 | switch (counter->hw_event.type) { | |
1219 | case PERF_COUNT_CPU_CLOCK: | |
1220 | hw_ops = &perf_ops_cpu_clock; | |
1221 | break; | |
bae43c99 IM |
1222 | case PERF_COUNT_TASK_CLOCK: |
1223 | hw_ops = &perf_ops_task_clock; | |
1224 | break; | |
e06c61a8 IM |
1225 | case PERF_COUNT_PAGE_FAULTS: |
1226 | hw_ops = &perf_ops_page_faults; | |
1227 | break; | |
5d6a27d8 IM |
1228 | case PERF_COUNT_CONTEXT_SWITCHES: |
1229 | hw_ops = &perf_ops_context_switches; | |
1230 | break; | |
6c594c21 IM |
1231 | case PERF_COUNT_CPU_MIGRATIONS: |
1232 | hw_ops = &perf_ops_cpu_migrations; | |
1233 | break; | |
5c92d124 IM |
1234 | default: |
1235 | break; | |
1236 | } | |
1237 | return hw_ops; | |
1238 | } | |
1239 | ||
0793a61d TG |
1240 | /* |
1241 | * Allocate and initialize a counter structure | |
1242 | */ | |
1243 | static struct perf_counter * | |
04289bb9 IM |
1244 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
1245 | int cpu, | |
9b51f66d IM |
1246 | struct perf_counter *group_leader, |
1247 | gfp_t gfpflags) | |
0793a61d | 1248 | { |
5c92d124 | 1249 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 1250 | struct perf_counter *counter; |
0793a61d | 1251 | |
9b51f66d | 1252 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d TG |
1253 | if (!counter) |
1254 | return NULL; | |
1255 | ||
04289bb9 IM |
1256 | /* |
1257 | * Single counters are their own group leaders, with an | |
1258 | * empty sibling list: | |
1259 | */ | |
1260 | if (!group_leader) | |
1261 | group_leader = counter; | |
1262 | ||
0793a61d | 1263 | mutex_init(&counter->mutex); |
04289bb9 IM |
1264 | INIT_LIST_HEAD(&counter->list_entry); |
1265 | INIT_LIST_HEAD(&counter->sibling_list); | |
0793a61d TG |
1266 | init_waitqueue_head(&counter->waitq); |
1267 | ||
9f66a381 IM |
1268 | counter->irqdata = &counter->data[0]; |
1269 | counter->usrdata = &counter->data[1]; | |
1270 | counter->cpu = cpu; | |
1271 | counter->hw_event = *hw_event; | |
1272 | counter->wakeup_pending = 0; | |
04289bb9 | 1273 | counter->group_leader = group_leader; |
621a01ea IM |
1274 | counter->hw_ops = NULL; |
1275 | ||
235c7fc7 | 1276 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
1277 | if (hw_event->disabled) |
1278 | counter->state = PERF_COUNTER_STATE_OFF; | |
1279 | ||
5c92d124 IM |
1280 | hw_ops = NULL; |
1281 | if (!hw_event->raw && hw_event->type < 0) | |
1282 | hw_ops = sw_perf_counter_init(counter); | |
9b51f66d | 1283 | if (!hw_ops) |
5c92d124 | 1284 | hw_ops = hw_perf_counter_init(counter); |
5c92d124 | 1285 | |
621a01ea IM |
1286 | if (!hw_ops) { |
1287 | kfree(counter); | |
1288 | return NULL; | |
1289 | } | |
1290 | counter->hw_ops = hw_ops; | |
0793a61d TG |
1291 | |
1292 | return counter; | |
1293 | } | |
1294 | ||
1295 | /** | |
9f66a381 IM |
1296 | * sys_perf_task_open - open a performance counter, associate it to a task/cpu |
1297 | * | |
1298 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 1299 | * @pid: target pid |
9f66a381 IM |
1300 | * @cpu: target cpu |
1301 | * @group_fd: group leader counter fd | |
0793a61d | 1302 | */ |
1d1c7ddb IM |
1303 | asmlinkage int |
1304 | sys_perf_counter_open(struct perf_counter_hw_event *hw_event_uptr __user, | |
1305 | pid_t pid, int cpu, int group_fd) | |
0793a61d | 1306 | { |
04289bb9 | 1307 | struct perf_counter *counter, *group_leader; |
9f66a381 | 1308 | struct perf_counter_hw_event hw_event; |
04289bb9 | 1309 | struct perf_counter_context *ctx; |
9b51f66d | 1310 | struct file *counter_file = NULL; |
04289bb9 IM |
1311 | struct file *group_file = NULL; |
1312 | int fput_needed = 0; | |
9b51f66d | 1313 | int fput_needed2 = 0; |
0793a61d TG |
1314 | int ret; |
1315 | ||
9f66a381 | 1316 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
1317 | return -EFAULT; |
1318 | ||
04289bb9 | 1319 | /* |
ccff286d IM |
1320 | * Get the target context (task or percpu): |
1321 | */ | |
1322 | ctx = find_get_context(pid, cpu); | |
1323 | if (IS_ERR(ctx)) | |
1324 | return PTR_ERR(ctx); | |
1325 | ||
1326 | /* | |
1327 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
1328 | */ |
1329 | group_leader = NULL; | |
1330 | if (group_fd != -1) { | |
1331 | ret = -EINVAL; | |
1332 | group_file = fget_light(group_fd, &fput_needed); | |
1333 | if (!group_file) | |
ccff286d | 1334 | goto err_put_context; |
04289bb9 | 1335 | if (group_file->f_op != &perf_fops) |
ccff286d | 1336 | goto err_put_context; |
04289bb9 IM |
1337 | |
1338 | group_leader = group_file->private_data; | |
1339 | /* | |
ccff286d IM |
1340 | * Do not allow a recursive hierarchy (this new sibling |
1341 | * becoming part of another group-sibling): | |
1342 | */ | |
1343 | if (group_leader->group_leader != group_leader) | |
1344 | goto err_put_context; | |
1345 | /* | |
1346 | * Do not allow to attach to a group in a different | |
1347 | * task or CPU context: | |
04289bb9 | 1348 | */ |
ccff286d IM |
1349 | if (group_leader->ctx != ctx) |
1350 | goto err_put_context; | |
04289bb9 IM |
1351 | } |
1352 | ||
5c92d124 | 1353 | ret = -EINVAL; |
9b51f66d | 1354 | counter = perf_counter_alloc(&hw_event, cpu, group_leader, GFP_KERNEL); |
0793a61d TG |
1355 | if (!counter) |
1356 | goto err_put_context; | |
1357 | ||
0793a61d TG |
1358 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
1359 | if (ret < 0) | |
9b51f66d IM |
1360 | goto err_free_put_context; |
1361 | ||
1362 | counter_file = fget_light(ret, &fput_needed2); | |
1363 | if (!counter_file) | |
1364 | goto err_free_put_context; | |
1365 | ||
1366 | counter->filp = counter_file; | |
1367 | perf_install_in_context(ctx, counter, cpu); | |
1368 | ||
1369 | fput_light(counter_file, fput_needed2); | |
0793a61d | 1370 | |
04289bb9 IM |
1371 | out_fput: |
1372 | fput_light(group_file, fput_needed); | |
1373 | ||
0793a61d TG |
1374 | return ret; |
1375 | ||
9b51f66d | 1376 | err_free_put_context: |
0793a61d TG |
1377 | kfree(counter); |
1378 | ||
1379 | err_put_context: | |
1380 | put_context(ctx); | |
1381 | ||
04289bb9 | 1382 | goto out_fput; |
0793a61d TG |
1383 | } |
1384 | ||
9b51f66d IM |
1385 | /* |
1386 | * Initialize the perf_counter context in a task_struct: | |
1387 | */ | |
1388 | static void | |
1389 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
1390 | struct task_struct *task) | |
1391 | { | |
1392 | memset(ctx, 0, sizeof(*ctx)); | |
1393 | spin_lock_init(&ctx->lock); | |
1394 | INIT_LIST_HEAD(&ctx->counter_list); | |
1395 | ctx->task = task; | |
1396 | } | |
1397 | ||
1398 | /* | |
1399 | * inherit a counter from parent task to child task: | |
1400 | */ | |
1401 | static int | |
1402 | inherit_counter(struct perf_counter *parent_counter, | |
1403 | struct task_struct *parent, | |
1404 | struct perf_counter_context *parent_ctx, | |
1405 | struct task_struct *child, | |
1406 | struct perf_counter_context *child_ctx) | |
1407 | { | |
1408 | struct perf_counter *child_counter; | |
1409 | ||
1410 | child_counter = perf_counter_alloc(&parent_counter->hw_event, | |
1411 | parent_counter->cpu, NULL, | |
1412 | GFP_ATOMIC); | |
1413 | if (!child_counter) | |
1414 | return -ENOMEM; | |
1415 | ||
1416 | /* | |
1417 | * Link it up in the child's context: | |
1418 | */ | |
1419 | child_counter->ctx = child_ctx; | |
1420 | child_counter->task = child; | |
1421 | list_add_counter(child_counter, child_ctx); | |
1422 | child_ctx->nr_counters++; | |
1423 | ||
1424 | child_counter->parent = parent_counter; | |
9b51f66d IM |
1425 | /* |
1426 | * inherit into child's child as well: | |
1427 | */ | |
1428 | child_counter->hw_event.inherit = 1; | |
1429 | ||
1430 | /* | |
1431 | * Get a reference to the parent filp - we will fput it | |
1432 | * when the child counter exits. This is safe to do because | |
1433 | * we are in the parent and we know that the filp still | |
1434 | * exists and has a nonzero count: | |
1435 | */ | |
1436 | atomic_long_inc(&parent_counter->filp->f_count); | |
1437 | ||
1438 | return 0; | |
1439 | } | |
1440 | ||
1441 | static void | |
1442 | __perf_counter_exit_task(struct task_struct *child, | |
1443 | struct perf_counter *child_counter, | |
1444 | struct perf_counter_context *child_ctx) | |
1445 | { | |
1446 | struct perf_counter *parent_counter; | |
1447 | u64 parent_val, child_val; | |
9b51f66d IM |
1448 | |
1449 | /* | |
235c7fc7 IM |
1450 | * If we do not self-reap then we have to wait for the |
1451 | * child task to unschedule (it will happen for sure), | |
1452 | * so that its counter is at its final count. (This | |
1453 | * condition triggers rarely - child tasks usually get | |
1454 | * off their CPU before the parent has a chance to | |
1455 | * get this far into the reaping action) | |
9b51f66d | 1456 | */ |
235c7fc7 IM |
1457 | if (child != current) { |
1458 | wait_task_inactive(child, 0); | |
1459 | list_del_init(&child_counter->list_entry); | |
1460 | } else { | |
0cc0c027 | 1461 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
1462 | unsigned long flags; |
1463 | u64 perf_flags; | |
1464 | ||
1465 | /* | |
1466 | * Disable and unlink this counter. | |
1467 | * | |
1468 | * Be careful about zapping the list - IRQ/NMI context | |
1469 | * could still be processing it: | |
1470 | */ | |
1471 | curr_rq_lock_irq_save(&flags); | |
1472 | perf_flags = hw_perf_save_disable(); | |
0cc0c027 IM |
1473 | |
1474 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
1475 | ||
235c7fc7 IM |
1476 | if (child_counter->state == PERF_COUNTER_STATE_ACTIVE) { |
1477 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
1478 | child_counter->hw_ops->disable(child_counter); | |
1479 | cpuctx->active_oncpu--; | |
1480 | child_ctx->nr_active--; | |
1481 | child_counter->oncpu = -1; | |
1482 | } | |
0cc0c027 | 1483 | |
235c7fc7 | 1484 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 1485 | |
235c7fc7 | 1486 | child_ctx->nr_counters--; |
9b51f66d | 1487 | |
235c7fc7 IM |
1488 | hw_perf_restore(perf_flags); |
1489 | curr_rq_unlock_irq_restore(&flags); | |
1490 | } | |
9b51f66d IM |
1491 | |
1492 | parent_counter = child_counter->parent; | |
1493 | /* | |
1494 | * It can happen that parent exits first, and has counters | |
1495 | * that are still around due to the child reference. These | |
1496 | * counters need to be zapped - but otherwise linger. | |
1497 | */ | |
1498 | if (!parent_counter) | |
1499 | return; | |
1500 | ||
1501 | parent_val = atomic64_read(&parent_counter->count); | |
1502 | child_val = atomic64_read(&child_counter->count); | |
1503 | ||
1504 | /* | |
1505 | * Add back the child's count to the parent's count: | |
1506 | */ | |
1507 | atomic64_add(child_val, &parent_counter->count); | |
1508 | ||
1509 | fput(parent_counter->filp); | |
1510 | ||
1511 | kfree(child_counter); | |
1512 | } | |
1513 | ||
1514 | /* | |
1515 | * When a child task exist, feed back counter values to parent counters. | |
1516 | * | |
1517 | * Note: we are running in child context, but the PID is not hashed | |
1518 | * anymore so new counters will not be added. | |
1519 | */ | |
1520 | void perf_counter_exit_task(struct task_struct *child) | |
1521 | { | |
1522 | struct perf_counter *child_counter, *tmp; | |
1523 | struct perf_counter_context *child_ctx; | |
1524 | ||
1525 | child_ctx = &child->perf_counter_ctx; | |
1526 | ||
1527 | if (likely(!child_ctx->nr_counters)) | |
1528 | return; | |
1529 | ||
1530 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
1531 | list_entry) | |
1532 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
1533 | } | |
1534 | ||
1535 | /* | |
1536 | * Initialize the perf_counter context in task_struct | |
1537 | */ | |
1538 | void perf_counter_init_task(struct task_struct *child) | |
1539 | { | |
1540 | struct perf_counter_context *child_ctx, *parent_ctx; | |
1541 | struct perf_counter *counter, *parent_counter; | |
1542 | struct task_struct *parent = current; | |
1543 | unsigned long flags; | |
1544 | ||
1545 | child_ctx = &child->perf_counter_ctx; | |
1546 | parent_ctx = &parent->perf_counter_ctx; | |
1547 | ||
1548 | __perf_counter_init_context(child_ctx, child); | |
1549 | ||
1550 | /* | |
1551 | * This is executed from the parent task context, so inherit | |
1552 | * counters that have been marked for cloning: | |
1553 | */ | |
1554 | ||
1555 | if (likely(!parent_ctx->nr_counters)) | |
1556 | return; | |
1557 | ||
1558 | /* | |
1559 | * Lock the parent list. No need to lock the child - not PID | |
1560 | * hashed yet and not running, so nobody can access it. | |
1561 | */ | |
1562 | spin_lock_irqsave(&parent_ctx->lock, flags); | |
1563 | ||
1564 | /* | |
1565 | * We dont have to disable NMIs - we are only looking at | |
1566 | * the list, not manipulating it: | |
1567 | */ | |
1568 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
1569 | if (!counter->hw_event.inherit || counter->group_leader != counter) | |
1570 | continue; | |
1571 | ||
1572 | /* | |
1573 | * Instead of creating recursive hierarchies of counters, | |
1574 | * we link inheritd counters back to the original parent, | |
1575 | * which has a filp for sure, which we use as the reference | |
1576 | * count: | |
1577 | */ | |
1578 | parent_counter = counter; | |
1579 | if (counter->parent) | |
1580 | parent_counter = counter->parent; | |
1581 | ||
1582 | if (inherit_counter(parent_counter, parent, | |
1583 | parent_ctx, child, child_ctx)) | |
1584 | break; | |
1585 | } | |
1586 | ||
1587 | spin_unlock_irqrestore(&parent_ctx->lock, flags); | |
1588 | } | |
1589 | ||
04289bb9 | 1590 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 1591 | { |
04289bb9 | 1592 | struct perf_cpu_context *cpuctx; |
0793a61d | 1593 | |
04289bb9 IM |
1594 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
1595 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
1596 | |
1597 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 1598 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 1599 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 1600 | |
01d0287f | 1601 | hw_perf_counter_setup(cpu); |
0793a61d TG |
1602 | } |
1603 | ||
1604 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 1605 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
1606 | { |
1607 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
1608 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
1609 | struct perf_counter *counter, *tmp; | |
1610 | ||
04289bb9 IM |
1611 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
1612 | __perf_counter_remove_from_context(counter); | |
0793a61d TG |
1613 | |
1614 | } | |
04289bb9 | 1615 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 1616 | { |
04289bb9 | 1617 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
0793a61d TG |
1618 | } |
1619 | #else | |
04289bb9 | 1620 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
1621 | #endif |
1622 | ||
1623 | static int __cpuinit | |
1624 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
1625 | { | |
1626 | unsigned int cpu = (long)hcpu; | |
1627 | ||
1628 | switch (action) { | |
1629 | ||
1630 | case CPU_UP_PREPARE: | |
1631 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 1632 | perf_counter_init_cpu(cpu); |
0793a61d TG |
1633 | break; |
1634 | ||
1635 | case CPU_DOWN_PREPARE: | |
1636 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 1637 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
1638 | break; |
1639 | ||
1640 | default: | |
1641 | break; | |
1642 | } | |
1643 | ||
1644 | return NOTIFY_OK; | |
1645 | } | |
1646 | ||
1647 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
1648 | .notifier_call = perf_cpu_notify, | |
1649 | }; | |
1650 | ||
1651 | static int __init perf_counter_init(void) | |
1652 | { | |
1653 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
1654 | (void *)(long)smp_processor_id()); | |
1655 | register_cpu_notifier(&perf_cpu_nb); | |
1656 | ||
1657 | return 0; | |
1658 | } | |
1659 | early_initcall(perf_counter_init); | |
1660 | ||
1661 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
1662 | { | |
1663 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
1664 | } | |
1665 | ||
1666 | static ssize_t | |
1667 | perf_set_reserve_percpu(struct sysdev_class *class, | |
1668 | const char *buf, | |
1669 | size_t count) | |
1670 | { | |
1671 | struct perf_cpu_context *cpuctx; | |
1672 | unsigned long val; | |
1673 | int err, cpu, mpt; | |
1674 | ||
1675 | err = strict_strtoul(buf, 10, &val); | |
1676 | if (err) | |
1677 | return err; | |
1678 | if (val > perf_max_counters) | |
1679 | return -EINVAL; | |
1680 | ||
1681 | mutex_lock(&perf_resource_mutex); | |
1682 | perf_reserved_percpu = val; | |
1683 | for_each_online_cpu(cpu) { | |
1684 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1685 | spin_lock_irq(&cpuctx->ctx.lock); | |
1686 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
1687 | perf_max_counters - perf_reserved_percpu); | |
1688 | cpuctx->max_pertask = mpt; | |
1689 | spin_unlock_irq(&cpuctx->ctx.lock); | |
1690 | } | |
1691 | mutex_unlock(&perf_resource_mutex); | |
1692 | ||
1693 | return count; | |
1694 | } | |
1695 | ||
1696 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
1697 | { | |
1698 | return sprintf(buf, "%d\n", perf_overcommit); | |
1699 | } | |
1700 | ||
1701 | static ssize_t | |
1702 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
1703 | { | |
1704 | unsigned long val; | |
1705 | int err; | |
1706 | ||
1707 | err = strict_strtoul(buf, 10, &val); | |
1708 | if (err) | |
1709 | return err; | |
1710 | if (val > 1) | |
1711 | return -EINVAL; | |
1712 | ||
1713 | mutex_lock(&perf_resource_mutex); | |
1714 | perf_overcommit = val; | |
1715 | mutex_unlock(&perf_resource_mutex); | |
1716 | ||
1717 | return count; | |
1718 | } | |
1719 | ||
1720 | static SYSDEV_CLASS_ATTR( | |
1721 | reserve_percpu, | |
1722 | 0644, | |
1723 | perf_show_reserve_percpu, | |
1724 | perf_set_reserve_percpu | |
1725 | ); | |
1726 | ||
1727 | static SYSDEV_CLASS_ATTR( | |
1728 | overcommit, | |
1729 | 0644, | |
1730 | perf_show_overcommit, | |
1731 | perf_set_overcommit | |
1732 | ); | |
1733 | ||
1734 | static struct attribute *perfclass_attrs[] = { | |
1735 | &attr_reserve_percpu.attr, | |
1736 | &attr_overcommit.attr, | |
1737 | NULL | |
1738 | }; | |
1739 | ||
1740 | static struct attribute_group perfclass_attr_group = { | |
1741 | .attrs = perfclass_attrs, | |
1742 | .name = "perf_counters", | |
1743 | }; | |
1744 | ||
1745 | static int __init perf_counter_sysfs_init(void) | |
1746 | { | |
1747 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
1748 | &perfclass_attr_group); | |
1749 | } | |
1750 | device_initcall(perf_counter_sysfs_init); |