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CommitLineData
b5220bc6
SG
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
1a459660 3 * SPDX-License-Identifier: GPL-2.0+
b5220bc6
SG
4 */
5
29a23f9d 6#ifndef USE_HOSTCC
b5220bc6 7#include <common.h>
5c33c9fd 8#include <errno.h>
b5220bc6
SG
9#include <serial.h>
10#include <libfdt.h>
11#include <fdtdec.h>
b45122fd 12#include <asm/sections.h>
5c33c9fd 13#include <linux/ctype.h>
b5220bc6
SG
14
15DECLARE_GLOBAL_DATA_PTR;
16
17/*
18 * Here are the type we know about. One day we might allow drivers to
19 * register. For now we just put them here. The COMPAT macro allows us to
20 * turn this into a sparse list later, and keeps the ID with the name.
21 */
22#define COMPAT(id, name) name
23static const char * const compat_names[COMPAT_COUNT] = {
f88fe2de 24 COMPAT(UNKNOWN, "<none>"),
0e35ad05
JZ
25 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
26 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
6642a681 27 COMPAT(NVIDIA_TEGRA20_KBC, "nvidia,tegra20-kbc"),
312693c3 28 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
e1ae0d1f 29 COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
00f37327
SG
30 COMPAT(NVIDIA_TEGRA124_DC, "nvidia,tegra124-dc"),
31 COMPAT(NVIDIA_TEGRA124_SOR, "nvidia,tegra124-sor"),
32 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
87540de3 33 COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
7aaa5a60 34 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
a73ca478 35 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
f4e4e0b0 36 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
c9aa831e 37 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
f315828b
TR
38 COMPAT(NVIDIA_TEGRA124_PCIE, "nvidia,tegra124-pcie"),
39 COMPAT(NVIDIA_TEGRA30_PCIE, "nvidia,tegra30-pcie"),
40 COMPAT(NVIDIA_TEGRA20_PCIE, "nvidia,tegra20-pcie"),
79c7a90f 41 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
7aaa5a60 42 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
cc9fe33a
HR
43 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
44 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
c34253d1 45 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
72dbff12
RS
46 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
47 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
713cb680 48 COMPAT(GOOGLE_CROS_EC_KEYB, "google,cros-ec-keyb"),
6abd1620 49 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
108b85be 50 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
618766c0 51 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
d7377b51 52 COMPAT(SAMSUNG_EXYNOS_FIMD, "samsung,exynos-fimd"),
de461c52 53 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
1e4706a7 54 COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"),
7d3ca0f8 55 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
3577fe8b 56 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
ee1e3c2f 57 COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"),
f37df0f8 58 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
bb8215f4 59 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
7772bb78 60 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
f6267998 61 COMPAT(INFINEON_SLB9635_TPM, "infineon,slb9635-tpm"),
f0e57b1b 62 COMPAT(INFINEON_SLB9645_TPM, "infineon,slb9645tt"),
ecbd7e1e 63 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
7d95f2a3 64 COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
45c480c9 65 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
77f9b1fb 66 COMPAT(INTEL_MICROCODE, "intel,microcode"),
65dd74a6 67 COMPAT(MEMORY_SPD, "memory-spd"),
3ac83935 68 COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),
bb80be39 69 COMPAT(INTEL_MODEL_206AX, "intel,model-206ax"),
effcf067 70 COMPAT(INTEL_GMA, "intel,gma"),
6173c45b 71 COMPAT(AMS_AS3722, "ams,as3722"),
5da38086 72 COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
c89ada01 73 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
5318f18d 74 COMPAT(INTEL_X86_PINCTRL, "intel,x86-pinctrl"),
6462cded 75 COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
90b16d14 76 COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
9c7dea60 77 COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
6ab00db2 78 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
f3b84a30
AB
79 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
80 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
b5220bc6
SG
81};
82
a53f4a29
SG
83const char *fdtdec_get_compatible(enum fdt_compat_id id)
84{
85 /* We allow reading of the 'unknown' ID for testing purposes */
86 assert(id >= 0 && id < COMPAT_COUNT);
87 return compat_names[id];
88}
89
4397a2a8
SG
90fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
91 const char *prop_name, fdt_size_t *sizep)
b5220bc6 92{
236efe36
SG
93 const fdt_addr_t *cell;
94 int len;
b5220bc6 95
1cb2323b 96 debug("%s: %s: ", __func__, prop_name);
236efe36
SG
97 cell = fdt_getprop(blob, node, prop_name, &len);
98 if (cell && ((!sizep && len == sizeof(fdt_addr_t)) ||
99 len == sizeof(fdt_addr_t) * 2)) {
100 fdt_addr_t addr = fdt_addr_to_cpu(*cell);
101 if (sizep) {
102 const fdt_size_t *size;
103
104 size = (fdt_size_t *)((char *)cell +
105 sizeof(fdt_addr_t));
106 *sizep = fdt_size_to_cpu(*size);
107 debug("addr=%08lx, size=%llx\n",
108 (ulong)addr, (u64)*sizep);
109 } else {
110 debug("%08lx\n", (ulong)addr);
111 }
112 return addr;
5b344360 113 }
236efe36
SG
114 debug("(not found)\n");
115 return FDT_ADDR_T_NONE;
b5220bc6
SG
116}
117
4397a2a8
SG
118fdt_addr_t fdtdec_get_addr(const void *blob, int node,
119 const char *prop_name)
120{
121 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
122}
123
a62e84d7
BM
124#ifdef CONFIG_PCI
125int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
126 const char *prop_name, struct fdt_pci_addr *addr)
127{
128 const u32 *cell;
129 int len;
130 int ret = -ENOENT;
131
132 debug("%s: %s: ", __func__, prop_name);
133
134 /*
135 * If we follow the pci bus bindings strictly, we should check
136 * the value of the node's parent node's #address-cells and
137 * #size-cells. They need to be 3 and 2 accordingly. However,
138 * for simplicity we skip the check here.
139 */
140 cell = fdt_getprop(blob, node, prop_name, &len);
141 if (!cell)
142 goto fail;
143
144 if ((len % FDT_PCI_REG_SIZE) == 0) {
145 int num = len / FDT_PCI_REG_SIZE;
146 int i;
147
148 for (i = 0; i < num; i++) {
149 debug("pci address #%d: %08lx %08lx %08lx\n", i,
150 (ulong)fdt_addr_to_cpu(cell[0]),
151 (ulong)fdt_addr_to_cpu(cell[1]),
152 (ulong)fdt_addr_to_cpu(cell[2]));
153 if ((fdt_addr_to_cpu(*cell) & type) == type) {
154 addr->phys_hi = fdt_addr_to_cpu(cell[0]);
155 addr->phys_mid = fdt_addr_to_cpu(cell[1]);
156 addr->phys_lo = fdt_addr_to_cpu(cell[2]);
157 break;
158 } else {
159 cell += (FDT_PCI_ADDR_CELLS +
160 FDT_PCI_SIZE_CELLS);
161 }
162 }
163
106cce96
SG
164 if (i == num) {
165 ret = -ENXIO;
a62e84d7 166 goto fail;
106cce96 167 }
a62e84d7
BM
168
169 return 0;
170 } else {
171 ret = -EINVAL;
172 }
173
174fail:
175 debug("(not found)\n");
176 return ret;
177}
178
179int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
180{
181 const char *list, *end;
182 int len;
183
184 list = fdt_getprop(blob, node, "compatible", &len);
185 if (!list)
186 return -ENOENT;
187
188 end = list + len;
189 while (list < end) {
190 char *s;
191
192 len = strlen(list);
193 if (len >= strlen("pciVVVV,DDDD")) {
194 s = strstr(list, "pci");
195
196 /*
197 * check if the string is something like pciVVVV,DDDD.RR
198 * or just pciVVVV,DDDD
199 */
200 if (s && s[7] == ',' &&
201 (s[12] == '.' || s[12] == 0)) {
202 s += 3;
203 *vendor = simple_strtol(s, NULL, 16);
204
205 s += 5;
206 *device = simple_strtol(s, NULL, 16);
207
208 return 0;
209 }
210 } else {
211 list += (len + 1);
212 }
213 }
214
215 return -ENOENT;
216}
217
218int fdtdec_get_pci_bdf(const void *blob, int node,
219 struct fdt_pci_addr *addr, pci_dev_t *bdf)
220{
221 u16 dt_vendor, dt_device, vendor, device;
222 int ret;
223
224 /* get vendor id & device id from the compatible string */
225 ret = fdtdec_get_pci_vendev(blob, node, &dt_vendor, &dt_device);
226 if (ret)
227 return ret;
228
229 /* extract the bdf from fdt_pci_addr */
230 *bdf = addr->phys_hi & 0xffff00;
231
232 /* read vendor id & device id based on bdf */
233 pci_read_config_word(*bdf, PCI_VENDOR_ID, &vendor);
234 pci_read_config_word(*bdf, PCI_DEVICE_ID, &device);
235
236 /*
237 * Note there are two places in the device tree to fully describe
238 * a pci device: one is via compatible string with a format of
239 * "pciVVVV,DDDD" and the other one is the bdf numbers encoded in
240 * the device node's reg address property. We read the vendor id
241 * and device id based on bdf and compare the values with the
242 * "VVVV,DDDD". If they are the same, then we are good to use bdf
243 * to read device's bar. But if they are different, we have to rely
244 * on the vendor id and device id extracted from the compatible
245 * string and locate the real bdf by pci_find_device(). This is
246 * because normally we may only know device's device number and
247 * function number when writing device tree. The bus number is
248 * dynamically assigned during the pci enumeration process.
249 */
250 if ((dt_vendor != vendor) || (dt_device != device)) {
251 *bdf = pci_find_device(dt_vendor, dt_device, 0);
252 if (*bdf == -1)
253 return -ENODEV;
254 }
255
256 return 0;
257}
258
259int fdtdec_get_pci_bar32(const void *blob, int node,
260 struct fdt_pci_addr *addr, u32 *bar)
261{
262 pci_dev_t bdf;
263 int barnum;
264 int ret;
265
266 /* get pci devices's bdf */
267 ret = fdtdec_get_pci_bdf(blob, node, addr, &bdf);
268 if (ret)
269 return ret;
270
271 /* extract the bar number from fdt_pci_addr */
272 barnum = addr->phys_hi & 0xff;
273 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
274 return -EINVAL;
275
276 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
277 *bar = pci_read_bar32(pci_bus_to_hose(PCI_BUS(bdf)), bdf, barnum);
278
279 return 0;
280}
281#endif
282
aadef0a1
CLC
283uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
284 uint64_t default_val)
285{
286 const uint64_t *cell64;
287 int length;
288
289 cell64 = fdt_getprop(blob, node, prop_name, &length);
290 if (!cell64 || length < sizeof(*cell64))
291 return default_val;
292
293 return fdt64_to_cpu(*cell64);
294}
295
f88fe2de 296int fdtdec_get_is_enabled(const void *blob, int node)
b5220bc6
SG
297{
298 const char *cell;
299
f88fe2de
SG
300 /*
301 * It should say "okay", so only allow that. Some fdts use "ok" but
302 * this is a bug. Please fix your device tree source file. See here
303 * for discussion:
304 *
305 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
306 */
b5220bc6
SG
307 cell = fdt_getprop(blob, node, "status", NULL);
308 if (cell)
f88fe2de
SG
309 return 0 == strcmp(cell, "okay");
310 return 1;
b5220bc6
SG
311}
312
7cde397b 313enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
b5220bc6
SG
314{
315 enum fdt_compat_id id;
316
317 /* Search our drivers */
318 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
319 if (0 == fdt_node_check_compatible(blob, node,
320 compat_names[id]))
321 return id;
322 return COMPAT_UNKNOWN;
323}
324
325int fdtdec_next_compatible(const void *blob, int node,
326 enum fdt_compat_id id)
327{
328 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
329}
330
3ddecfc7
SG
331int fdtdec_next_compatible_subnode(const void *blob, int node,
332 enum fdt_compat_id id, int *depthp)
333{
334 do {
335 node = fdt_next_node(blob, node, depthp);
336 } while (*depthp > 1);
337
338 /* If this is a direct subnode, and compatible, return it */
339 if (*depthp == 1 && 0 == fdt_node_check_compatible(
340 blob, node, compat_names[id]))
341 return node;
342
343 return -FDT_ERR_NOTFOUND;
344}
345
b5220bc6
SG
346int fdtdec_next_alias(const void *blob, const char *name,
347 enum fdt_compat_id id, int *upto)
348{
349#define MAX_STR_LEN 20
350 char str[MAX_STR_LEN + 20];
351 int node, err;
352
353 /* snprintf() is not available */
354 assert(strlen(name) < MAX_STR_LEN);
355 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
00878476 356 node = fdt_path_offset(blob, str);
b5220bc6
SG
357 if (node < 0)
358 return node;
359 err = fdt_node_check_compatible(blob, node, compat_names[id]);
360 if (err < 0)
361 return err;
f88fe2de
SG
362 if (err)
363 return -FDT_ERR_NOTFOUND;
364 (*upto)++;
365 return node;
b5220bc6
SG
366}
367
a53f4a29
SG
368int fdtdec_find_aliases_for_id(const void *blob, const char *name,
369 enum fdt_compat_id id, int *node_list, int maxcount)
c6782270
SG
370{
371 memset(node_list, '\0', sizeof(*node_list) * maxcount);
372
373 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
374}
375
376/* TODO: Can we tighten this code up a little? */
377int fdtdec_add_aliases_for_id(const void *blob, const char *name,
378 enum fdt_compat_id id, int *node_list, int maxcount)
a53f4a29
SG
379{
380 int name_len = strlen(name);
381 int nodes[maxcount];
382 int num_found = 0;
383 int offset, node;
384 int alias_node;
385 int count;
386 int i, j;
387
388 /* find the alias node if present */
389 alias_node = fdt_path_offset(blob, "/aliases");
390
391 /*
392 * start with nothing, and we can assume that the root node can't
393 * match
394 */
395 memset(nodes, '\0', sizeof(nodes));
396
397 /* First find all the compatible nodes */
398 for (node = count = 0; node >= 0 && count < maxcount;) {
399 node = fdtdec_next_compatible(blob, node, id);
400 if (node >= 0)
401 nodes[count++] = node;
402 }
403 if (node >= 0)
404 debug("%s: warning: maxcount exceeded with alias '%s'\n",
405 __func__, name);
406
407 /* Now find all the aliases */
a53f4a29
SG
408 for (offset = fdt_first_property_offset(blob, alias_node);
409 offset > 0;
410 offset = fdt_next_property_offset(blob, offset)) {
411 const struct fdt_property *prop;
412 const char *path;
413 int number;
414 int found;
415
416 node = 0;
417 prop = fdt_get_property_by_offset(blob, offset, NULL);
418 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
419 if (prop->len && 0 == strncmp(path, name, name_len))
420 node = fdt_path_offset(blob, prop->data);
421 if (node <= 0)
422 continue;
423
424 /* Get the alias number */
425 number = simple_strtoul(path + name_len, NULL, 10);
426 if (number < 0 || number >= maxcount) {
427 debug("%s: warning: alias '%s' is out of range\n",
428 __func__, path);
429 continue;
430 }
431
432 /* Make sure the node we found is actually in our list! */
433 found = -1;
434 for (j = 0; j < count; j++)
435 if (nodes[j] == node) {
436 found = j;
437 break;
438 }
439
440 if (found == -1) {
441 debug("%s: warning: alias '%s' points to a node "
442 "'%s' that is missing or is not compatible "
443 " with '%s'\n", __func__, path,
444 fdt_get_name(blob, node, NULL),
445 compat_names[id]);
446 continue;
447 }
448
449 /*
450 * Add this node to our list in the right place, and mark
451 * it as done.
452 */
453 if (fdtdec_get_is_enabled(blob, node)) {
c6782270
SG
454 if (node_list[number]) {
455 debug("%s: warning: alias '%s' requires that "
456 "a node be placed in the list in a "
457 "position which is already filled by "
458 "node '%s'\n", __func__, path,
459 fdt_get_name(blob, node, NULL));
460 continue;
461 }
a53f4a29
SG
462 node_list[number] = node;
463 if (number >= num_found)
464 num_found = number + 1;
465 }
c6782270 466 nodes[found] = 0;
a53f4a29
SG
467 }
468
469 /* Add any nodes not mentioned by an alias */
470 for (i = j = 0; i < maxcount; i++) {
471 if (!node_list[i]) {
472 for (; j < maxcount; j++)
473 if (nodes[j] &&
474 fdtdec_get_is_enabled(blob, nodes[j]))
475 break;
476
477 /* Have we run out of nodes to add? */
478 if (j == maxcount)
479 break;
480
481 assert(!node_list[i]);
482 node_list[i] = nodes[j++];
483 if (i >= num_found)
484 num_found = i + 1;
485 }
486 }
487
488 return num_found;
489}
490
5c33c9fd
SG
491int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
492 int *seqp)
493{
494 int base_len = strlen(base);
495 const char *find_name;
496 int find_namelen;
497 int prop_offset;
498 int aliases;
499
500 find_name = fdt_get_name(blob, offset, &find_namelen);
501 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
502
503 aliases = fdt_path_offset(blob, "/aliases");
504 for (prop_offset = fdt_first_property_offset(blob, aliases);
505 prop_offset > 0;
506 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
507 const char *prop;
508 const char *name;
509 const char *slash;
c4af6732 510 int len, val;
5c33c9fd
SG
511
512 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
513 debug(" - %s, %s\n", name, prop);
514 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
515 strncmp(name, base, base_len))
516 continue;
517
518 slash = strrchr(prop, '/');
519 if (strcmp(slash + 1, find_name))
520 continue;
c4af6732
SG
521 val = trailing_strtol(name);
522 if (val != -1) {
523 *seqp = val;
524 debug("Found seq %d\n", *seqp);
525 return 0;
5c33c9fd
SG
526 }
527 }
528
529 debug("Not found\n");
530 return -ENOENT;
531}
532
aac07d49
SG
533int fdtdec_get_chosen_node(const void *blob, const char *name)
534{
535 const char *prop;
536 int chosen_node;
537 int len;
538
539 if (!blob)
540 return -FDT_ERR_NOTFOUND;
541 chosen_node = fdt_path_offset(blob, "/chosen");
542 prop = fdt_getprop(blob, chosen_node, name, &len);
543 if (!prop)
544 return -FDT_ERR_NOTFOUND;
545 return fdt_path_offset(blob, prop);
546}
547
9a263e55
SG
548int fdtdec_check_fdt(void)
549{
550 /*
551 * We must have an FDT, but we cannot panic() yet since the console
552 * is not ready. So for now, just assert(). Boards which need an early
553 * FDT (prior to console ready) will need to make their own
554 * arrangements and do their own checks.
555 */
556 assert(!fdtdec_prepare_fdt());
557 return 0;
558}
559
b5220bc6
SG
560/*
561 * This function is a little odd in that it accesses global data. At some
562 * point if the architecture board.c files merge this will make more sense.
563 * Even now, it is common code.
564 */
9a263e55 565int fdtdec_prepare_fdt(void)
b5220bc6 566{
c309c2da
SG
567 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
568 fdt_check_header(gd->fdt_blob)) {
66312374
SG
569#ifdef CONFIG_SPL_BUILD
570 puts("Missing DTB\n");
571#else
572 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
cb5f97f7
SG
573# ifdef DEBUG
574 if (gd->fdt_blob) {
575 printf("fdt_blob=%p\n", gd->fdt_blob);
576 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
577 32, 0);
578 }
579# endif
66312374 580#endif
9a263e55
SG
581 return -1;
582 }
b5220bc6
SG
583 return 0;
584}
d17da655
SG
585
586int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
587{
588 const u32 *phandle;
589 int lookup;
590
1cb2323b 591 debug("%s: %s\n", __func__, prop_name);
d17da655
SG
592 phandle = fdt_getprop(blob, node, prop_name, NULL);
593 if (!phandle)
594 return -FDT_ERR_NOTFOUND;
595
596 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
597 return lookup;
598}
599
600/**
601 * Look up a property in a node and check that it has a minimum length.
602 *
603 * @param blob FDT blob
604 * @param node node to examine
605 * @param prop_name name of property to find
606 * @param min_len minimum property length in bytes
607 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
608 found, or -FDT_ERR_BADLAYOUT if not enough data
609 * @return pointer to cell, which is only valid if err == 0
610 */
611static const void *get_prop_check_min_len(const void *blob, int node,
612 const char *prop_name, int min_len, int *err)
613{
614 const void *cell;
615 int len;
616
617 debug("%s: %s\n", __func__, prop_name);
618 cell = fdt_getprop(blob, node, prop_name, &len);
619 if (!cell)
620 *err = -FDT_ERR_NOTFOUND;
621 else if (len < min_len)
622 *err = -FDT_ERR_BADLAYOUT;
623 else
624 *err = 0;
625 return cell;
626}
627
628int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
629 u32 *array, int count)
630{
631 const u32 *cell;
632 int i, err = 0;
633
634 debug("%s: %s\n", __func__, prop_name);
635 cell = get_prop_check_min_len(blob, node, prop_name,
636 sizeof(u32) * count, &err);
637 if (!err) {
638 for (i = 0; i < count; i++)
639 array[i] = fdt32_to_cpu(cell[i]);
640 }
641 return err;
642}
643
a9f04d49
SG
644int fdtdec_get_int_array_count(const void *blob, int node,
645 const char *prop_name, u32 *array, int count)
646{
647 const u32 *cell;
648 int len, elems;
649 int i;
650
651 debug("%s: %s\n", __func__, prop_name);
652 cell = fdt_getprop(blob, node, prop_name, &len);
653 if (!cell)
654 return -FDT_ERR_NOTFOUND;
655 elems = len / sizeof(u32);
656 if (count > elems)
657 count = elems;
658 for (i = 0; i < count; i++)
659 array[i] = fdt32_to_cpu(cell[i]);
660
661 return count;
662}
663
96875e7d
SG
664const u32 *fdtdec_locate_array(const void *blob, int node,
665 const char *prop_name, int count)
666{
667 const u32 *cell;
668 int err;
669
670 cell = get_prop_check_min_len(blob, node, prop_name,
671 sizeof(u32) * count, &err);
672 return err ? NULL : cell;
673}
674
d17da655
SG
675int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
676{
677 const s32 *cell;
678 int len;
679
680 debug("%s: %s\n", __func__, prop_name);
681 cell = fdt_getprop(blob, node, prop_name, &len);
682 return cell != NULL;
683}
ed3ee5cd 684
57068a7a
SG
685int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
686 const char *list_name,
687 const char *cells_name,
688 int cell_count, int index,
689 struct fdtdec_phandle_args *out_args)
690{
691 const __be32 *list, *list_end;
692 int rc = 0, size, cur_index = 0;
693 uint32_t count = 0;
694 int node = -1;
695 int phandle;
696
697 /* Retrieve the phandle list property */
698 list = fdt_getprop(blob, src_node, list_name, &size);
699 if (!list)
700 return -ENOENT;
701 list_end = list + size / sizeof(*list);
702
703 /* Loop over the phandles until all the requested entry is found */
704 while (list < list_end) {
705 rc = -EINVAL;
706 count = 0;
707
708 /*
709 * If phandle is 0, then it is an empty entry with no
710 * arguments. Skip forward to the next entry.
711 */
712 phandle = be32_to_cpup(list++);
713 if (phandle) {
714 /*
715 * Find the provider node and parse the #*-cells
716 * property to determine the argument length.
717 *
718 * This is not needed if the cell count is hard-coded
719 * (i.e. cells_name not set, but cell_count is set),
720 * except when we're going to return the found node
721 * below.
722 */
723 if (cells_name || cur_index == index) {
724 node = fdt_node_offset_by_phandle(blob,
725 phandle);
726 if (!node) {
727 debug("%s: could not find phandle\n",
728 fdt_get_name(blob, src_node,
729 NULL));
730 goto err;
731 }
732 }
733
734 if (cells_name) {
735 count = fdtdec_get_int(blob, node, cells_name,
736 -1);
737 if (count == -1) {
738 debug("%s: could not get %s for %s\n",
739 fdt_get_name(blob, src_node,
740 NULL),
741 cells_name,
742 fdt_get_name(blob, node,
743 NULL));
744 goto err;
745 }
746 } else {
747 count = cell_count;
748 }
749
750 /*
751 * Make sure that the arguments actually fit in the
752 * remaining property data length
753 */
754 if (list + count > list_end) {
755 debug("%s: arguments longer than property\n",
756 fdt_get_name(blob, src_node, NULL));
757 goto err;
758 }
759 }
760
761 /*
762 * All of the error cases above bail out of the loop, so at
763 * this point, the parsing is successful. If the requested
764 * index matches, then fill the out_args structure and return,
765 * or return -ENOENT for an empty entry.
766 */
767 rc = -ENOENT;
768 if (cur_index == index) {
769 if (!phandle)
770 goto err;
771
772 if (out_args) {
773 int i;
774
775 if (count > MAX_PHANDLE_ARGS) {
776 debug("%s: too many arguments %d\n",
777 fdt_get_name(blob, src_node,
778 NULL), count);
779 count = MAX_PHANDLE_ARGS;
780 }
781 out_args->node = node;
782 out_args->args_count = count;
783 for (i = 0; i < count; i++) {
784 out_args->args[i] =
785 be32_to_cpup(list++);
786 }
787 }
788
789 /* Found it! return success */
790 return 0;
791 }
792
793 node = -1;
794 list += count;
795 cur_index++;
796 }
797
798 /*
799 * Result will be one of:
800 * -ENOENT : index is for empty phandle
801 * -EINVAL : parsing error on data
802 * [1..n] : Number of phandle (count mode; when index = -1)
803 */
804 rc = index < 0 ? cur_index : -ENOENT;
805 err:
806 return rc;
807}
808
bed4d892
AS
809int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
810 u8 *array, int count)
811{
812 const u8 *cell;
813 int err;
814
815 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
816 if (!err)
817 memcpy(array, cell, count);
818 return err;
819}
820
821const u8 *fdtdec_locate_byte_array(const void *blob, int node,
822 const char *prop_name, int count)
823{
824 const u8 *cell;
825 int err;
826
827 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
828 if (err)
829 return NULL;
830 return cell;
831}
09258f1e 832
09258f1e
AK
833int fdtdec_get_config_int(const void *blob, const char *prop_name,
834 int default_val)
835{
836 int config_node;
837
838 debug("%s: %s\n", __func__, prop_name);
839 config_node = fdt_path_offset(blob, "/config");
840 if (config_node < 0)
841 return default_val;
842 return fdtdec_get_int(blob, config_node, prop_name, default_val);
843}
332ab0d5 844
79289c0b
GB
845int fdtdec_get_config_bool(const void *blob, const char *prop_name)
846{
847 int config_node;
848 const void *prop;
849
850 debug("%s: %s\n", __func__, prop_name);
851 config_node = fdt_path_offset(blob, "/config");
852 if (config_node < 0)
853 return 0;
854 prop = fdt_get_property(blob, config_node, prop_name, NULL);
855
856 return prop != NULL;
857}
858
332ab0d5
SG
859char *fdtdec_get_config_string(const void *blob, const char *prop_name)
860{
861 const char *nodep;
862 int nodeoffset;
863 int len;
864
865 debug("%s: %s\n", __func__, prop_name);
866 nodeoffset = fdt_path_offset(blob, "/config");
867 if (nodeoffset < 0)
868 return NULL;
869
870 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
871 if (!nodep)
872 return NULL;
873
874 return (char *)nodep;
875}
f20c4619 876
76489832
SG
877int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
878 fdt_addr_t *basep, fdt_size_t *sizep)
f20c4619
SG
879{
880 const fdt_addr_t *cell;
881 int len;
882
76489832
SG
883 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
884 prop_name);
f20c4619 885 cell = fdt_getprop(blob, node, prop_name, &len);
76489832
SG
886 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
887 debug("cell=%p, len=%d\n", cell, len);
f20c4619 888 return -1;
76489832
SG
889 }
890
891 *basep = fdt_addr_to_cpu(*cell);
892 *sizep = fdt_size_to_cpu(cell[1]);
893 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
894 (ulong)*sizep);
f20c4619 895
f20c4619
SG
896 return 0;
897}
006e73b9
SG
898
899/**
900 * Read a flash entry from the fdt
901 *
902 * @param blob FDT blob
903 * @param node Offset of node to read
904 * @param name Name of node being read
905 * @param entry Place to put offset and size of this node
906 * @return 0 if ok, -ve on error
907 */
908int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
909 struct fmap_entry *entry)
910{
f3cc44f9 911 const char *prop;
006e73b9
SG
912 u32 reg[2];
913
914 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
915 debug("Node '%s' has bad/missing 'reg' property\n", name);
916 return -FDT_ERR_NOTFOUND;
917 }
918 entry->offset = reg[0];
919 entry->length = reg[1];
f3cc44f9
SG
920 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
921 prop = fdt_getprop(blob, node, "compress", NULL);
922 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
923 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
924 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
925 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
926 entry->hash = (uint8_t *)prop;
006e73b9
SG
927
928 return 0;
929}
56f42242 930
5f7bfdd6 931u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
56f42242
TR
932{
933 u64 number = 0;
934
935 while (cells--)
936 number = (number << 32) | fdt32_to_cpu(*ptr++);
937
938 return number;
939}
940
941int fdt_get_resource(const void *fdt, int node, const char *property,
942 unsigned int index, struct fdt_resource *res)
943{
944 const fdt32_t *ptr, *end;
945 int na, ns, len, parent;
946 unsigned int i = 0;
947
948 parent = fdt_parent_offset(fdt, node);
949 if (parent < 0)
950 return parent;
951
952 na = fdt_address_cells(fdt, parent);
953 ns = fdt_size_cells(fdt, parent);
954
955 ptr = fdt_getprop(fdt, node, property, &len);
956 if (!ptr)
957 return len;
958
959 end = ptr + len / sizeof(*ptr);
960
961 while (ptr + na + ns <= end) {
962 if (i == index) {
963 res->start = res->end = fdtdec_get_number(ptr, na);
964 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
965 return 0;
966 }
967
968 ptr += na + ns;
969 i++;
970 }
971
972 return -FDT_ERR_NOTFOUND;
973}
974
975int fdt_get_named_resource(const void *fdt, int node, const char *property,
976 const char *prop_names, const char *name,
977 struct fdt_resource *res)
978{
979 int index;
980
981 index = fdt_find_string(fdt, node, prop_names, name);
982 if (index < 0)
983 return index;
984
985 return fdt_get_resource(fdt, node, property, index, res);
986}
9f85eee7 987
26403871
SG
988int fdtdec_decode_memory_region(const void *blob, int config_node,
989 const char *mem_type, const char *suffix,
990 fdt_addr_t *basep, fdt_size_t *sizep)
991{
992 char prop_name[50];
993 const char *mem;
994 fdt_size_t size, offset_size;
995 fdt_addr_t base, offset;
996 int node;
997
998 if (config_node == -1) {
999 config_node = fdt_path_offset(blob, "/config");
1000 if (config_node < 0) {
1001 debug("%s: Cannot find /config node\n", __func__);
1002 return -ENOENT;
1003 }
1004 }
1005 if (!suffix)
1006 suffix = "";
1007
1008 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1009 suffix);
1010 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1011 if (!mem) {
1012 debug("%s: No memory type for '%s', using /memory\n", __func__,
1013 prop_name);
1014 mem = "/memory";
1015 }
1016
1017 node = fdt_path_offset(blob, mem);
1018 if (node < 0) {
1019 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1020 fdt_strerror(node));
1021 return -ENOENT;
1022 }
1023
1024 /*
1025 * Not strictly correct - the memory may have multiple banks. We just
1026 * use the first
1027 */
1028 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1029 debug("%s: Failed to decode memory region %s\n", __func__,
1030 mem);
1031 return -EINVAL;
1032 }
1033
1034 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1035 suffix);
1036 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1037 &offset_size)) {
1038 debug("%s: Failed to decode memory region '%s'\n", __func__,
1039 prop_name);
1040 return -EINVAL;
1041 }
1042
1043 *basep = base + offset;
1044 *sizep = offset_size;
1045
1046 return 0;
1047}
b45122fd 1048
12e67114
SG
1049static int decode_timing_property(const void *blob, int node, const char *name,
1050 struct timing_entry *result)
1051{
1052 int length, ret = 0;
1053 const u32 *prop;
1054
1055 prop = fdt_getprop(blob, node, name, &length);
1056 if (!prop) {
1057 debug("%s: could not find property %s\n",
1058 fdt_get_name(blob, node, NULL), name);
1059 return length;
1060 }
1061
1062 if (length == sizeof(u32)) {
1063 result->typ = fdtdec_get_int(blob, node, name, 0);
1064 result->min = result->typ;
1065 result->max = result->typ;
1066 } else {
1067 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1068 }
1069
1070 return ret;
1071}
1072
1073int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1074 struct display_timing *dt)
1075{
1076 int i, node, timings_node;
1077 u32 val = 0;
1078 int ret = 0;
1079
1080 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1081 if (timings_node < 0)
1082 return timings_node;
1083
1084 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1085 node > 0 && i != index;
1086 node = fdt_next_subnode(blob, node))
1087 i++;
1088
1089 if (node < 0)
1090 return node;
1091
1092 memset(dt, 0, sizeof(*dt));
1093
1094 ret |= decode_timing_property(blob, node, "hback-porch",
1095 &dt->hback_porch);
1096 ret |= decode_timing_property(blob, node, "hfront-porch",
1097 &dt->hfront_porch);
1098 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1099 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1100 ret |= decode_timing_property(blob, node, "vback-porch",
1101 &dt->vback_porch);
1102 ret |= decode_timing_property(blob, node, "vfront-porch",
1103 &dt->vfront_porch);
1104 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1105 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1106 ret |= decode_timing_property(blob, node, "clock-frequency",
1107 &dt->pixelclock);
1108
1109 dt->flags = 0;
1110 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1111 if (val != -1) {
1112 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1113 DISPLAY_FLAGS_VSYNC_LOW;
1114 }
1115 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1116 if (val != -1) {
1117 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1118 DISPLAY_FLAGS_HSYNC_LOW;
1119 }
1120 val = fdtdec_get_int(blob, node, "de-active", -1);
1121 if (val != -1) {
1122 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1123 DISPLAY_FLAGS_DE_LOW;
1124 }
1125 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1126 if (val != -1) {
1127 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1128 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1129 }
1130
1131 if (fdtdec_get_bool(blob, node, "interlaced"))
1132 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1133 if (fdtdec_get_bool(blob, node, "doublescan"))
1134 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1135 if (fdtdec_get_bool(blob, node, "doubleclk"))
1136 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1137
1138 return 0;
1139}
1140
0879361f 1141int fdtdec_setup(void)
b45122fd
SG
1142{
1143#ifdef CONFIG_OF_CONTROL
1144# ifdef CONFIG_OF_EMBED
1145 /* Get a pointer to the FDT */
1146 gd->fdt_blob = __dtb_dt_begin;
1147# elif defined CONFIG_OF_SEPARATE
1148# ifdef CONFIG_SPL_BUILD
1149 /* FDT is at end of BSS */
1150 gd->fdt_blob = (ulong *)&__bss_end;
1151# else
1152 /* FDT is at end of image */
1153 gd->fdt_blob = (ulong *)&_end;
3bd926cc 1154# endif
b45122fd
SG
1155# elif defined(CONFIG_OF_HOSTFILE)
1156 if (sandbox_read_fdt_from_file()) {
1157 puts("Failed to read control FDT\n");
1158 return -1;
1159 }
1160# endif
1161# ifndef CONFIG_SPL_BUILD
1162 /* Allow the early environment to override the fdt address */
1163 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1164 (uintptr_t)gd->fdt_blob);
1165# endif
29a23f9d 1166#endif
0879361f 1167 return fdtdec_prepare_fdt();
b45122fd
SG
1168}
1169
1170#endif /* !USE_HOSTCC */