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74f4304e WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Texas Instruments <www.ti.com> | |
4 | * | |
5 | * (C) Copyright 2002 | |
6 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
7 | * Marius Groeger <mgroeger@sysgo.de> | |
8 | * | |
9 | * (C) Copyright 2002 | |
10 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
11 | * Alex Zuepke <azu@sysgo.de> | |
12 | * | |
13 | * (C) Copyright 2002-2004 | |
792a09eb | 14 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
74f4304e WD |
15 | * |
16 | * (C) Copyright 2004 | |
17 | * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> | |
18 | * | |
19 | * See file CREDITS for list of people who contributed to this | |
20 | * project. | |
21 | * | |
22 | * This program is free software; you can redistribute it and/or | |
23 | * modify it under the terms of the GNU General Public License as | |
24 | * published by the Free Software Foundation; either version 2 of | |
25 | * the License, or (at your option) any later version. | |
26 | * | |
27 | * This program is distributed in the hope that it will be useful, | |
28 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
6d0943a6 | 29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
74f4304e WD |
30 | * GNU General Public License for more details. |
31 | * | |
32 | * You should have received a copy of the GNU General Public License | |
33 | * along with this program; if not, write to the Free Software | |
34 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
35 | * MA 02111-1307 USA | |
36 | */ | |
37 | ||
38 | #include <common.h> | |
39 | #include <asm/proc-armv/ptrace.h> | |
40 | ||
74f4304e WD |
41 | #ifdef CONFIG_USE_IRQ |
42 | /* enable IRQ interrupts */ | |
43 | void enable_interrupts (void) | |
44 | { | |
45 | unsigned long temp; | |
46 | __asm__ __volatile__("mrs %0, cpsr\n" | |
47 | "bic %0, %0, #0x80\n" | |
48 | "msr cpsr_c, %0" | |
49 | : "=r" (temp) | |
50 | : | |
51 | : "memory"); | |
52 | } | |
53 | ||
54 | ||
55 | /* | |
56 | * disable IRQ/FIQ interrupts | |
57 | * returns true if interrupts had been enabled before we disabled them | |
58 | */ | |
59 | int disable_interrupts (void) | |
60 | { | |
61 | unsigned long old,temp; | |
62 | __asm__ __volatile__("mrs %0, cpsr\n" | |
63 | "orr %1, %0, #0xc0\n" | |
64 | "msr cpsr_c, %1" | |
65 | : "=r" (old), "=r" (temp) | |
66 | : | |
67 | : "memory"); | |
68 | return (old & 0x80) == 0; | |
69 | } | |
70 | #else | |
71 | void enable_interrupts (void) | |
72 | { | |
73 | return; | |
74 | } | |
75 | int disable_interrupts (void) | |
76 | { | |
77 | return 0; | |
78 | } | |
79 | #endif | |
80 | ||
81 | ||
82 | void bad_mode (void) | |
83 | { | |
84 | panic ("Resetting CPU ...\n"); | |
85 | reset_cpu (0); | |
86 | } | |
87 | ||
88 | void show_regs (struct pt_regs *regs) | |
89 | { | |
90 | unsigned long flags; | |
91 | const char *processor_modes[] = { | |
92 | "USER_26", "FIQ_26", "IRQ_26", "SVC_26", | |
93 | "UK4_26", "UK5_26", "UK6_26", "UK7_26", | |
94 | "UK8_26", "UK9_26", "UK10_26", "UK11_26", | |
95 | "UK12_26", "UK13_26", "UK14_26", "UK15_26", | |
96 | "USER_32", "FIQ_32", "IRQ_32", "SVC_32", | |
97 | "UK4_32", "UK5_32", "UK6_32", "ABT_32", | |
98 | "UK8_32", "UK9_32", "UK10_32", "UND_32", | |
99 | "UK12_32", "UK13_32", "UK14_32", "SYS_32", | |
100 | }; | |
101 | ||
102 | flags = condition_codes (regs); | |
103 | ||
6d0943a6 AE |
104 | printf ("pc : [<%08lx>] lr : [<%08lx>]\n" |
105 | "sp : %08lx ip : %08lx fp : %08lx\n", | |
74f4304e WD |
106 | instruction_pointer (regs), |
107 | regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); | |
6d0943a6 | 108 | printf ("r10: %08lx r9 : %08lx r8 : %08lx\n", |
74f4304e | 109 | regs->ARM_r10, regs->ARM_r9, regs->ARM_r8); |
6d0943a6 | 110 | printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", |
74f4304e | 111 | regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4); |
6d0943a6 | 112 | printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", |
74f4304e WD |
113 | regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0); |
114 | printf ("Flags: %c%c%c%c", | |
115 | flags & CC_N_BIT ? 'N' : 'n', | |
116 | flags & CC_Z_BIT ? 'Z' : 'z', | |
117 | flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v'); | |
118 | printf (" IRQs %s FIQs %s Mode %s%s\n", | |
119 | interrupts_enabled (regs) ? "on" : "off", | |
120 | fast_interrupts_enabled (regs) ? "on" : "off", | |
121 | processor_modes[processor_mode (regs)], | |
122 | thumb_mode (regs) ? " (T)" : ""); | |
123 | } | |
124 | ||
125 | void do_undefined_instruction (struct pt_regs *pt_regs) | |
126 | { | |
127 | printf ("undefined instruction\n"); | |
128 | show_regs (pt_regs); | |
129 | bad_mode (); | |
130 | } | |
131 | ||
132 | void do_software_interrupt (struct pt_regs *pt_regs) | |
133 | { | |
134 | printf ("software interrupt\n"); | |
135 | show_regs (pt_regs); | |
136 | bad_mode (); | |
137 | } | |
138 | ||
139 | void do_prefetch_abort (struct pt_regs *pt_regs) | |
140 | { | |
141 | printf ("prefetch abort\n"); | |
142 | show_regs (pt_regs); | |
143 | bad_mode (); | |
144 | } | |
145 | ||
146 | void do_data_abort (struct pt_regs *pt_regs) | |
147 | { | |
148 | printf ("data abort\n"); | |
149 | show_regs (pt_regs); | |
150 | bad_mode (); | |
151 | } | |
152 | ||
153 | void do_not_used (struct pt_regs *pt_regs) | |
154 | { | |
155 | printf ("not used\n"); | |
156 | show_regs (pt_regs); | |
157 | bad_mode (); | |
158 | } | |
159 | ||
160 | void do_fiq (struct pt_regs *pt_regs) | |
161 | { | |
162 | printf ("fast interrupt request\n"); | |
163 | show_regs (pt_regs); | |
164 | bad_mode (); | |
165 | } | |
166 | ||
6d0943a6 | 167 | #ifndef CONFIG_USE_IRQ |
74f4304e WD |
168 | void do_irq (struct pt_regs *pt_regs) |
169 | { | |
170 | printf ("interrupt request\n"); | |
171 | show_regs (pt_regs); | |
172 | bad_mode (); | |
173 | } | |
6d0943a6 | 174 | #endif |