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4e5ca3eb | 1 | /* |
bf9e3b38 WD |
2 | * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
3 | * | |
4 | * (C) Copyright 2000 | |
4e5ca3eb WD |
5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
bf9e3b38 | 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
4e5ca3eb WD |
18 | * GNU General Public License for more details. |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <common.h> | |
27 | ||
52b01760 TL |
28 | #include <asm/timer.h> |
29 | #include <asm/immap.h> | |
bf9e3b38 | 30 | |
99c03c17 TL |
31 | DECLARE_GLOBAL_DATA_PTR; |
32 | ||
bf9e3b38 | 33 | static ulong timestamp; |
cd42deeb | 34 | |
8e585f02 TL |
35 | #if defined(CONFIG_MCFTMR) |
36 | #ifndef CFG_UDELAY_BASE | |
37 | # error "uDelay base not defined!" | |
38 | #endif | |
39 | ||
40 | #if !defined(CFG_TMR_BASE) || !defined(CFG_INTR_BASE) || !defined(CFG_TMRINTR_NO) || !defined(CFG_TMRINTR_MASK) | |
41 | # error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!" | |
42 | #endif | |
52b01760 | 43 | extern void dtimer_intr_setup(void); |
8e585f02 TL |
44 | |
45 | void udelay(unsigned long usec) | |
46 | { | |
47 | volatile dtmr_t *timerp = (dtmr_t *) (CFG_UDELAY_BASE); | |
48 | uint start, now, tmp; | |
49 | ||
50 | while (usec > 0) { | |
51 | if (usec > 65000) | |
52 | tmp = 65000; | |
53 | else | |
54 | tmp = usec; | |
55 | usec = usec - tmp; | |
56 | ||
57 | /* Set up TIMER 3 as timebase clock */ | |
58 | timerp->tmr = DTIM_DTMR_RST_RST; | |
59 | timerp->tcn = 0; | |
60 | /* set period to 1 us */ | |
61 | timerp->tmr = | |
52b01760 TL |
62 | CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | DTIM_DTMR_FRR | |
63 | DTIM_DTMR_RST_EN; | |
8e585f02 TL |
64 | |
65 | start = now = timerp->tcn; | |
66 | while (now < start + tmp) | |
67 | now = timerp->tcn; | |
68 | } | |
69 | } | |
70 | ||
71 | void dtimer_interrupt(void *not_used) | |
72 | { | |
73 | volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE); | |
8e585f02 TL |
74 | |
75 | /* check for timer interrupt asserted */ | |
ab77bc54 | 76 | if ((CFG_TMRPND_REG & CFG_TMRINTR_MASK) == CFG_TMRINTR_PEND) { |
8e585f02 TL |
77 | timerp->ter = (DTIM_DTER_CAP | DTIM_DTER_REF); |
78 | timestamp++; | |
79 | return; | |
80 | } | |
81 | } | |
82 | ||
83 | void timer_init(void) | |
84 | { | |
85 | volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE); | |
8e585f02 TL |
86 | |
87 | timestamp = 0; | |
88 | ||
89 | timerp->tcn = 0; | |
90 | timerp->trr = 0; | |
91 | ||
92 | /* Set up TIMER 4 as clock */ | |
93 | timerp->tmr = DTIM_DTMR_RST_RST; | |
94 | ||
52b01760 | 95 | /* initialize and enable timer interrupt */ |
8e585f02 | 96 | irq_install_handler(CFG_TMRINTR_NO, dtimer_interrupt, 0); |
8e585f02 TL |
97 | |
98 | timerp->tcn = 0; | |
99 | timerp->trr = 1000; /* Interrupt every ms */ | |
100 | ||
52b01760 | 101 | dtimer_intr_setup(); |
8e585f02 TL |
102 | |
103 | /* set a period of 1us, set timer mode to restart and enable timer and interrupt */ | |
104 | timerp->tmr = CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | | |
105 | DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN; | |
106 | } | |
107 | ||
108 | void reset_timer(void) | |
109 | { | |
110 | timestamp = 0; | |
111 | } | |
112 | ||
113 | ulong get_timer(ulong base) | |
114 | { | |
115 | return (timestamp - base); | |
116 | } | |
117 | ||
118 | void set_timer(ulong t) | |
119 | { | |
120 | timestamp = t; | |
121 | } | |
122 | #endif /* CONFIG_MCFTMR */ | |
123 | ||
124 | #if defined(CONFIG_MCFPIT) | |
125 | #if !defined(CFG_PIT_BASE) | |
126 | # error "CFG_PIT_BASE not defined!" | |
127 | #endif | |
128 | ||
129 | static unsigned short lastinc; | |
130 | ||
131 | void udelay(unsigned long usec) | |
132 | { | |
133 | volatile pit_t *timerp = (pit_t *) (CFG_UDELAY_BASE); | |
134 | uint tmp; | |
135 | ||
136 | while (usec > 0) { | |
137 | if (usec > 65000) | |
138 | tmp = 65000; | |
139 | else | |
140 | tmp = usec; | |
141 | usec = usec - tmp; | |
142 | ||
143 | /* Set up TIMER 3 as timebase clock */ | |
144 | timerp->pcsr = PIT_PCSR_OVW; | |
145 | timerp->pmr = 0; | |
146 | /* set period to 1 us */ | |
147 | timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN; | |
148 | ||
149 | timerp->pmr = tmp; | |
150 | while (timerp->pcntr > 0) ; | |
151 | } | |
152 | } | |
153 | ||
154 | void timer_init(void) | |
155 | { | |
156 | volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE); | |
157 | timestamp = 0; | |
158 | ||
159 | /* Set up TIMER 4 as poll clock */ | |
160 | timerp->pcsr = PIT_PCSR_OVW; | |
161 | timerp->pmr = lastinc = 0; | |
162 | timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN; | |
163 | } | |
164 | ||
165 | void set_timer(ulong t) | |
166 | { | |
167 | volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE); | |
168 | ||
169 | timestamp = 0; | |
170 | timerp->pmr = lastinc = 0; | |
171 | } | |
172 | ||
173 | ulong get_timer(ulong base) | |
174 | { | |
175 | unsigned short now, diff; | |
176 | volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE); | |
177 | ||
178 | now = timerp->pcntr; | |
179 | diff = -(now - lastinc); | |
180 | ||
181 | timestamp += diff; | |
182 | lastinc = now; | |
183 | return timestamp - base; | |
184 | } | |
185 | ||
186 | void wait_ticks(unsigned long ticks) | |
187 | { | |
188 | set_timer(0); | |
189 | while (get_timer(0) < ticks) ; | |
190 | } | |
191 | #endif /* CONFIG_MCFPIT */ | |
cd42deeb | 192 | |
70f05ac3 WD |
193 | /* |
194 | * This function is derived from PowerPC code (read timebase as long long). | |
195 | * On M68K it just returns the timer value. | |
196 | */ | |
197 | unsigned long long get_ticks(void) | |
198 | { | |
199 | return get_timer(0); | |
200 | } | |
201 | ||
202 | /* | |
203 | * This function is derived from PowerPC code (timebase clock frequency). | |
204 | * On M68K it returns the number of timer ticks per second. | |
205 | */ | |
52b01760 | 206 | ulong get_tbclk(void) |
70f05ac3 WD |
207 | { |
208 | ulong tbclk; | |
209 | tbclk = CFG_HZ; | |
210 | return tbclk; | |
211 | } |