]> git.ipfire.org Git - people/ms/u-boot.git/blame - lib_ppc/board.c
* Patches by Pantelis Antoniou, 30 Mar 2004:
[people/ms/u-boot.git] / lib_ppc / board.c
CommitLineData
fe8c2806 1/*
d4ca31c4 2 * (C) Copyright 2000-2004
fe8c2806
WD
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
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29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
0db5bca8
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32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
cbd8a35c 35#ifdef CONFIG_MPC5xxx
945af8d7
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36#include <mpc5xxx.h>
37#endif
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38#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
fe8c2806 51#ifdef CFG_ALLOC_DPRAM
42d1f039 52#if !(defined(CONFIG_8260)||defined(CONFIG_MPC8560))
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53#include <commproc.h>
54#endif
7aa78614 55#endif
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56#include <version.h>
57#if defined(CONFIG_BAB7xx)
58#include <w83c553f.h>
59#endif
60#include <dtt.h>
61#if defined(CONFIG_POST)
62#include <post.h>
63#endif
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64#if defined(CONFIG_LOGBUFFER)
65#include <logbuff.h>
66#endif
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67#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
68#include <asm/cache.h>
69#endif
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70#ifdef CONFIG_PS2KBD
71#include <keyboard.h>
72#endif
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73
74#if (CONFIG_COMMANDS & CFG_CMD_DOC)
75void doc_init (void);
76#endif
77#if defined(CONFIG_HARD_I2C) || \
78 defined(CONFIG_SOFT_I2C)
79#include <i2c.h>
80#endif
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81#if (CONFIG_COMMANDS & CFG_CMD_NAND)
82void nand_init (void);
83#endif
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84
85static char *failed = "*** failed ***\n";
86
17d704eb 87#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
fe8c2806 88extern flash_info_t flash_info[];
17d704eb 89#endif
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90
91#include <environment.h>
92
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93#if defined(CFG_ENV_IS_EMBEDDED)
94#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
95#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
04a85b3b 96 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
7e780369 97 defined(CFG_ENV_IS_IN_NVRAM)
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98#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
99#else
100#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
101#endif
102
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103extern ulong __init_end;
104extern ulong _end;
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105ulong monitor_flash_len;
106
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107#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
108#include <bedbug/type.h>
109#endif
110
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111/*
112 * Begin and End of memory area for malloc(), and current "brk"
113 */
114static ulong mem_malloc_start = 0;
115static ulong mem_malloc_end = 0;
116static ulong mem_malloc_brk = 0;
117
118/************************************************************************
119 * Utilities *
120 ************************************************************************
121 */
122
123/*
124 * The Malloc area is immediately below the monitor copy in DRAM
125 */
126static void mem_malloc_init (void)
127{
128 DECLARE_GLOBAL_DATA_PTR;
129
130 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
131
132 mem_malloc_end = dest_addr;
133 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
134 mem_malloc_brk = mem_malloc_start;
135
136 memset ((void *) mem_malloc_start,
137 0,
138 mem_malloc_end - mem_malloc_start);
139}
140
141void *sbrk (ptrdiff_t increment)
142{
143 ulong old = mem_malloc_brk;
144 ulong new = old + increment;
145
146 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
147 return (NULL);
148 }
149 mem_malloc_brk = new;
150 return ((void *) old);
151}
152
153char *strmhz (char *buf, long hz)
154{
155 long l, n;
156 long m;
157
158 n = hz / 1000000L;
159 l = sprintf (buf, "%ld", n);
160 m = (hz % 1000000L) / 1000L;
161 if (m != 0)
162 sprintf (buf + l, ".%03ld", m);
163 return (buf);
164}
165
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166/*
167 * All attempts to come up with a "common" initialization sequence
168 * that works for all boards and architectures failed: some of the
169 * requirements are just _too_ different. To get rid of the resulting
170 * mess of board dependend #ifdef'ed code we now make the whole
171 * initialization sequence configurable to the user.
172 *
173 * The requirements for any new initalization function is simple: it
174 * receives a pointer to the "global data" structure as it's only
175 * argument, and returns an integer return code, where 0 means
176 * "continue" and != 0 means "fatal error, hang the system".
177 */
178typedef int (init_fnc_t) (void);
179
180/************************************************************************
181 * Init Utilities *
182 ************************************************************************
183 * Some of this code should be moved into the core functions,
184 * but let's get it working (again) first...
185 */
186
187static int init_baudrate (void)
188{
189 DECLARE_GLOBAL_DATA_PTR;
190
191 uchar tmp[64]; /* long enough for environment variables */
192 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
193
194 gd->baudrate = (i > 0)
195 ? (int) simple_strtoul (tmp, NULL, 10)
196 : CONFIG_BAUDRATE;
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197 return (0);
198}
199
200/***********************************************************************/
201
202static int init_func_ram (void)
203{
204 DECLARE_GLOBAL_DATA_PTR;
205
206#ifdef CONFIG_BOARD_TYPES
207 int board_type = gd->board_type;
208#else
209 int board_type = 0; /* use dummy arg */
210#endif
211 puts ("DRAM: ");
212
213 if ((gd->ram_size = initdram (board_type)) > 0) {
214 print_size (gd->ram_size, "\n");
215 return (0);
216 }
217 puts (failed);
218 return (1);
219}
220
221/***********************************************************************/
222
223#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
224static int init_func_i2c (void)
225{
226 puts ("I2C: ");
227 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
228 puts ("ready\n");
229 return (0);
230}
231#endif
232
233/***********************************************************************/
234
235#if defined(CONFIG_WATCHDOG)
236static int init_func_watchdog_init (void)
237{
238 puts (" Watchdog enabled\n");
239 WATCHDOG_RESET ();
240 return (0);
241}
242# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
243
244static int init_func_watchdog_reset (void)
245{
246 WATCHDOG_RESET ();
247 return (0);
248}
249# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
250#else
251# define INIT_FUNC_WATCHDOG_INIT /* undef */
252# define INIT_FUNC_WATCHDOG_RESET /* undef */
253#endif /* CONFIG_WATCHDOG */
254
255/************************************************************************
256 * Initialization sequence *
257 ************************************************************************
258 */
259
260init_fnc_t *init_sequence[] = {
261
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262#if defined(CONFIG_BOARD_EARLY_INIT_F)
263 board_early_init_f,
fe8c2806 264#endif
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265
266#if !defined(CONFIG_TQM866M)
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267 get_clocks, /* get CPU and bus clocks (etc.) */
268 init_timebase,
c178d3da 269#endif
fe8c2806 270#ifdef CFG_ALLOC_DPRAM
42d1f039 271#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
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272 dpram_init,
273#endif
7aa78614 274#endif
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275#if defined(CONFIG_BOARD_POSTCLK_INIT)
276 board_postclk_init,
277#endif
278 env_init,
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279#if defined(CONFIG_TQM866M)
280 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
281 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
282 init_timebase,
283#endif
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284 init_baudrate,
285 serial_init,
286 console_init_f,
287 display_options,
288#if defined(CONFIG_8260)
289 prt_8260_rsr,
290 prt_8260_clks,
291#endif /* CONFIG_8260 */
292 checkcpu,
cbd8a35c 293#if defined(CONFIG_MPC5xxx)
945af8d7 294 prt_mpc5xxx_clks,
cbd8a35c 295#endif /* CONFIG_MPC5xxx */
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296 checkboard,
297 INIT_FUNC_WATCHDOG_INIT
c837dcb1 298#if defined(CONFIG_MISC_INIT_F)
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299 misc_init_f,
300#endif
301 INIT_FUNC_WATCHDOG_RESET
302#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
303 init_func_i2c,
304#endif
305#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
306 dtt_init,
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307#endif
308#ifdef CONFIG_POST
309 post_init_f,
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310#endif
311 INIT_FUNC_WATCHDOG_RESET
312 init_func_ram,
313#if defined(CFG_DRAM_TEST)
314 testdram,
315#endif /* CFG_DRAM_TEST */
316 INIT_FUNC_WATCHDOG_RESET
317
318 NULL, /* Terminate this list */
319};
320
321/************************************************************************
322 *
323 * This is the first part of the initialization sequence that is
324 * implemented in C, but still running from ROM.
325 *
326 * The main purpose is to provide a (serial) console interface as
327 * soon as possible (so we can see any error messages), and to
328 * initialize the RAM so that we can relocate the monitor code to
329 * RAM.
330 *
331 * Be aware of the restrictions: global data is read-only, BSS is not
332 * initialized, and stack space is limited to a few kB.
333 *
334 ************************************************************************
335 */
336
337void board_init_f (ulong bootflag)
338{
339 DECLARE_GLOBAL_DATA_PTR;
340
341 bd_t *bd;
342 ulong len, addr, addr_sp;
343 gd_t *id;
344 init_fnc_t **init_fnc_ptr;
345#ifdef CONFIG_PRAM
346 int i;
347 ulong reg;
348 uchar tmp[64]; /* long enough for environment variables */
349#endif
350
351 /* Pointer is writable since we allocated a register for it */
352 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
353
42d1f039 354#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
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355 /* Clear initial global data */
356 memset ((void *) gd, 0, sizeof (gd_t));
357#endif
358
359 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
360 if ((*init_fnc_ptr) () != 0) {
361 hang ();
362 }
363 }
364
365 /*
366 * Now that we have DRAM mapped and working, we can
367 * relocate the code and continue running from DRAM.
368 *
369 * Reserve memory at end of RAM for (top down in that order):
8bde7f77 370 * - kernel log buffer
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371 * - protected RAM
372 * - LCD framebuffer
373 * - monitor code
374 * - board info struct
375 */
3b57fe0a 376 len = (ulong)&_end - CFG_MONITOR_BASE;
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377
378#ifndef CONFIG_VERY_BIG_RAM
379 addr = CFG_SDRAM_BASE + gd->ram_size;
380#else
381 /* only allow stack below 256M */
382 addr = CFG_SDRAM_BASE +
383 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
384#endif
385
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WD
386#ifdef CONFIG_LOGBUFFER
387 /* reserve kernel log buffer */
388 addr -= (LOGBUFF_RESERVE);
9d2b18a0 389 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
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390#endif
391
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392#ifdef CONFIG_PRAM
393 /*
394 * reserve protected RAM
395 */
396 i = getenv_r ("pram", tmp, sizeof (tmp));
397 reg = (i > 0) ? simple_strtoul (tmp, NULL, 10) : CONFIG_PRAM;
398 addr -= (reg << 10); /* size is in kB */
9d2b18a0 399 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
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400#endif /* CONFIG_PRAM */
401
402 /* round down to next 4 kB limit */
403 addr &= ~(4096 - 1);
9d2b18a0 404 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
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405
406#ifdef CONFIG_LCD
407 /* reserve memory for LCD display (always full pages) */
408 addr = lcd_setmem (addr);
409 gd->fb_base = addr;
410#endif /* CONFIG_LCD */
411
412#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
413 /* reserve memory for video display (always full pages) */
414 addr = video_setmem (addr);
415 gd->fb_base = addr;
416#endif /* CONFIG_VIDEO */
417
418 /*
419 * reserve memory for U-Boot code, data & bss
682011ff 420 * round down to next 4 kB limit
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421 */
422 addr -= len;
682011ff 423 addr &= ~(4096 - 1);
fe8c2806 424
9d2b18a0 425 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
fe8c2806 426
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427#ifdef CONFIG_AMIGAONEG3SE
428 gd->relocaddr = addr;
429#endif
430
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431 /*
432 * reserve memory for malloc() arena
433 */
434 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 435 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 436 TOTAL_MALLOC_LEN >> 10, addr_sp);
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437
438 /*
439 * (permanently) allocate a Board Info struct
440 * and a permanent copy of the "global" data
441 */
442 addr_sp -= sizeof (bd_t);
443 bd = (bd_t *) addr_sp;
444 gd->bd = bd;
9d2b18a0 445 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
fe8c2806 446 sizeof (bd_t), addr_sp);
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447 addr_sp -= sizeof (gd_t);
448 id = (gd_t *) addr_sp;
9d2b18a0 449 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
fe8c2806 450 sizeof (gd_t), addr_sp);
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451
452 /*
453 * Finally, we set up a new (bigger) stack.
454 *
455 * Leave some safety gap for SP, force alignment on 16 byte boundary
456 * Clear initial stack frame
457 */
458 addr_sp -= 16;
459 addr_sp &= ~0xF;
460 *((ulong *) addr_sp)-- = 0;
461 *((ulong *) addr_sp)-- = 0;
9d2b18a0 462 debug ("Stack Pointer at: %08lx\n", addr_sp);
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463
464 /*
465 * Save local variables to board info struct
466 */
467
c837dcb1 468 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
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469 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
470
471#ifdef CONFIG_IP860
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472 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
473 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
fe8c2806 474#else
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475 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
476 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
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477#endif
478
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479#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
480 defined(CONFIG_E500)
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481 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
482#endif
cbd8a35c 483#if defined(CONFIG_MPC5xxx)
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484 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
485#endif
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486
487 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
488
489 WATCHDOG_RESET ();
490 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
491 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
42d1f039 492#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
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493 bd->bi_cpmfreq = gd->cpm_clk;
494 bd->bi_brgfreq = gd->brg_clk;
495 bd->bi_sccfreq = gd->scc_clk;
496 bd->bi_vco = gd->vco_out;
497#endif /* CONFIG_8260 */
cbd8a35c 498#if defined(CONFIG_MPC5xxx)
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499 bd->bi_ipbfreq = gd->ipb_clk;
500 bd->bi_pcifreq = gd->pci_clk;
cbd8a35c 501#endif /* CONFIG_MPC5xxx */
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502 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
503
504#ifdef CFG_EXTBDINFO
505 strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
506 strncpy (bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
507
508 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
509 bd->bi_plb_busfreq = gd->bus_clk;
bedc4970 510#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
fe8c2806 511 bd->bi_pci_busfreq = get_PCI_freq ();
109c0e3a 512 bd->bi_opbfreq = get_OPB_freq ();
5bb226e8 513
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514#if defined(CONFIG_I2CFAST)
515 /*
516 * set bi_iic_fast for linux taking environment variable
517 * "i2cfast" into account
518 */
519 {
520 char *s = getenv ("i2cfast");
521 if (s && ((*s == 'y') || (*s == 'Y'))) {
522 bd->bi_iic_fast[0] = 1;
523 bd->bi_iic_fast[1] = 1;
524 } else {
525 bd->bi_iic_fast[0] = 0;
526 bd->bi_iic_fast[1] = 0;
527 }
528 }
529#else
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530 bd->bi_iic_fast[0] = 0;
531 bd->bi_iic_fast[1] = 0;
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532#endif
533
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534#elif defined(CONFIG_XILINX_ML300)
535 bd->bi_pci_busfreq = get_PCI_freq ();
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536#endif
537#endif
538
9d2b18a0 539 debug ("New Stack Pointer is: %08lx\n", addr_sp);
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540
541 WATCHDOG_RESET ();
542
543#ifdef CONFIG_POST
544 post_bootmode_init();
6dff5529 545 post_run (NULL, POST_ROM | post_bootmode_get(0));
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546#endif
547
548 WATCHDOG_RESET();
549
27b207fd 550 memcpy (id, (void *)gd, sizeof (gd_t));
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551
552 relocate_code (addr_sp, id, addr);
553
554 /* NOTREACHED - relocate_code() does not return */
555}
556
557
558/************************************************************************
559 *
560 * This is the next part if the initialization sequence: we are now
561 * running from RAM and have a "normal" C environment, i. e. global
562 * data can be written, BSS has been cleared, the stack size in not
563 * that critical any more, etc.
564 *
565 ************************************************************************
566 */
567
568void board_init_r (gd_t *id, ulong dest_addr)
569{
570 DECLARE_GLOBAL_DATA_PTR;
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571 cmd_tbl_t *cmdtp;
572 char *s, *e;
573 bd_t *bd;
574 int i;
575 extern void malloc_bin_reloc (void);
576#ifndef CFG_ENV_IS_NOWHERE
577 extern char * env_name_spec;
578#endif
579
580#ifndef CFG_NO_FLASH
581 ulong flash_size;
582#endif
583
584 gd = id; /* initialize RAM version of global data */
585 bd = gd->bd;
586
587 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
588
9d2b18a0 589 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
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590
591 WATCHDOG_RESET ();
592
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593#if defined(CONFIG_BOARD_EARLY_INIT_R)
594 board_early_init_r ();
595#endif
596
fe8c2806 597 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
8bde7f77 598
3b57fe0a 599 monitor_flash_len = (ulong)&__init_end - dest_addr;
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600
601 /*
602 * We have to relocate the command table manually
603 */
8bde7f77 604 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
fe8c2806 605 ulong addr;
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606 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
607#if 0
608 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
609 cmdtp->name, (ulong) (cmdtp->cmd), addr);
610#endif
611 cmdtp->cmd =
612 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
613
614 addr = (ulong)(cmdtp->name) + gd->reloc_off;
615 cmdtp->name = (char *)addr;
616
617 if (cmdtp->usage) {
618 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
619 cmdtp->usage = (char *)addr;
620 }
621#ifdef CFG_LONGHELP
622 if (cmdtp->help) {
623 addr = (ulong)(cmdtp->help) + gd->reloc_off;
624 cmdtp->help = (char *)addr;
625 }
626#endif
627 }
628 /* there are some other pointer constants we must deal with */
629#ifndef CFG_ENV_IS_NOWHERE
630 env_name_spec += gd->reloc_off;
631#endif
632
633 WATCHDOG_RESET ();
634
56f94be3 635#ifdef CONFIG_LOGBUFFER
228f29ac 636 logbuff_init_ptrs ();
56f94be3 637#endif
fe8c2806 638#ifdef CONFIG_POST
228f29ac 639 post_output_backlog ();
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640 post_reloc ();
641#endif
642
643 WATCHDOG_RESET();
644
645#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)
646 icache_enable (); /* it's time to enable the instruction cache */
647#endif
648
42d1f039 649#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
c837dcb1 650 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
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651#endif
652
3bac3513 653#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
fe8c2806 654 /*
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655 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
656 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
657 * bridge there.
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658 */
659 pci_init ();
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660#endif
661#if defined(CONFIG_BAB7xx)
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662 /*
663 * Initialise the ISA bridge
664 */
665 initialise_w83c553f ();
666#endif
667
668 asm ("sync ; isync");
669
670 /*
671 * Setup trap handlers
672 */
673 trap_init (dest_addr);
674
675#if !defined(CFG_NO_FLASH)
676 puts ("FLASH: ");
677
678 if ((flash_size = flash_init ()) > 0) {
0cb61d7d 679# ifdef CFG_FLASH_CHECKSUM
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680 print_size (flash_size, "");
681 /*
682 * Compute and print flash CRC if flashchecksum is set to 'y'
683 *
684 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
685 */
686 s = getenv ("flashchecksum");
687 if (s && (*s == 'y')) {
688 printf (" CRC: %08lX",
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689 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
690 );
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691 }
692 putc ('\n');
0cb61d7d 693# else /* !CFG_FLASH_CHECKSUM */
fe8c2806 694 print_size (flash_size, "\n");
0cb61d7d 695# endif /* CFG_FLASH_CHECKSUM */
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696 } else {
697 puts (failed);
698 hang ();
699 }
700
701 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
702 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
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703# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
704 /* flash mapped at end of memory map */
705 bd->bi_flashoffset = TEXT_BASE + flash_size;
0cb61d7d 706# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
3b57fe0a 707 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 708# else
fe8c2806 709 bd->bi_flashoffset = 0;
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710# endif
711#else /* CFG_NO_FLASH */
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712
713 bd->bi_flashsize = 0;
714 bd->bi_flashstart = 0;
715 bd->bi_flashoffset = 0;
716#endif /* !CFG_NO_FLASH */
717
718 WATCHDOG_RESET ();
719
720 /* initialize higher level parts of CPU like time base and timers */
721 cpu_init_r ();
722
723 WATCHDOG_RESET ();
724
725 /* initialize malloc() area */
726 mem_malloc_init ();
727 malloc_bin_reloc ();
728
729#ifdef CONFIG_SPI
730# if !defined(CFG_ENV_IS_IN_EEPROM)
731 spi_init_f ();
732# endif
733 spi_init_r ();
734#endif
735
736 /* relocate environment function pointers etc. */
737 env_relocate ();
738
739 /*
740 * Fill in missing fields of bd_info.
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741 * We do this here, where we have "normal" access to the
742 * environment; we used to do this still running from ROM,
743 * where had to use getenv_r(), which can be pretty slow when
744 * the environment is in EEPROM.
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745 */
746 s = getenv ("ethaddr");
747#if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210)
748 if (s == NULL)
749 board_get_enetaddr (bd->bi_enetaddr);
750 else
751#endif
752 for (i = 0; i < 6; ++i) {
753 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
754 if (s)
755 s = (*e) ? e + 1 : e;
756 }
757#ifdef CONFIG_HERMES
758 if ((gd->board_type >> 16) == 2)
759 bd->bi_ethspeed = gd->board_type & 0xFFFF;
760 else
761 bd->bi_ethspeed = 0xFFFF;
762#endif
763
764#ifdef CONFIG_NX823
765 load_sernum_ethaddr ();
766#endif
767
42d1f039 768#if defined(CFG_GT_6426x) || defined(CONFIG_PN62) || defined(CONFIG_PPCHAMELEONEVB) || \
ba56f625 769 defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || defined(CONFIG_440_GX)
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770 /* handle the 2nd ethernet address */
771
772 s = getenv ("eth1addr");
773
774 for (i = 0; i < 6; ++i) {
775 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
776 if (s)
777 s = (*e) ? e + 1 : e;
778 }
779#endif
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780#if defined(CFG_GT_6426x) || defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || \
781 defined(CONFIG_440_GX)
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782 /* handle the 3rd ethernet address */
783
784 s = getenv ("eth2addr");
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785#if defined(CONFIG_XPEDITE1K)
786 if (s == NULL)
787 board_get_enetaddr(bd->bi_enet2addr);
788 else
789#endif
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790 for (i = 0; i < 6; ++i) {
791 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
792 if (s)
793 s = (*e) ? e + 1 : e;
794 }
795#endif
796
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797#if defined(CONFIG_440_GX)
798 /* handle 4th ethernet address */
799 s = getenv("eth3addr");
800#if defined(CONFIG_XPEDITE1K)
801 if (s == NULL)
802 board_get_enetaddr(bd->bi_enet3addr);
803 else
804#endif
805 for (i = 0; i < 6; ++i) {
806 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
807 if (s)
808 s = (*e) ? e + 1 : e;
809 }
810#endif
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811
812#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
813 defined(CONFIG_CCM)
814 load_sernum_ethaddr ();
815#endif
816 /* IP Address */
817 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
818
819 WATCHDOG_RESET ();
820
821#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx)
822 /*
823 * Do pci configuration
824 */
825 pci_init ();
826#endif
827
828/** leave this here (after malloc(), environment and PCI are working) **/
829 /* Initialize devices */
830 devices_init ();
831
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832 /* Initialize the jump table for applications */
833 jumptable_init ();
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834
835 /* Initialize the console (after the relocation and devices init) */
836 console_init_r ();
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837
838#if defined(CONFIG_CCM) || \
839 defined(CONFIG_COGENT) || \
840 defined(CONFIG_CPCI405) || \
841 defined(CONFIG_EVB64260) || \
56f94be3 842 defined(CONFIG_KUP4K) || \
0608e04d 843 defined(CONFIG_KUP4X) || \
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844 defined(CONFIG_LWMON) || \
845 defined(CONFIG_PCU_E) || \
846 defined(CONFIG_W7O) || \
847 defined(CONFIG_MISC_INIT_R)
848 /* miscellaneous platform dependent initialisations */
849 misc_init_r ();
850#endif
851
852#ifdef CONFIG_HERMES
853 if (bd->bi_ethspeed != 0xFFFF)
854 hermes_start_lxt980 ((int) bd->bi_ethspeed);
855#endif
856
857#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
858 defined(CONFIG_CCM) || \
3bac3513 859 defined(CONFIG_ELPT860) || \
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860 defined(CONFIG_EP8260) || \
861 defined(CONFIG_IP860) || \
862 defined(CONFIG_IVML24) || \
863 defined(CONFIG_IVMS8) || \
864 defined(CONFIG_LWMON) || \
865 defined(CONFIG_MPC8260ADS) || \
5d232d0e 866 defined(CONFIG_MPC8266ADS) || \
42d1f039 867 defined(CONFIG_MPC8560ADS) || \
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868 defined(CONFIG_PCU_E) || \
869 defined(CONFIG_RPXSUPER) || \
870 defined(CONFIG_SPD823TS) )
871
872 WATCHDOG_RESET ();
9d2b18a0 873 debug ("Reset Ethernet PHY\n");
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874 reset_phy ();
875#endif
876
877#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
878 WATCHDOG_RESET ();
879 puts ("KGDB: ");
880 kgdb_init ();
881#endif
882
9d2b18a0 883 debug ("U-Boot relocated to %08lx\n", dest_addr);
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884
885 /*
886 * Enable Interrupts
887 */
888 interrupt_init ();
889
890 /* Must happen after interrupts are initialized since
891 * an irq handler gets installed
892 */
42dfe7a1 893#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
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894 serial_buffered_init();
895#endif
896
897#ifdef CONFIG_STATUS_LED
898 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
899#endif
900
901 udelay (20);
902
903 set_timer (0);
904
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905 /* Initialize from environment */
906 if ((s = getenv ("loadaddr")) != NULL) {
907 load_addr = simple_strtoul (s, NULL, 16);
908 }
909#if (CONFIG_COMMANDS & CFG_CMD_NET)
910 if ((s = getenv ("bootfile")) != NULL) {
911 copy_filename (BootFile, s, sizeof (BootFile));
912 }
913#endif /* CFG_CMD_NET */
914
915 WATCHDOG_RESET ();
916
917#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
918 WATCHDOG_RESET ();
919 puts ("SCSI: ");
920 scsi_init ();
921#endif
922
923#if (CONFIG_COMMANDS & CFG_CMD_DOC)
924 WATCHDOG_RESET ();
925 puts ("DOC: ");
926 doc_init ();
927#endif
928
bedc4970
SR
929#if (CONFIG_COMMANDS & CFG_CMD_NAND)
930 WATCHDOG_RESET ();
a43278a4 931 puts ("NAND:");
bedc4970
SR
932 nand_init(); /* go init the NAND */
933#endif
934
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935#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
936 WATCHDOG_RESET ();
937 puts ("Net: ");
938 eth_initialize (bd);
939#endif
940
941#ifdef CONFIG_POST
6dff5529 942 post_run (NULL, POST_RAM | post_bootmode_get(0));
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943#endif
944
945#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
946 WATCHDOG_RESET ();
947 puts ("PCMCIA:");
948 pcmcia_init ();
949#endif
950
951#if (CONFIG_COMMANDS & CFG_CMD_IDE)
952 WATCHDOG_RESET ();
953# ifdef CONFIG_IDE_8xx_PCCARD
954 puts ("PCMCIA:");
955# else
956 puts ("IDE: ");
957#endif
958 ide_init ();
959#endif /* CFG_CMD_IDE */
960
961#ifdef CONFIG_LAST_STAGE_INIT
962 WATCHDOG_RESET ();
963 /*
964 * Some parts can be only initialized if all others (like
965 * Interrupts) are up and running (i.e. the PC-style ISA
966 * keyboard).
967 */
968 last_stage_init ();
969#endif
970
971#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
972 WATCHDOG_RESET ();
973 bedbug_init ();
974#endif
975
228f29ac 976#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
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977 /*
978 * Export available size of memory for Linux,
979 * taking into account the protected RAM at top of memory
980 */
981 {
982 ulong pram;
fe8c2806 983 uchar memsz[32];
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984#ifdef CONFIG_PRAM
985 char *s;
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986
987 if ((s = getenv ("pram")) != NULL) {
988 pram = simple_strtoul (s, NULL, 10);
989 } else {
990 pram = CONFIG_PRAM;
991 }
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992#else
993 pram=0;
994#endif
995#ifdef CONFIG_LOGBUFFER
996 /* Also take the logbuffer into account (pram is in kB) */
997 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
998#endif
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999 sprintf (memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1000 setenv ("mem", memsz);
1001 }
1002#endif
1003
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1004#ifdef CONFIG_PS2KBD
1005 puts ("PS/2: ");
1006 kbd_init();
1007#endif
1008
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1009#ifdef CONFIG_MODEM_SUPPORT
1010 {
1011 extern int do_mdm_init;
1012 do_mdm_init = gd->do_mdm_init;
1013 }
1014#endif
1015
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1016 /* Initialization complete - start the monitor */
1017
1018 /* main_loop() can return to retry autoboot, if so just run it again. */
1019 for (;;) {
1020 WATCHDOG_RESET ();
1021 main_loop ();
1022 }
1023
1024 /* NOTREACHED - no way out of command loop except booting */
1025}
1026
1027void hang (void)
1028{
1029 puts ("### ERROR ### Please RESET the board ###\n");
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WD
1030#ifdef CONFIG_SHOW_BOOT_PROGRESS
1031 show_boot_progress(-30);
1032#endif
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WD
1033 for (;;);
1034}
1035
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1036#ifdef CONFIG_MODEM_SUPPORT
1037/* called from main loop (common/main.c) */
1038extern void dbg(const char *fmt, ...);
1039int mdm_init (void)
1040{
1041 char env_str[16];
1042 char *init_str;
1043 int i;
1044 extern char console_buffer[];
1045 static inline void mdm_readline(char *buf, int bufsiz);
1046 extern void enable_putc(void);
1047 extern int hwflow_onoff(int);
1048
1049 enable_putc(); /* enable serial_putc() */
1050
1051#ifdef CONFIG_HWFLOW
1052 init_str = getenv("mdm_flow_control");
1053 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1054 hwflow_onoff (1);
1055 else
1056 hwflow_onoff(-1);
1057#endif
1058
1059 for (i = 1;;i++) {
1060 sprintf(env_str, "mdm_init%d", i);
1061 if ((init_str = getenv(env_str)) != NULL) {
1062 serial_puts(init_str);
1063 serial_puts("\n");
1064 for(;;) {
1065 mdm_readline(console_buffer, CFG_CBSIZE);
1066 dbg("ini%d: [%s]", i, console_buffer);
1067
1068 if ((strcmp(console_buffer, "OK") == 0) ||
1069 (strcmp(console_buffer, "ERROR") == 0)) {
1070 dbg("ini%d: cmd done", i);
1071 break;
1072 } else /* in case we are originating call ... */
1073 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1074 dbg("ini%d: connect", i);
1075 return 0;
1076 }
1077 }
1078 } else
1079 break; /* no init string - stop modem init */
1080
1081 udelay(100000);
1082 }
1083
1084 udelay(100000);
1085
1086 /* final stage - wait for connect */
1087 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1088 message from modem */
1089 mdm_readline(console_buffer, CFG_CBSIZE);
1090 dbg("ini_f: [%s]", console_buffer);
1091 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1092 dbg("ini_f: connected");
1093 return 0;
1094 }
1095 }
1096
1097 return 0;
1098}
1099
1100/* 'inline' - We have to do it fast */
1101static inline void mdm_readline(char *buf, int bufsiz)
1102{
1103 char c;
1104 char *p;
1105 int n;
1106
1107 n = 0;
1108 p = buf;
1109 for(;;) {
1110 c = serial_getc();
1111
1112 /* dbg("(%c)", c); */
1113
1114 switch(c) {
1115 case '\r':
1116 break;
1117 case '\n':
1118 *p = '\0';
1119 return;
1120
1121 default:
1122 if(n++ > bufsiz) {
1123 *p = '\0';
1124 return; /* sanity check */
1125 }
1126 *p = c;
1127 p++;
1128 break;
1129 }
1130 }
1131}
1132#endif
1133
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1134#if 0 /* We could use plain global data, but the resulting code is bigger */
1135/*
1136 * Pointer to initial global data area
1137 *
1138 * Here we initialize it.
1139 */
1140#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1141#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1142DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1143#endif /* 0 */
1144
1145/************************************************************************/