]> git.ipfire.org Git - people/ms/u-boot.git/blame - lib_ppc/board.c
* Patch by Andrea Scian, 17 Feb 2004:
[people/ms/u-boot.git] / lib_ppc / board.c
CommitLineData
fe8c2806 1/*
d4ca31c4 2 * (C) Copyright 2000-2004
fe8c2806
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
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29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
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32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
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35#ifdef CONFIG_MPC5XXX
36#include <mpc5xxx.h>
37#endif
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38#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
fe8c2806 51#ifdef CFG_ALLOC_DPRAM
42d1f039 52#if !(defined(CONFIG_8260)||defined(CONFIG_MPC8560))
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53#include <commproc.h>
54#endif
7aa78614 55#endif
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56#include <version.h>
57#if defined(CONFIG_BAB7xx)
58#include <w83c553f.h>
59#endif
60#include <dtt.h>
61#if defined(CONFIG_POST)
62#include <post.h>
63#endif
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64#if defined(CONFIG_LOGBUFFER)
65#include <logbuff.h>
66#endif
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67#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
68#include <asm/cache.h>
69#endif
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70#ifdef CONFIG_PS2KBD
71#include <keyboard.h>
72#endif
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73
74#if (CONFIG_COMMANDS & CFG_CMD_DOC)
75void doc_init (void);
76#endif
77#if defined(CONFIG_HARD_I2C) || \
78 defined(CONFIG_SOFT_I2C)
79#include <i2c.h>
80#endif
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81#if (CONFIG_COMMANDS & CFG_CMD_NAND)
82void nand_init (void);
83#endif
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84
85static char *failed = "*** failed ***\n";
86
87#if defined(CONFIG_PCU_E) || defined(CONFIG_OXC)
88extern flash_info_t flash_info[];
89#endif
90
91#include <environment.h>
92
93#if ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
94 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
95 defined(CFG_ENV_IS_IN_NVRAM)
96#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
97#else
98#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
99#endif
100
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101extern ulong __init_end;
102extern ulong _end;
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103ulong monitor_flash_len;
104
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105#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
106#include <bedbug/type.h>
107#endif
108
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109/*
110 * Begin and End of memory area for malloc(), and current "brk"
111 */
112static ulong mem_malloc_start = 0;
113static ulong mem_malloc_end = 0;
114static ulong mem_malloc_brk = 0;
115
116/************************************************************************
117 * Utilities *
118 ************************************************************************
119 */
120
121/*
122 * The Malloc area is immediately below the monitor copy in DRAM
123 */
124static void mem_malloc_init (void)
125{
126 DECLARE_GLOBAL_DATA_PTR;
127
128 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
129
130 mem_malloc_end = dest_addr;
131 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
132 mem_malloc_brk = mem_malloc_start;
133
134 memset ((void *) mem_malloc_start,
135 0,
136 mem_malloc_end - mem_malloc_start);
137}
138
139void *sbrk (ptrdiff_t increment)
140{
141 ulong old = mem_malloc_brk;
142 ulong new = old + increment;
143
144 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
145 return (NULL);
146 }
147 mem_malloc_brk = new;
148 return ((void *) old);
149}
150
151char *strmhz (char *buf, long hz)
152{
153 long l, n;
154 long m;
155
156 n = hz / 1000000L;
157 l = sprintf (buf, "%ld", n);
158 m = (hz % 1000000L) / 1000L;
159 if (m != 0)
160 sprintf (buf + l, ".%03ld", m);
161 return (buf);
162}
163
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164/*
165 * All attempts to come up with a "common" initialization sequence
166 * that works for all boards and architectures failed: some of the
167 * requirements are just _too_ different. To get rid of the resulting
168 * mess of board dependend #ifdef'ed code we now make the whole
169 * initialization sequence configurable to the user.
170 *
171 * The requirements for any new initalization function is simple: it
172 * receives a pointer to the "global data" structure as it's only
173 * argument, and returns an integer return code, where 0 means
174 * "continue" and != 0 means "fatal error, hang the system".
175 */
176typedef int (init_fnc_t) (void);
177
178/************************************************************************
179 * Init Utilities *
180 ************************************************************************
181 * Some of this code should be moved into the core functions,
182 * but let's get it working (again) first...
183 */
184
185static int init_baudrate (void)
186{
187 DECLARE_GLOBAL_DATA_PTR;
188
189 uchar tmp[64]; /* long enough for environment variables */
190 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
191
192 gd->baudrate = (i > 0)
193 ? (int) simple_strtoul (tmp, NULL, 10)
194 : CONFIG_BAUDRATE;
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195 return (0);
196}
197
198/***********************************************************************/
199
200static int init_func_ram (void)
201{
202 DECLARE_GLOBAL_DATA_PTR;
203
204#ifdef CONFIG_BOARD_TYPES
205 int board_type = gd->board_type;
206#else
207 int board_type = 0; /* use dummy arg */
208#endif
209 puts ("DRAM: ");
210
211 if ((gd->ram_size = initdram (board_type)) > 0) {
212 print_size (gd->ram_size, "\n");
213 return (0);
214 }
215 puts (failed);
216 return (1);
217}
218
219/***********************************************************************/
220
221#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
222static int init_func_i2c (void)
223{
224 puts ("I2C: ");
225 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
226 puts ("ready\n");
227 return (0);
228}
229#endif
230
231/***********************************************************************/
232
233#if defined(CONFIG_WATCHDOG)
234static int init_func_watchdog_init (void)
235{
236 puts (" Watchdog enabled\n");
237 WATCHDOG_RESET ();
238 return (0);
239}
240# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
241
242static int init_func_watchdog_reset (void)
243{
244 WATCHDOG_RESET ();
245 return (0);
246}
247# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
248#else
249# define INIT_FUNC_WATCHDOG_INIT /* undef */
250# define INIT_FUNC_WATCHDOG_RESET /* undef */
251#endif /* CONFIG_WATCHDOG */
252
253/************************************************************************
254 * Initialization sequence *
255 ************************************************************************
256 */
257
258init_fnc_t *init_sequence[] = {
259
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260#if defined(CONFIG_BOARD_EARLY_INIT_F)
261 board_early_init_f,
fe8c2806 262#endif
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263
264#if !defined(CONFIG_TQM866M)
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265 get_clocks, /* get CPU and bus clocks (etc.) */
266 init_timebase,
c178d3da 267#endif
fe8c2806 268#ifdef CFG_ALLOC_DPRAM
42d1f039 269#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
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270 dpram_init,
271#endif
7aa78614 272#endif
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273#if defined(CONFIG_BOARD_POSTCLK_INIT)
274 board_postclk_init,
275#endif
276 env_init,
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277#if defined(CONFIG_TQM866M)
278 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
279 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
280 init_timebase,
281#endif
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282 init_baudrate,
283 serial_init,
284 console_init_f,
285 display_options,
286#if defined(CONFIG_8260)
287 prt_8260_rsr,
288 prt_8260_clks,
289#endif /* CONFIG_8260 */
290 checkcpu,
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291#if defined(CONFIG_MPC5XXX)
292 prt_mpc5xxx_clks,
293#endif /* CONFIG_MPC5XXX */
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294 checkboard,
295 INIT_FUNC_WATCHDOG_INIT
c837dcb1 296#if defined(CONFIG_MISC_INIT_F)
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297 misc_init_f,
298#endif
299 INIT_FUNC_WATCHDOG_RESET
300#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
301 init_func_i2c,
302#endif
303#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
304 dtt_init,
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305#endif
306#ifdef CONFIG_POST
307 post_init_f,
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308#endif
309 INIT_FUNC_WATCHDOG_RESET
310 init_func_ram,
311#if defined(CFG_DRAM_TEST)
312 testdram,
313#endif /* CFG_DRAM_TEST */
314 INIT_FUNC_WATCHDOG_RESET
315
316 NULL, /* Terminate this list */
317};
318
319/************************************************************************
320 *
321 * This is the first part of the initialization sequence that is
322 * implemented in C, but still running from ROM.
323 *
324 * The main purpose is to provide a (serial) console interface as
325 * soon as possible (so we can see any error messages), and to
326 * initialize the RAM so that we can relocate the monitor code to
327 * RAM.
328 *
329 * Be aware of the restrictions: global data is read-only, BSS is not
330 * initialized, and stack space is limited to a few kB.
331 *
332 ************************************************************************
333 */
334
335void board_init_f (ulong bootflag)
336{
337 DECLARE_GLOBAL_DATA_PTR;
338
339 bd_t *bd;
340 ulong len, addr, addr_sp;
341 gd_t *id;
342 init_fnc_t **init_fnc_ptr;
343#ifdef CONFIG_PRAM
344 int i;
345 ulong reg;
346 uchar tmp[64]; /* long enough for environment variables */
347#endif
348
349 /* Pointer is writable since we allocated a register for it */
350 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
351
42d1f039 352#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
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353 /* Clear initial global data */
354 memset ((void *) gd, 0, sizeof (gd_t));
355#endif
356
357 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
358 if ((*init_fnc_ptr) () != 0) {
359 hang ();
360 }
361 }
362
363 /*
364 * Now that we have DRAM mapped and working, we can
365 * relocate the code and continue running from DRAM.
366 *
367 * Reserve memory at end of RAM for (top down in that order):
8bde7f77 368 * - kernel log buffer
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369 * - protected RAM
370 * - LCD framebuffer
371 * - monitor code
372 * - board info struct
373 */
3b57fe0a 374 len = (ulong)&_end - CFG_MONITOR_BASE;
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375
376#ifndef CONFIG_VERY_BIG_RAM
377 addr = CFG_SDRAM_BASE + gd->ram_size;
378#else
379 /* only allow stack below 256M */
380 addr = CFG_SDRAM_BASE +
381 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
382#endif
383
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384#ifdef CONFIG_LOGBUFFER
385 /* reserve kernel log buffer */
386 addr -= (LOGBUFF_RESERVE);
9d2b18a0 387 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
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388#endif
389
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390#ifdef CONFIG_PRAM
391 /*
392 * reserve protected RAM
393 */
394 i = getenv_r ("pram", tmp, sizeof (tmp));
395 reg = (i > 0) ? simple_strtoul (tmp, NULL, 10) : CONFIG_PRAM;
396 addr -= (reg << 10); /* size is in kB */
9d2b18a0 397 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
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398#endif /* CONFIG_PRAM */
399
400 /* round down to next 4 kB limit */
401 addr &= ~(4096 - 1);
9d2b18a0 402 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
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403
404#ifdef CONFIG_LCD
405 /* reserve memory for LCD display (always full pages) */
406 addr = lcd_setmem (addr);
407 gd->fb_base = addr;
408#endif /* CONFIG_LCD */
409
410#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
411 /* reserve memory for video display (always full pages) */
412 addr = video_setmem (addr);
413 gd->fb_base = addr;
414#endif /* CONFIG_VIDEO */
415
416 /*
417 * reserve memory for U-Boot code, data & bss
682011ff 418 * round down to next 4 kB limit
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419 */
420 addr -= len;
682011ff 421 addr &= ~(4096 - 1);
fe8c2806 422
9d2b18a0 423 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
fe8c2806 424
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425#ifdef CONFIG_AMIGAONEG3SE
426 gd->relocaddr = addr;
427#endif
428
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429 /*
430 * reserve memory for malloc() arena
431 */
432 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 433 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 434 TOTAL_MALLOC_LEN >> 10, addr_sp);
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435
436 /*
437 * (permanently) allocate a Board Info struct
438 * and a permanent copy of the "global" data
439 */
440 addr_sp -= sizeof (bd_t);
441 bd = (bd_t *) addr_sp;
442 gd->bd = bd;
9d2b18a0 443 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
fe8c2806 444 sizeof (bd_t), addr_sp);
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445 addr_sp -= sizeof (gd_t);
446 id = (gd_t *) addr_sp;
9d2b18a0 447 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
fe8c2806 448 sizeof (gd_t), addr_sp);
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449
450 /*
451 * Finally, we set up a new (bigger) stack.
452 *
453 * Leave some safety gap for SP, force alignment on 16 byte boundary
454 * Clear initial stack frame
455 */
456 addr_sp -= 16;
457 addr_sp &= ~0xF;
458 *((ulong *) addr_sp)-- = 0;
459 *((ulong *) addr_sp)-- = 0;
9d2b18a0 460 debug ("Stack Pointer at: %08lx\n", addr_sp);
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461
462 /*
463 * Save local variables to board info struct
464 */
465
c837dcb1 466 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
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467 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
468
469#ifdef CONFIG_IP860
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470 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
471 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
fe8c2806 472#else
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473 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
474 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
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475#endif
476
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477#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
478 defined(CONFIG_E500)
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479 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
480#endif
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481#if defined(CONFIG_MPC5XXX)
482 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
483#endif
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484
485 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
486
487 WATCHDOG_RESET ();
488 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
489 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
42d1f039 490#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
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491 bd->bi_cpmfreq = gd->cpm_clk;
492 bd->bi_brgfreq = gd->brg_clk;
493 bd->bi_sccfreq = gd->scc_clk;
494 bd->bi_vco = gd->vco_out;
495#endif /* CONFIG_8260 */
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496#if defined(CONFIG_MPC5XXX)
497 bd->bi_ipbfreq = gd->ipb_clk;
498 bd->bi_pcifreq = gd->pci_clk;
499#endif /* CONFIG_MPC5XXX */
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500 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
501
502#ifdef CFG_EXTBDINFO
503 strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
504 strncpy (bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
505
506 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
507 bd->bi_plb_busfreq = gd->bus_clk;
bedc4970 508#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
fe8c2806 509 bd->bi_pci_busfreq = get_PCI_freq ();
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510
511#ifdef CFG_OPB_FREQ
512 bd->bi_opbfreq = CFG_OPB_FREQ;
513#else
514 bd->bi_opbfreq = 50000000;
515#endif
516 bd->bi_iic_fast[0] = 0;
517 bd->bi_iic_fast[1] = 0;
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518#elif defined(CONFIG_XILINX_ML300)
519 bd->bi_pci_busfreq = get_PCI_freq ();
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520#endif
521#endif
522
9d2b18a0 523 debug ("New Stack Pointer is: %08lx\n", addr_sp);
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524
525 WATCHDOG_RESET ();
526
527#ifdef CONFIG_POST
528 post_bootmode_init();
6dff5529 529 post_run (NULL, POST_ROM | post_bootmode_get(0));
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530#endif
531
532 WATCHDOG_RESET();
533
27b207fd 534 memcpy (id, (void *)gd, sizeof (gd_t));
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535
536 relocate_code (addr_sp, id, addr);
537
538 /* NOTREACHED - relocate_code() does not return */
539}
540
541
542/************************************************************************
543 *
544 * This is the next part if the initialization sequence: we are now
545 * running from RAM and have a "normal" C environment, i. e. global
546 * data can be written, BSS has been cleared, the stack size in not
547 * that critical any more, etc.
548 *
549 ************************************************************************
550 */
551
552void board_init_r (gd_t *id, ulong dest_addr)
553{
554 DECLARE_GLOBAL_DATA_PTR;
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555 cmd_tbl_t *cmdtp;
556 char *s, *e;
557 bd_t *bd;
558 int i;
559 extern void malloc_bin_reloc (void);
560#ifndef CFG_ENV_IS_NOWHERE
561 extern char * env_name_spec;
562#endif
563
564#ifndef CFG_NO_FLASH
565 ulong flash_size;
566#endif
567
568 gd = id; /* initialize RAM version of global data */
569 bd = gd->bd;
570
571 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
572
9d2b18a0 573 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
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574
575 WATCHDOG_RESET ();
576
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577#if defined(CONFIG_BOARD_EARLY_INIT_R)
578 board_early_init_r ();
579#endif
580
fe8c2806 581 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
8bde7f77 582
3b57fe0a 583 monitor_flash_len = (ulong)&__init_end - dest_addr;
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584
585 /*
586 * We have to relocate the command table manually
587 */
8bde7f77 588 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
fe8c2806 589 ulong addr;
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590 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
591#if 0
592 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
593 cmdtp->name, (ulong) (cmdtp->cmd), addr);
594#endif
595 cmdtp->cmd =
596 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
597
598 addr = (ulong)(cmdtp->name) + gd->reloc_off;
599 cmdtp->name = (char *)addr;
600
601 if (cmdtp->usage) {
602 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
603 cmdtp->usage = (char *)addr;
604 }
605#ifdef CFG_LONGHELP
606 if (cmdtp->help) {
607 addr = (ulong)(cmdtp->help) + gd->reloc_off;
608 cmdtp->help = (char *)addr;
609 }
610#endif
611 }
612 /* there are some other pointer constants we must deal with */
613#ifndef CFG_ENV_IS_NOWHERE
614 env_name_spec += gd->reloc_off;
615#endif
616
617 WATCHDOG_RESET ();
618
56f94be3 619#ifdef CONFIG_LOGBUFFER
228f29ac 620 logbuff_init_ptrs ();
56f94be3 621#endif
fe8c2806 622#ifdef CONFIG_POST
228f29ac 623 post_output_backlog ();
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624 post_reloc ();
625#endif
626
627 WATCHDOG_RESET();
628
629#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)
630 icache_enable (); /* it's time to enable the instruction cache */
631#endif
632
42d1f039 633#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
c837dcb1 634 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
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635#endif
636
3bac3513 637#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
fe8c2806 638 /*
3bac3513
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639 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
640 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
641 * bridge there.
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642 */
643 pci_init ();
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644#endif
645#if defined(CONFIG_BAB7xx)
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646 /*
647 * Initialise the ISA bridge
648 */
649 initialise_w83c553f ();
650#endif
651
652 asm ("sync ; isync");
653
654 /*
655 * Setup trap handlers
656 */
657 trap_init (dest_addr);
658
659#if !defined(CFG_NO_FLASH)
660 puts ("FLASH: ");
661
662 if ((flash_size = flash_init ()) > 0) {
0cb61d7d 663# ifdef CFG_FLASH_CHECKSUM
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664 print_size (flash_size, "");
665 /*
666 * Compute and print flash CRC if flashchecksum is set to 'y'
667 *
668 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
669 */
670 s = getenv ("flashchecksum");
671 if (s && (*s == 'y')) {
672 printf (" CRC: %08lX",
673 crc32 (0,
674 (const unsigned char *) CFG_FLASH_BASE,
675 flash_size)
676 );
677 }
678 putc ('\n');
0cb61d7d 679# else /* !CFG_FLASH_CHECKSUM */
fe8c2806 680 print_size (flash_size, "\n");
0cb61d7d 681# endif /* CFG_FLASH_CHECKSUM */
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682 } else {
683 puts (failed);
684 hang ();
685 }
686
687 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
688 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
0cb61d7d 689# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC)
fe8c2806 690 bd->bi_flashoffset = 0;
0cb61d7d 691# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
3b57fe0a 692 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 693# else
fe8c2806 694 bd->bi_flashoffset = 0;
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695# endif
696#else /* CFG_NO_FLASH */
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697
698 bd->bi_flashsize = 0;
699 bd->bi_flashstart = 0;
700 bd->bi_flashoffset = 0;
701#endif /* !CFG_NO_FLASH */
702
703 WATCHDOG_RESET ();
704
705 /* initialize higher level parts of CPU like time base and timers */
706 cpu_init_r ();
707
708 WATCHDOG_RESET ();
709
710 /* initialize malloc() area */
711 mem_malloc_init ();
712 malloc_bin_reloc ();
713
714#ifdef CONFIG_SPI
715# if !defined(CFG_ENV_IS_IN_EEPROM)
716 spi_init_f ();
717# endif
718 spi_init_r ();
719#endif
720
721 /* relocate environment function pointers etc. */
722 env_relocate ();
723
724 /*
725 * Fill in missing fields of bd_info.
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726 * We do this here, where we have "normal" access to the
727 * environment; we used to do this still running from ROM,
728 * where had to use getenv_r(), which can be pretty slow when
729 * the environment is in EEPROM.
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730 */
731 s = getenv ("ethaddr");
732#if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210)
733 if (s == NULL)
734 board_get_enetaddr (bd->bi_enetaddr);
735 else
736#endif
737 for (i = 0; i < 6; ++i) {
738 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
739 if (s)
740 s = (*e) ? e + 1 : e;
741 }
742#ifdef CONFIG_HERMES
743 if ((gd->board_type >> 16) == 2)
744 bd->bi_ethspeed = gd->board_type & 0xFFFF;
745 else
746 bd->bi_ethspeed = 0xFFFF;
747#endif
748
749#ifdef CONFIG_NX823
750 load_sernum_ethaddr ();
751#endif
752
42d1f039 753#if defined(CFG_GT_6426x) || defined(CONFIG_PN62) || defined(CONFIG_PPCHAMELEONEVB) || \
ba56f625 754 defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || defined(CONFIG_440_GX)
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755 /* handle the 2nd ethernet address */
756
757 s = getenv ("eth1addr");
758
759 for (i = 0; i < 6; ++i) {
760 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
761 if (s)
762 s = (*e) ? e + 1 : e;
763 }
764#endif
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765#if defined(CFG_GT_6426x) || defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || \
766 defined(CONFIG_440_GX)
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767 /* handle the 3rd ethernet address */
768
769 s = getenv ("eth2addr");
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770#if defined(CONFIG_XPEDITE1K)
771 if (s == NULL)
772 board_get_enetaddr(bd->bi_enet2addr);
773 else
774#endif
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775 for (i = 0; i < 6; ++i) {
776 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
777 if (s)
778 s = (*e) ? e + 1 : e;
779 }
780#endif
781
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782#if defined(CONFIG_440_GX)
783 /* handle 4th ethernet address */
784 s = getenv("eth3addr");
785#if defined(CONFIG_XPEDITE1K)
786 if (s == NULL)
787 board_get_enetaddr(bd->bi_enet3addr);
788 else
789#endif
790 for (i = 0; i < 6; ++i) {
791 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
792 if (s)
793 s = (*e) ? e + 1 : e;
794 }
795#endif
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796
797#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
798 defined(CONFIG_CCM)
799 load_sernum_ethaddr ();
800#endif
801 /* IP Address */
802 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
803
804 WATCHDOG_RESET ();
805
806#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx)
807 /*
808 * Do pci configuration
809 */
810 pci_init ();
811#endif
812
813/** leave this here (after malloc(), environment and PCI are working) **/
814 /* Initialize devices */
815 devices_init ();
816
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817 /* Initialize the jump table for applications */
818 jumptable_init ();
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819
820 /* Initialize the console (after the relocation and devices init) */
821 console_init_r ();
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822
823#if defined(CONFIG_CCM) || \
824 defined(CONFIG_COGENT) || \
825 defined(CONFIG_CPCI405) || \
826 defined(CONFIG_EVB64260) || \
56f94be3 827 defined(CONFIG_KUP4K) || \
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828 defined(CONFIG_LWMON) || \
829 defined(CONFIG_PCU_E) || \
830 defined(CONFIG_W7O) || \
831 defined(CONFIG_MISC_INIT_R)
832 /* miscellaneous platform dependent initialisations */
833 misc_init_r ();
834#endif
835
836#ifdef CONFIG_HERMES
837 if (bd->bi_ethspeed != 0xFFFF)
838 hermes_start_lxt980 ((int) bd->bi_ethspeed);
839#endif
840
841#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
842 defined(CONFIG_CCM) || \
3bac3513 843 defined(CONFIG_ELPT860) || \
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844 defined(CONFIG_EP8260) || \
845 defined(CONFIG_IP860) || \
846 defined(CONFIG_IVML24) || \
847 defined(CONFIG_IVMS8) || \
848 defined(CONFIG_LWMON) || \
849 defined(CONFIG_MPC8260ADS) || \
5d232d0e 850 defined(CONFIG_MPC8266ADS) || \
42d1f039 851 defined(CONFIG_MPC8560ADS) || \
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852 defined(CONFIG_PCU_E) || \
853 defined(CONFIG_RPXSUPER) || \
854 defined(CONFIG_SPD823TS) )
855
856 WATCHDOG_RESET ();
9d2b18a0 857 debug ("Reset Ethernet PHY\n");
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858 reset_phy ();
859#endif
860
861#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
862 WATCHDOG_RESET ();
863 puts ("KGDB: ");
864 kgdb_init ();
865#endif
866
9d2b18a0 867 debug ("U-Boot relocated to %08lx\n", dest_addr);
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868
869 /*
870 * Enable Interrupts
871 */
872 interrupt_init ();
873
874 /* Must happen after interrupts are initialized since
875 * an irq handler gets installed
876 */
877#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
878 serial_buffered_init();
879#endif
880
881#ifdef CONFIG_STATUS_LED
882 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
883#endif
884
885 udelay (20);
886
887 set_timer (0);
888
889 /* Insert function pointers now that we have relocated the code */
890
891 /* Initialize from environment */
892 if ((s = getenv ("loadaddr")) != NULL) {
893 load_addr = simple_strtoul (s, NULL, 16);
894 }
895#if (CONFIG_COMMANDS & CFG_CMD_NET)
896 if ((s = getenv ("bootfile")) != NULL) {
897 copy_filename (BootFile, s, sizeof (BootFile));
898 }
899#endif /* CFG_CMD_NET */
900
901 WATCHDOG_RESET ();
902
903#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
904 WATCHDOG_RESET ();
905 puts ("SCSI: ");
906 scsi_init ();
907#endif
908
909#if (CONFIG_COMMANDS & CFG_CMD_DOC)
910 WATCHDOG_RESET ();
911 puts ("DOC: ");
912 doc_init ();
913#endif
914
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915#if (CONFIG_COMMANDS & CFG_CMD_NAND)
916 WATCHDOG_RESET ();
a43278a4 917 puts ("NAND:");
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918 nand_init(); /* go init the NAND */
919#endif
920
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921#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
922 WATCHDOG_RESET ();
923 puts ("Net: ");
924 eth_initialize (bd);
925#endif
926
927#ifdef CONFIG_POST
6dff5529 928 post_run (NULL, POST_RAM | post_bootmode_get(0));
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929#endif
930
931#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
932 WATCHDOG_RESET ();
933 puts ("PCMCIA:");
934 pcmcia_init ();
935#endif
936
937#if (CONFIG_COMMANDS & CFG_CMD_IDE)
938 WATCHDOG_RESET ();
939# ifdef CONFIG_IDE_8xx_PCCARD
940 puts ("PCMCIA:");
941# else
942 puts ("IDE: ");
943#endif
944 ide_init ();
945#endif /* CFG_CMD_IDE */
946
947#ifdef CONFIG_LAST_STAGE_INIT
948 WATCHDOG_RESET ();
949 /*
950 * Some parts can be only initialized if all others (like
951 * Interrupts) are up and running (i.e. the PC-style ISA
952 * keyboard).
953 */
954 last_stage_init ();
955#endif
956
957#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
958 WATCHDOG_RESET ();
959 bedbug_init ();
960#endif
961
228f29ac 962#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
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963 /*
964 * Export available size of memory for Linux,
965 * taking into account the protected RAM at top of memory
966 */
967 {
968 ulong pram;
fe8c2806 969 uchar memsz[32];
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970#ifdef CONFIG_PRAM
971 char *s;
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972
973 if ((s = getenv ("pram")) != NULL) {
974 pram = simple_strtoul (s, NULL, 10);
975 } else {
976 pram = CONFIG_PRAM;
977 }
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978#else
979 pram=0;
980#endif
981#ifdef CONFIG_LOGBUFFER
982 /* Also take the logbuffer into account (pram is in kB) */
983 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
984#endif
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985 sprintf (memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
986 setenv ("mem", memsz);
987 }
988#endif
989
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990#ifdef CONFIG_PS2KBD
991 puts ("PS/2: ");
992 kbd_init();
993#endif
994
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995#ifdef CONFIG_MODEM_SUPPORT
996 {
997 extern int do_mdm_init;
998 do_mdm_init = gd->do_mdm_init;
999 }
1000#endif
1001
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1002 /* Initialization complete - start the monitor */
1003
1004 /* main_loop() can return to retry autoboot, if so just run it again. */
1005 for (;;) {
1006 WATCHDOG_RESET ();
1007 main_loop ();
1008 }
1009
1010 /* NOTREACHED - no way out of command loop except booting */
1011}
1012
1013void hang (void)
1014{
1015 puts ("### ERROR ### Please RESET the board ###\n");
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1016#ifdef CONFIG_SHOW_BOOT_PROGRESS
1017 show_boot_progress(-30);
1018#endif
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1019 for (;;);
1020}
1021
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1022#ifdef CONFIG_MODEM_SUPPORT
1023/* called from main loop (common/main.c) */
1024extern void dbg(const char *fmt, ...);
1025int mdm_init (void)
1026{
1027 char env_str[16];
1028 char *init_str;
1029 int i;
1030 extern char console_buffer[];
1031 static inline void mdm_readline(char *buf, int bufsiz);
1032 extern void enable_putc(void);
1033 extern int hwflow_onoff(int);
1034
1035 enable_putc(); /* enable serial_putc() */
1036
1037#ifdef CONFIG_HWFLOW
1038 init_str = getenv("mdm_flow_control");
1039 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1040 hwflow_onoff (1);
1041 else
1042 hwflow_onoff(-1);
1043#endif
1044
1045 for (i = 1;;i++) {
1046 sprintf(env_str, "mdm_init%d", i);
1047 if ((init_str = getenv(env_str)) != NULL) {
1048 serial_puts(init_str);
1049 serial_puts("\n");
1050 for(;;) {
1051 mdm_readline(console_buffer, CFG_CBSIZE);
1052 dbg("ini%d: [%s]", i, console_buffer);
1053
1054 if ((strcmp(console_buffer, "OK") == 0) ||
1055 (strcmp(console_buffer, "ERROR") == 0)) {
1056 dbg("ini%d: cmd done", i);
1057 break;
1058 } else /* in case we are originating call ... */
1059 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1060 dbg("ini%d: connect", i);
1061 return 0;
1062 }
1063 }
1064 } else
1065 break; /* no init string - stop modem init */
1066
1067 udelay(100000);
1068 }
1069
1070 udelay(100000);
1071
1072 /* final stage - wait for connect */
1073 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1074 message from modem */
1075 mdm_readline(console_buffer, CFG_CBSIZE);
1076 dbg("ini_f: [%s]", console_buffer);
1077 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1078 dbg("ini_f: connected");
1079 return 0;
1080 }
1081 }
1082
1083 return 0;
1084}
1085
1086/* 'inline' - We have to do it fast */
1087static inline void mdm_readline(char *buf, int bufsiz)
1088{
1089 char c;
1090 char *p;
1091 int n;
1092
1093 n = 0;
1094 p = buf;
1095 for(;;) {
1096 c = serial_getc();
1097
1098 /* dbg("(%c)", c); */
1099
1100 switch(c) {
1101 case '\r':
1102 break;
1103 case '\n':
1104 *p = '\0';
1105 return;
1106
1107 default:
1108 if(n++ > bufsiz) {
1109 *p = '\0';
1110 return; /* sanity check */
1111 }
1112 *p = c;
1113 p++;
1114 break;
1115 }
1116 }
1117}
1118#endif
1119
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1120#if 0 /* We could use plain global data, but the resulting code is bigger */
1121/*
1122 * Pointer to initial global data area
1123 *
1124 * Here we initialize it.
1125 */
1126#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1127#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1128DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1129#endif /* 0 */
1130
1131/************************************************************************/