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fe8c2806 | 1 | /* |
d4ca31c4 | 2 | * (C) Copyright 2000-2004 |
fe8c2806 WD |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <watchdog.h> | |
26 | #include <command.h> | |
27 | #include <malloc.h> | |
28 | #include <devices.h> | |
fe8c2806 WD |
29 | #ifdef CONFIG_8xx |
30 | #include <mpc8xx.h> | |
31 | #endif | |
0db5bca8 WD |
32 | #ifdef CONFIG_5xx |
33 | #include <mpc5xx.h> | |
34 | #endif | |
cbd8a35c | 35 | #ifdef CONFIG_MPC5xxx |
945af8d7 WD |
36 | #include <mpc5xxx.h> |
37 | #endif | |
fe8c2806 WD |
38 | #if (CONFIG_COMMANDS & CFG_CMD_IDE) |
39 | #include <ide.h> | |
40 | #endif | |
41 | #if (CONFIG_COMMANDS & CFG_CMD_SCSI) | |
42 | #include <scsi.h> | |
43 | #endif | |
44 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
45 | #include <kgdb.h> | |
46 | #endif | |
47 | #ifdef CONFIG_STATUS_LED | |
48 | #include <status_led.h> | |
49 | #endif | |
50 | #include <net.h> | |
fe8c2806 | 51 | #ifdef CFG_ALLOC_DPRAM |
42d1f039 | 52 | #if !(defined(CONFIG_8260)||defined(CONFIG_MPC8560)) |
fe8c2806 WD |
53 | #include <commproc.h> |
54 | #endif | |
7aa78614 | 55 | #endif |
fe8c2806 WD |
56 | #include <version.h> |
57 | #if defined(CONFIG_BAB7xx) | |
58 | #include <w83c553f.h> | |
59 | #endif | |
60 | #include <dtt.h> | |
61 | #if defined(CONFIG_POST) | |
62 | #include <post.h> | |
63 | #endif | |
56f94be3 WD |
64 | #if defined(CONFIG_LOGBUFFER) |
65 | #include <logbuff.h> | |
66 | #endif | |
42d1f039 WD |
67 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
68 | #include <asm/cache.h> | |
69 | #endif | |
1c43771b WD |
70 | #ifdef CONFIG_PS2KBD |
71 | #include <keyboard.h> | |
72 | #endif | |
fe8c2806 WD |
73 | |
74 | #if (CONFIG_COMMANDS & CFG_CMD_DOC) | |
75 | void doc_init (void); | |
76 | #endif | |
77 | #if defined(CONFIG_HARD_I2C) || \ | |
78 | defined(CONFIG_SOFT_I2C) | |
79 | #include <i2c.h> | |
80 | #endif | |
bedc4970 SR |
81 | #if (CONFIG_COMMANDS & CFG_CMD_NAND) |
82 | void nand_init (void); | |
83 | #endif | |
fe8c2806 WD |
84 | |
85 | static char *failed = "*** failed ***\n"; | |
86 | ||
17d704eb | 87 | #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU) |
fe8c2806 | 88 | extern flash_info_t flash_info[]; |
17d704eb | 89 | #endif |
fe8c2806 WD |
90 | |
91 | #include <environment.h> | |
92 | ||
7e780369 WD |
93 | #if defined(CFG_ENV_IS_EMBEDDED) |
94 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
95 | #elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \ | |
04a85b3b | 96 | (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \ |
7e780369 | 97 | defined(CFG_ENV_IS_IN_NVRAM) |
fe8c2806 WD |
98 | #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE) |
99 | #else | |
100 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
101 | #endif | |
102 | ||
3b57fe0a WD |
103 | extern ulong __init_end; |
104 | extern ulong _end; | |
3b57fe0a WD |
105 | ulong monitor_flash_len; |
106 | ||
8bde7f77 WD |
107 | #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) |
108 | #include <bedbug/type.h> | |
109 | #endif | |
110 | ||
fe8c2806 WD |
111 | /* |
112 | * Begin and End of memory area for malloc(), and current "brk" | |
113 | */ | |
114 | static ulong mem_malloc_start = 0; | |
115 | static ulong mem_malloc_end = 0; | |
116 | static ulong mem_malloc_brk = 0; | |
117 | ||
118 | /************************************************************************ | |
119 | * Utilities * | |
120 | ************************************************************************ | |
121 | */ | |
122 | ||
123 | /* | |
124 | * The Malloc area is immediately below the monitor copy in DRAM | |
125 | */ | |
126 | static void mem_malloc_init (void) | |
127 | { | |
128 | DECLARE_GLOBAL_DATA_PTR; | |
129 | ||
130 | ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off; | |
131 | ||
132 | mem_malloc_end = dest_addr; | |
133 | mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN; | |
134 | mem_malloc_brk = mem_malloc_start; | |
135 | ||
136 | memset ((void *) mem_malloc_start, | |
137 | 0, | |
138 | mem_malloc_end - mem_malloc_start); | |
139 | } | |
140 | ||
141 | void *sbrk (ptrdiff_t increment) | |
142 | { | |
143 | ulong old = mem_malloc_brk; | |
144 | ulong new = old + increment; | |
145 | ||
146 | if ((new < mem_malloc_start) || (new > mem_malloc_end)) { | |
147 | return (NULL); | |
148 | } | |
149 | mem_malloc_brk = new; | |
150 | return ((void *) old); | |
151 | } | |
152 | ||
153 | char *strmhz (char *buf, long hz) | |
154 | { | |
155 | long l, n; | |
156 | long m; | |
157 | ||
158 | n = hz / 1000000L; | |
159 | l = sprintf (buf, "%ld", n); | |
160 | m = (hz % 1000000L) / 1000L; | |
161 | if (m != 0) | |
162 | sprintf (buf + l, ".%03ld", m); | |
163 | return (buf); | |
164 | } | |
165 | ||
fe8c2806 WD |
166 | /* |
167 | * All attempts to come up with a "common" initialization sequence | |
168 | * that works for all boards and architectures failed: some of the | |
169 | * requirements are just _too_ different. To get rid of the resulting | |
170 | * mess of board dependend #ifdef'ed code we now make the whole | |
171 | * initialization sequence configurable to the user. | |
172 | * | |
173 | * The requirements for any new initalization function is simple: it | |
174 | * receives a pointer to the "global data" structure as it's only | |
175 | * argument, and returns an integer return code, where 0 means | |
176 | * "continue" and != 0 means "fatal error, hang the system". | |
177 | */ | |
178 | typedef int (init_fnc_t) (void); | |
179 | ||
180 | /************************************************************************ | |
181 | * Init Utilities * | |
182 | ************************************************************************ | |
183 | * Some of this code should be moved into the core functions, | |
184 | * but let's get it working (again) first... | |
185 | */ | |
186 | ||
187 | static int init_baudrate (void) | |
188 | { | |
189 | DECLARE_GLOBAL_DATA_PTR; | |
190 | ||
191 | uchar tmp[64]; /* long enough for environment variables */ | |
192 | int i = getenv_r ("baudrate", tmp, sizeof (tmp)); | |
193 | ||
194 | gd->baudrate = (i > 0) | |
195 | ? (int) simple_strtoul (tmp, NULL, 10) | |
196 | : CONFIG_BAUDRATE; | |
fe8c2806 WD |
197 | return (0); |
198 | } | |
199 | ||
200 | /***********************************************************************/ | |
201 | ||
202 | static int init_func_ram (void) | |
203 | { | |
204 | DECLARE_GLOBAL_DATA_PTR; | |
205 | ||
206 | #ifdef CONFIG_BOARD_TYPES | |
207 | int board_type = gd->board_type; | |
208 | #else | |
209 | int board_type = 0; /* use dummy arg */ | |
210 | #endif | |
211 | puts ("DRAM: "); | |
212 | ||
213 | if ((gd->ram_size = initdram (board_type)) > 0) { | |
214 | print_size (gd->ram_size, "\n"); | |
215 | return (0); | |
216 | } | |
217 | puts (failed); | |
218 | return (1); | |
219 | } | |
220 | ||
221 | /***********************************************************************/ | |
222 | ||
223 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
224 | static int init_func_i2c (void) | |
225 | { | |
226 | puts ("I2C: "); | |
227 | i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); | |
228 | puts ("ready\n"); | |
229 | return (0); | |
230 | } | |
231 | #endif | |
232 | ||
233 | /***********************************************************************/ | |
234 | ||
235 | #if defined(CONFIG_WATCHDOG) | |
236 | static int init_func_watchdog_init (void) | |
237 | { | |
238 | puts (" Watchdog enabled\n"); | |
239 | WATCHDOG_RESET (); | |
240 | return (0); | |
241 | } | |
242 | # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, | |
243 | ||
244 | static int init_func_watchdog_reset (void) | |
245 | { | |
246 | WATCHDOG_RESET (); | |
247 | return (0); | |
248 | } | |
249 | # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, | |
250 | #else | |
251 | # define INIT_FUNC_WATCHDOG_INIT /* undef */ | |
252 | # define INIT_FUNC_WATCHDOG_RESET /* undef */ | |
253 | #endif /* CONFIG_WATCHDOG */ | |
254 | ||
255 | /************************************************************************ | |
256 | * Initialization sequence * | |
257 | ************************************************************************ | |
258 | */ | |
259 | ||
260 | init_fnc_t *init_sequence[] = { | |
261 | ||
c837dcb1 WD |
262 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
263 | board_early_init_f, | |
fe8c2806 | 264 | #endif |
c178d3da WD |
265 | |
266 | #if !defined(CONFIG_TQM866M) | |
fe8c2806 | 267 | get_clocks, /* get CPU and bus clocks (etc.) */ |
e9132ea9 WD |
268 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) |
269 | adjust_sdram_tbs_8xx, | |
270 | #endif | |
fe8c2806 | 271 | init_timebase, |
c178d3da | 272 | #endif |
fe8c2806 | 273 | #ifdef CFG_ALLOC_DPRAM |
42d1f039 | 274 | #if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560)) |
fe8c2806 WD |
275 | dpram_init, |
276 | #endif | |
7aa78614 | 277 | #endif |
fe8c2806 WD |
278 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
279 | board_postclk_init, | |
280 | #endif | |
281 | env_init, | |
c178d3da WD |
282 | #if defined(CONFIG_TQM866M) |
283 | get_clocks_866, /* get CPU and bus clocks according to the environment variable */ | |
284 | sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ | |
285 | init_timebase, | |
286 | #endif | |
fe8c2806 WD |
287 | init_baudrate, |
288 | serial_init, | |
289 | console_init_f, | |
290 | display_options, | |
291 | #if defined(CONFIG_8260) | |
292 | prt_8260_rsr, | |
293 | prt_8260_clks, | |
294 | #endif /* CONFIG_8260 */ | |
295 | checkcpu, | |
cbd8a35c | 296 | #if defined(CONFIG_MPC5xxx) |
945af8d7 | 297 | prt_mpc5xxx_clks, |
cbd8a35c | 298 | #endif /* CONFIG_MPC5xxx */ |
fe8c2806 WD |
299 | checkboard, |
300 | INIT_FUNC_WATCHDOG_INIT | |
c837dcb1 | 301 | #if defined(CONFIG_MISC_INIT_F) |
fe8c2806 WD |
302 | misc_init_f, |
303 | #endif | |
304 | INIT_FUNC_WATCHDOG_RESET | |
305 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
306 | init_func_i2c, | |
307 | #endif | |
308 | #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ | |
309 | dtt_init, | |
4532cb69 WD |
310 | #endif |
311 | #ifdef CONFIG_POST | |
312 | post_init_f, | |
fe8c2806 WD |
313 | #endif |
314 | INIT_FUNC_WATCHDOG_RESET | |
315 | init_func_ram, | |
316 | #if defined(CFG_DRAM_TEST) | |
317 | testdram, | |
318 | #endif /* CFG_DRAM_TEST */ | |
319 | INIT_FUNC_WATCHDOG_RESET | |
320 | ||
321 | NULL, /* Terminate this list */ | |
322 | }; | |
323 | ||
324 | /************************************************************************ | |
325 | * | |
326 | * This is the first part of the initialization sequence that is | |
327 | * implemented in C, but still running from ROM. | |
328 | * | |
329 | * The main purpose is to provide a (serial) console interface as | |
330 | * soon as possible (so we can see any error messages), and to | |
331 | * initialize the RAM so that we can relocate the monitor code to | |
332 | * RAM. | |
333 | * | |
334 | * Be aware of the restrictions: global data is read-only, BSS is not | |
335 | * initialized, and stack space is limited to a few kB. | |
336 | * | |
337 | ************************************************************************ | |
338 | */ | |
339 | ||
340 | void board_init_f (ulong bootflag) | |
341 | { | |
342 | DECLARE_GLOBAL_DATA_PTR; | |
343 | ||
344 | bd_t *bd; | |
345 | ulong len, addr, addr_sp; | |
346 | gd_t *id; | |
347 | init_fnc_t **init_fnc_ptr; | |
348 | #ifdef CONFIG_PRAM | |
349 | int i; | |
350 | ulong reg; | |
351 | uchar tmp[64]; /* long enough for environment variables */ | |
352 | #endif | |
353 | ||
354 | /* Pointer is writable since we allocated a register for it */ | |
355 | gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
93f6a677 WD |
356 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
357 | __asm__ __volatile__("": : :"memory"); | |
fe8c2806 | 358 | |
42d1f039 | 359 | #if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560)) |
fe8c2806 WD |
360 | /* Clear initial global data */ |
361 | memset ((void *) gd, 0, sizeof (gd_t)); | |
362 | #endif | |
363 | ||
364 | for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { | |
365 | if ((*init_fnc_ptr) () != 0) { | |
366 | hang (); | |
367 | } | |
368 | } | |
369 | ||
370 | /* | |
371 | * Now that we have DRAM mapped and working, we can | |
372 | * relocate the code and continue running from DRAM. | |
373 | * | |
374 | * Reserve memory at end of RAM for (top down in that order): | |
8bde7f77 | 375 | * - kernel log buffer |
fe8c2806 WD |
376 | * - protected RAM |
377 | * - LCD framebuffer | |
378 | * - monitor code | |
379 | * - board info struct | |
380 | */ | |
3b57fe0a | 381 | len = (ulong)&_end - CFG_MONITOR_BASE; |
fe8c2806 WD |
382 | |
383 | #ifndef CONFIG_VERY_BIG_RAM | |
384 | addr = CFG_SDRAM_BASE + gd->ram_size; | |
385 | #else | |
386 | /* only allow stack below 256M */ | |
387 | addr = CFG_SDRAM_BASE + | |
388 | (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size; | |
389 | #endif | |
390 | ||
228f29ac WD |
391 | #ifdef CONFIG_LOGBUFFER |
392 | /* reserve kernel log buffer */ | |
393 | addr -= (LOGBUFF_RESERVE); | |
9d2b18a0 | 394 | debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); |
228f29ac WD |
395 | #endif |
396 | ||
fe8c2806 WD |
397 | #ifdef CONFIG_PRAM |
398 | /* | |
399 | * reserve protected RAM | |
400 | */ | |
401 | i = getenv_r ("pram", tmp, sizeof (tmp)); | |
402 | reg = (i > 0) ? simple_strtoul (tmp, NULL, 10) : CONFIG_PRAM; | |
403 | addr -= (reg << 10); /* size is in kB */ | |
9d2b18a0 | 404 | debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr); |
fe8c2806 WD |
405 | #endif /* CONFIG_PRAM */ |
406 | ||
407 | /* round down to next 4 kB limit */ | |
408 | addr &= ~(4096 - 1); | |
9d2b18a0 | 409 | debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); |
fe8c2806 WD |
410 | |
411 | #ifdef CONFIG_LCD | |
412 | /* reserve memory for LCD display (always full pages) */ | |
413 | addr = lcd_setmem (addr); | |
414 | gd->fb_base = addr; | |
415 | #endif /* CONFIG_LCD */ | |
416 | ||
417 | #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) | |
418 | /* reserve memory for video display (always full pages) */ | |
419 | addr = video_setmem (addr); | |
420 | gd->fb_base = addr; | |
421 | #endif /* CONFIG_VIDEO */ | |
422 | ||
423 | /* | |
424 | * reserve memory for U-Boot code, data & bss | |
682011ff | 425 | * round down to next 4 kB limit |
fe8c2806 WD |
426 | */ |
427 | addr -= len; | |
682011ff | 428 | addr &= ~(4096 - 1); |
fe8c2806 | 429 | |
9d2b18a0 | 430 | debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); |
fe8c2806 | 431 | |
c7de829c WD |
432 | #ifdef CONFIG_AMIGAONEG3SE |
433 | gd->relocaddr = addr; | |
434 | #endif | |
435 | ||
fe8c2806 WD |
436 | /* |
437 | * reserve memory for malloc() arena | |
438 | */ | |
439 | addr_sp = addr - TOTAL_MALLOC_LEN; | |
9d2b18a0 | 440 | debug ("Reserving %dk for malloc() at: %08lx\n", |
fe8c2806 | 441 | TOTAL_MALLOC_LEN >> 10, addr_sp); |
fe8c2806 WD |
442 | |
443 | /* | |
444 | * (permanently) allocate a Board Info struct | |
445 | * and a permanent copy of the "global" data | |
446 | */ | |
447 | addr_sp -= sizeof (bd_t); | |
448 | bd = (bd_t *) addr_sp; | |
449 | gd->bd = bd; | |
9d2b18a0 | 450 | debug ("Reserving %d Bytes for Board Info at: %08lx\n", |
fe8c2806 | 451 | sizeof (bd_t), addr_sp); |
fe8c2806 WD |
452 | addr_sp -= sizeof (gd_t); |
453 | id = (gd_t *) addr_sp; | |
9d2b18a0 | 454 | debug ("Reserving %d Bytes for Global Data at: %08lx\n", |
fe8c2806 | 455 | sizeof (gd_t), addr_sp); |
fe8c2806 WD |
456 | |
457 | /* | |
458 | * Finally, we set up a new (bigger) stack. | |
459 | * | |
460 | * Leave some safety gap for SP, force alignment on 16 byte boundary | |
461 | * Clear initial stack frame | |
462 | */ | |
463 | addr_sp -= 16; | |
464 | addr_sp &= ~0xF; | |
465 | *((ulong *) addr_sp)-- = 0; | |
466 | *((ulong *) addr_sp)-- = 0; | |
9d2b18a0 | 467 | debug ("Stack Pointer at: %08lx\n", addr_sp); |
fe8c2806 WD |
468 | |
469 | /* | |
470 | * Save local variables to board info struct | |
471 | */ | |
472 | ||
c837dcb1 | 473 | bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */ |
fe8c2806 WD |
474 | bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */ |
475 | ||
476 | #ifdef CONFIG_IP860 | |
c837dcb1 WD |
477 | bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */ |
478 | bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */ | |
fe8c2806 | 479 | #else |
c837dcb1 WD |
480 | bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */ |
481 | bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */ | |
fe8c2806 WD |
482 | #endif |
483 | ||
42d1f039 WD |
484 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ |
485 | defined(CONFIG_E500) | |
fe8c2806 WD |
486 | bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */ |
487 | #endif | |
cbd8a35c | 488 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
489 | bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ |
490 | #endif | |
fe8c2806 WD |
491 | |
492 | bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ | |
493 | ||
494 | WATCHDOG_RESET (); | |
495 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ | |
496 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ | |
42d1f039 | 497 | #if defined(CONFIG_8260) || defined(CONFIG_MPC8560) |
fe8c2806 WD |
498 | bd->bi_cpmfreq = gd->cpm_clk; |
499 | bd->bi_brgfreq = gd->brg_clk; | |
500 | bd->bi_sccfreq = gd->scc_clk; | |
501 | bd->bi_vco = gd->vco_out; | |
502 | #endif /* CONFIG_8260 */ | |
cbd8a35c | 503 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
504 | bd->bi_ipbfreq = gd->ipb_clk; |
505 | bd->bi_pcifreq = gd->pci_clk; | |
cbd8a35c | 506 | #endif /* CONFIG_MPC5xxx */ |
fe8c2806 WD |
507 | bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ |
508 | ||
509 | #ifdef CFG_EXTBDINFO | |
510 | strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); | |
511 | strncpy (bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); | |
512 | ||
513 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ | |
514 | bd->bi_plb_busfreq = gd->bus_clk; | |
bedc4970 | 515 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) |
fe8c2806 | 516 | bd->bi_pci_busfreq = get_PCI_freq (); |
109c0e3a | 517 | bd->bi_opbfreq = get_OPB_freq (); |
028ab6b5 WD |
518 | #elif defined(CONFIG_XILINX_ML300) |
519 | bd->bi_pci_busfreq = get_PCI_freq (); | |
fe8c2806 WD |
520 | #endif |
521 | #endif | |
522 | ||
9d2b18a0 | 523 | debug ("New Stack Pointer is: %08lx\n", addr_sp); |
fe8c2806 WD |
524 | |
525 | WATCHDOG_RESET (); | |
526 | ||
527 | #ifdef CONFIG_POST | |
528 | post_bootmode_init(); | |
6dff5529 | 529 | post_run (NULL, POST_ROM | post_bootmode_get(0)); |
fe8c2806 WD |
530 | #endif |
531 | ||
532 | WATCHDOG_RESET(); | |
533 | ||
27b207fd | 534 | memcpy (id, (void *)gd, sizeof (gd_t)); |
fe8c2806 WD |
535 | |
536 | relocate_code (addr_sp, id, addr); | |
537 | ||
538 | /* NOTREACHED - relocate_code() does not return */ | |
539 | } | |
540 | ||
541 | ||
542 | /************************************************************************ | |
543 | * | |
544 | * This is the next part if the initialization sequence: we are now | |
545 | * running from RAM and have a "normal" C environment, i. e. global | |
546 | * data can be written, BSS has been cleared, the stack size in not | |
547 | * that critical any more, etc. | |
548 | * | |
549 | ************************************************************************ | |
550 | */ | |
551 | ||
552 | void board_init_r (gd_t *id, ulong dest_addr) | |
553 | { | |
554 | DECLARE_GLOBAL_DATA_PTR; | |
fe8c2806 WD |
555 | cmd_tbl_t *cmdtp; |
556 | char *s, *e; | |
557 | bd_t *bd; | |
558 | int i; | |
559 | extern void malloc_bin_reloc (void); | |
560 | #ifndef CFG_ENV_IS_NOWHERE | |
561 | extern char * env_name_spec; | |
562 | #endif | |
563 | ||
564 | #ifndef CFG_NO_FLASH | |
565 | ulong flash_size; | |
566 | #endif | |
567 | ||
568 | gd = id; /* initialize RAM version of global data */ | |
569 | bd = gd->bd; | |
570 | ||
571 | gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ | |
572 | ||
9d2b18a0 | 573 | debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr); |
fe8c2806 WD |
574 | |
575 | WATCHDOG_RESET (); | |
576 | ||
c837dcb1 WD |
577 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
578 | board_early_init_r (); | |
579 | #endif | |
580 | ||
fe8c2806 | 581 | gd->reloc_off = dest_addr - CFG_MONITOR_BASE; |
8bde7f77 | 582 | |
3b57fe0a | 583 | monitor_flash_len = (ulong)&__init_end - dest_addr; |
fe8c2806 WD |
584 | |
585 | /* | |
586 | * We have to relocate the command table manually | |
587 | */ | |
8bde7f77 | 588 | for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { |
fe8c2806 | 589 | ulong addr; |
fe8c2806 WD |
590 | addr = (ulong) (cmdtp->cmd) + gd->reloc_off; |
591 | #if 0 | |
592 | printf ("Command \"%s\": 0x%08lx => 0x%08lx\n", | |
593 | cmdtp->name, (ulong) (cmdtp->cmd), addr); | |
594 | #endif | |
595 | cmdtp->cmd = | |
596 | (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr; | |
597 | ||
598 | addr = (ulong)(cmdtp->name) + gd->reloc_off; | |
599 | cmdtp->name = (char *)addr; | |
600 | ||
601 | if (cmdtp->usage) { | |
602 | addr = (ulong)(cmdtp->usage) + gd->reloc_off; | |
603 | cmdtp->usage = (char *)addr; | |
604 | } | |
605 | #ifdef CFG_LONGHELP | |
606 | if (cmdtp->help) { | |
607 | addr = (ulong)(cmdtp->help) + gd->reloc_off; | |
608 | cmdtp->help = (char *)addr; | |
609 | } | |
610 | #endif | |
611 | } | |
612 | /* there are some other pointer constants we must deal with */ | |
613 | #ifndef CFG_ENV_IS_NOWHERE | |
614 | env_name_spec += gd->reloc_off; | |
615 | #endif | |
616 | ||
617 | WATCHDOG_RESET (); | |
618 | ||
56f94be3 | 619 | #ifdef CONFIG_LOGBUFFER |
228f29ac | 620 | logbuff_init_ptrs (); |
56f94be3 | 621 | #endif |
fe8c2806 | 622 | #ifdef CONFIG_POST |
228f29ac | 623 | post_output_backlog (); |
fe8c2806 WD |
624 | post_reloc (); |
625 | #endif | |
626 | ||
627 | WATCHDOG_RESET(); | |
628 | ||
629 | #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM) | |
630 | icache_enable (); /* it's time to enable the instruction cache */ | |
631 | #endif | |
632 | ||
42d1f039 | 633 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
c837dcb1 | 634 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ |
42d1f039 WD |
635 | #endif |
636 | ||
3bac3513 | 637 | #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45) |
fe8c2806 | 638 | /* |
3bac3513 WD |
639 | * Do PCI configuration on BAB7xx and CPC45 _before_ the flash |
640 | * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus | |
641 | * bridge there. | |
fe8c2806 WD |
642 | */ |
643 | pci_init (); | |
3bac3513 WD |
644 | #endif |
645 | #if defined(CONFIG_BAB7xx) | |
fe8c2806 WD |
646 | /* |
647 | * Initialise the ISA bridge | |
648 | */ | |
649 | initialise_w83c553f (); | |
650 | #endif | |
651 | ||
652 | asm ("sync ; isync"); | |
653 | ||
654 | /* | |
655 | * Setup trap handlers | |
656 | */ | |
657 | trap_init (dest_addr); | |
658 | ||
659 | #if !defined(CFG_NO_FLASH) | |
660 | puts ("FLASH: "); | |
661 | ||
662 | if ((flash_size = flash_init ()) > 0) { | |
0cb61d7d | 663 | # ifdef CFG_FLASH_CHECKSUM |
fe8c2806 WD |
664 | print_size (flash_size, ""); |
665 | /* | |
666 | * Compute and print flash CRC if flashchecksum is set to 'y' | |
667 | * | |
668 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
669 | */ | |
670 | s = getenv ("flashchecksum"); | |
671 | if (s && (*s == 'y')) { | |
672 | printf (" CRC: %08lX", | |
7e780369 WD |
673 | crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size) |
674 | ); | |
fe8c2806 WD |
675 | } |
676 | putc ('\n'); | |
0cb61d7d | 677 | # else /* !CFG_FLASH_CHECKSUM */ |
fe8c2806 | 678 | print_size (flash_size, "\n"); |
0cb61d7d | 679 | # endif /* CFG_FLASH_CHECKSUM */ |
fe8c2806 WD |
680 | } else { |
681 | puts (failed); | |
682 | hang (); | |
683 | } | |
684 | ||
685 | bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */ | |
686 | bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */ | |
7e780369 WD |
687 | # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU) |
688 | /* flash mapped at end of memory map */ | |
689 | bd->bi_flashoffset = TEXT_BASE + flash_size; | |
0cb61d7d | 690 | # elif CFG_MONITOR_BASE == CFG_FLASH_BASE |
3b57fe0a | 691 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ |
0cb61d7d | 692 | # else |
fe8c2806 | 693 | bd->bi_flashoffset = 0; |
0cb61d7d WD |
694 | # endif |
695 | #else /* CFG_NO_FLASH */ | |
fe8c2806 WD |
696 | |
697 | bd->bi_flashsize = 0; | |
698 | bd->bi_flashstart = 0; | |
699 | bd->bi_flashoffset = 0; | |
700 | #endif /* !CFG_NO_FLASH */ | |
701 | ||
702 | WATCHDOG_RESET (); | |
703 | ||
704 | /* initialize higher level parts of CPU like time base and timers */ | |
705 | cpu_init_r (); | |
706 | ||
707 | WATCHDOG_RESET (); | |
708 | ||
709 | /* initialize malloc() area */ | |
710 | mem_malloc_init (); | |
711 | malloc_bin_reloc (); | |
712 | ||
713 | #ifdef CONFIG_SPI | |
714 | # if !defined(CFG_ENV_IS_IN_EEPROM) | |
715 | spi_init_f (); | |
716 | # endif | |
717 | spi_init_r (); | |
718 | #endif | |
719 | ||
720 | /* relocate environment function pointers etc. */ | |
721 | env_relocate (); | |
722 | ||
723 | /* | |
724 | * Fill in missing fields of bd_info. | |
8bde7f77 WD |
725 | * We do this here, where we have "normal" access to the |
726 | * environment; we used to do this still running from ROM, | |
727 | * where had to use getenv_r(), which can be pretty slow when | |
728 | * the environment is in EEPROM. | |
fe8c2806 | 729 | */ |
7abf0c58 WD |
730 | |
731 | #if defined(CFG_EXTBDINFO) | |
732 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) | |
733 | #if defined(CONFIG_I2CFAST) | |
734 | /* | |
735 | * set bi_iic_fast for linux taking environment variable | |
736 | * "i2cfast" into account | |
737 | */ | |
738 | { | |
739 | char *s = getenv ("i2cfast"); | |
740 | if (s && ((*s == 'y') || (*s == 'Y'))) { | |
741 | bd->bi_iic_fast[0] = 1; | |
742 | bd->bi_iic_fast[1] = 1; | |
743 | } else { | |
744 | bd->bi_iic_fast[0] = 0; | |
745 | bd->bi_iic_fast[1] = 0; | |
746 | } | |
747 | } | |
748 | #else | |
749 | bd->bi_iic_fast[0] = 0; | |
750 | bd->bi_iic_fast[1] = 0; | |
751 | #endif /* CONFIG_I2CFAST */ | |
752 | #endif /* CONFIG_405GP, CONFIG_405EP */ | |
753 | #endif /* CFG_EXTBDINFO */ | |
754 | ||
fe8c2806 WD |
755 | s = getenv ("ethaddr"); |
756 | #if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210) | |
757 | if (s == NULL) | |
758 | board_get_enetaddr (bd->bi_enetaddr); | |
759 | else | |
760 | #endif | |
761 | for (i = 0; i < 6; ++i) { | |
762 | bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
763 | if (s) | |
764 | s = (*e) ? e + 1 : e; | |
765 | } | |
766 | #ifdef CONFIG_HERMES | |
767 | if ((gd->board_type >> 16) == 2) | |
768 | bd->bi_ethspeed = gd->board_type & 0xFFFF; | |
769 | else | |
770 | bd->bi_ethspeed = 0xFFFF; | |
771 | #endif | |
772 | ||
773 | #ifdef CONFIG_NX823 | |
774 | load_sernum_ethaddr (); | |
775 | #endif | |
776 | ||
42d1f039 | 777 | #if defined(CFG_GT_6426x) || defined(CONFIG_PN62) || defined(CONFIG_PPCHAMELEONEVB) || \ |
ba56f625 | 778 | defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || defined(CONFIG_440_GX) |
fe8c2806 WD |
779 | /* handle the 2nd ethernet address */ |
780 | ||
781 | s = getenv ("eth1addr"); | |
782 | ||
783 | for (i = 0; i < 6; ++i) { | |
784 | bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
785 | if (s) | |
786 | s = (*e) ? e + 1 : e; | |
787 | } | |
788 | #endif | |
ba56f625 WD |
789 | #if defined(CFG_GT_6426x) || defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS) || \ |
790 | defined(CONFIG_440_GX) | |
fe8c2806 WD |
791 | /* handle the 3rd ethernet address */ |
792 | ||
793 | s = getenv ("eth2addr"); | |
ba56f625 WD |
794 | #if defined(CONFIG_XPEDITE1K) |
795 | if (s == NULL) | |
796 | board_get_enetaddr(bd->bi_enet2addr); | |
797 | else | |
798 | #endif | |
fe8c2806 WD |
799 | for (i = 0; i < 6; ++i) { |
800 | bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
801 | if (s) | |
802 | s = (*e) ? e + 1 : e; | |
803 | } | |
804 | #endif | |
805 | ||
ba56f625 WD |
806 | #if defined(CONFIG_440_GX) |
807 | /* handle 4th ethernet address */ | |
808 | s = getenv("eth3addr"); | |
809 | #if defined(CONFIG_XPEDITE1K) | |
810 | if (s == NULL) | |
811 | board_get_enetaddr(bd->bi_enet3addr); | |
812 | else | |
813 | #endif | |
814 | for (i = 0; i < 6; ++i) { | |
815 | bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
816 | if (s) | |
817 | s = (*e) ? e + 1 : e; | |
818 | } | |
819 | #endif | |
fe8c2806 WD |
820 | |
821 | #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \ | |
02b11f8e | 822 | defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X) |
fe8c2806 WD |
823 | load_sernum_ethaddr (); |
824 | #endif | |
825 | /* IP Address */ | |
826 | bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); | |
827 | ||
828 | WATCHDOG_RESET (); | |
829 | ||
979bdbc7 | 830 | #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45) |
fe8c2806 WD |
831 | /* |
832 | * Do pci configuration | |
833 | */ | |
834 | pci_init (); | |
835 | #endif | |
836 | ||
837 | /** leave this here (after malloc(), environment and PCI are working) **/ | |
838 | /* Initialize devices */ | |
839 | devices_init (); | |
840 | ||
27b207fd WD |
841 | /* Initialize the jump table for applications */ |
842 | jumptable_init (); | |
fe8c2806 WD |
843 | |
844 | /* Initialize the console (after the relocation and devices init) */ | |
845 | console_init_r (); | |
fe8c2806 WD |
846 | |
847 | #if defined(CONFIG_CCM) || \ | |
848 | defined(CONFIG_COGENT) || \ | |
849 | defined(CONFIG_CPCI405) || \ | |
850 | defined(CONFIG_EVB64260) || \ | |
56f94be3 | 851 | defined(CONFIG_KUP4K) || \ |
0608e04d | 852 | defined(CONFIG_KUP4X) || \ |
fe8c2806 WD |
853 | defined(CONFIG_LWMON) || \ |
854 | defined(CONFIG_PCU_E) || \ | |
855 | defined(CONFIG_W7O) || \ | |
856 | defined(CONFIG_MISC_INIT_R) | |
857 | /* miscellaneous platform dependent initialisations */ | |
858 | misc_init_r (); | |
859 | #endif | |
860 | ||
861 | #ifdef CONFIG_HERMES | |
862 | if (bd->bi_ethspeed != 0xFFFF) | |
863 | hermes_start_lxt980 ((int) bd->bi_ethspeed); | |
864 | #endif | |
865 | ||
866 | #if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \ | |
867 | defined(CONFIG_CCM) || \ | |
3bac3513 | 868 | defined(CONFIG_ELPT860) || \ |
fe8c2806 WD |
869 | defined(CONFIG_EP8260) || \ |
870 | defined(CONFIG_IP860) || \ | |
871 | defined(CONFIG_IVML24) || \ | |
872 | defined(CONFIG_IVMS8) || \ | |
873 | defined(CONFIG_LWMON) || \ | |
874 | defined(CONFIG_MPC8260ADS) || \ | |
5d232d0e | 875 | defined(CONFIG_MPC8266ADS) || \ |
42d1f039 | 876 | defined(CONFIG_MPC8560ADS) || \ |
fe8c2806 WD |
877 | defined(CONFIG_PCU_E) || \ |
878 | defined(CONFIG_RPXSUPER) || \ | |
7abf0c58 | 879 | defined(CONFIG_STXGP3) || \ |
fe8c2806 WD |
880 | defined(CONFIG_SPD823TS) ) |
881 | ||
882 | WATCHDOG_RESET (); | |
9d2b18a0 | 883 | debug ("Reset Ethernet PHY\n"); |
fe8c2806 WD |
884 | reset_phy (); |
885 | #endif | |
886 | ||
887 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
888 | WATCHDOG_RESET (); | |
889 | puts ("KGDB: "); | |
890 | kgdb_init (); | |
891 | #endif | |
892 | ||
9d2b18a0 | 893 | debug ("U-Boot relocated to %08lx\n", dest_addr); |
fe8c2806 WD |
894 | |
895 | /* | |
896 | * Enable Interrupts | |
897 | */ | |
898 | interrupt_init (); | |
899 | ||
900 | /* Must happen after interrupts are initialized since | |
901 | * an irq handler gets installed | |
902 | */ | |
42dfe7a1 | 903 | #ifdef CONFIG_SERIAL_SOFTWARE_FIFO |
fe8c2806 WD |
904 | serial_buffered_init(); |
905 | #endif | |
906 | ||
907 | #ifdef CONFIG_STATUS_LED | |
908 | status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); | |
909 | #endif | |
910 | ||
911 | udelay (20); | |
912 | ||
913 | set_timer (0); | |
914 | ||
fe8c2806 WD |
915 | /* Initialize from environment */ |
916 | if ((s = getenv ("loadaddr")) != NULL) { | |
917 | load_addr = simple_strtoul (s, NULL, 16); | |
918 | } | |
919 | #if (CONFIG_COMMANDS & CFG_CMD_NET) | |
920 | if ((s = getenv ("bootfile")) != NULL) { | |
921 | copy_filename (BootFile, s, sizeof (BootFile)); | |
922 | } | |
923 | #endif /* CFG_CMD_NET */ | |
924 | ||
925 | WATCHDOG_RESET (); | |
926 | ||
927 | #if (CONFIG_COMMANDS & CFG_CMD_SCSI) | |
928 | WATCHDOG_RESET (); | |
929 | puts ("SCSI: "); | |
930 | scsi_init (); | |
931 | #endif | |
932 | ||
933 | #if (CONFIG_COMMANDS & CFG_CMD_DOC) | |
934 | WATCHDOG_RESET (); | |
935 | puts ("DOC: "); | |
936 | doc_init (); | |
937 | #endif | |
938 | ||
bedc4970 SR |
939 | #if (CONFIG_COMMANDS & CFG_CMD_NAND) |
940 | WATCHDOG_RESET (); | |
a43278a4 | 941 | puts ("NAND:"); |
bedc4970 SR |
942 | nand_init(); /* go init the NAND */ |
943 | #endif | |
944 | ||
fe8c2806 WD |
945 | #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) |
946 | WATCHDOG_RESET (); | |
947 | puts ("Net: "); | |
948 | eth_initialize (bd); | |
949 | #endif | |
950 | ||
951 | #ifdef CONFIG_POST | |
6dff5529 | 952 | post_run (NULL, POST_RAM | post_bootmode_get(0)); |
fe8c2806 WD |
953 | #endif |
954 | ||
955 | #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE) | |
956 | WATCHDOG_RESET (); | |
957 | puts ("PCMCIA:"); | |
958 | pcmcia_init (); | |
959 | #endif | |
960 | ||
961 | #if (CONFIG_COMMANDS & CFG_CMD_IDE) | |
962 | WATCHDOG_RESET (); | |
963 | # ifdef CONFIG_IDE_8xx_PCCARD | |
964 | puts ("PCMCIA:"); | |
965 | # else | |
966 | puts ("IDE: "); | |
967 | #endif | |
968 | ide_init (); | |
969 | #endif /* CFG_CMD_IDE */ | |
970 | ||
971 | #ifdef CONFIG_LAST_STAGE_INIT | |
972 | WATCHDOG_RESET (); | |
973 | /* | |
974 | * Some parts can be only initialized if all others (like | |
975 | * Interrupts) are up and running (i.e. the PC-style ISA | |
976 | * keyboard). | |
977 | */ | |
978 | last_stage_init (); | |
979 | #endif | |
980 | ||
981 | #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) | |
982 | WATCHDOG_RESET (); | |
983 | bedbug_init (); | |
984 | #endif | |
985 | ||
228f29ac | 986 | #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER) |
fe8c2806 WD |
987 | /* |
988 | * Export available size of memory for Linux, | |
989 | * taking into account the protected RAM at top of memory | |
990 | */ | |
991 | { | |
992 | ulong pram; | |
fe8c2806 | 993 | uchar memsz[32]; |
228f29ac WD |
994 | #ifdef CONFIG_PRAM |
995 | char *s; | |
fe8c2806 WD |
996 | |
997 | if ((s = getenv ("pram")) != NULL) { | |
998 | pram = simple_strtoul (s, NULL, 10); | |
999 | } else { | |
1000 | pram = CONFIG_PRAM; | |
1001 | } | |
228f29ac WD |
1002 | #else |
1003 | pram=0; | |
1004 | #endif | |
1005 | #ifdef CONFIG_LOGBUFFER | |
1006 | /* Also take the logbuffer into account (pram is in kB) */ | |
1007 | pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024; | |
1008 | #endif | |
fe8c2806 WD |
1009 | sprintf (memsz, "%ldk", (bd->bi_memsize / 1024) - pram); |
1010 | setenv ("mem", memsz); | |
1011 | } | |
1012 | #endif | |
1013 | ||
1c43771b WD |
1014 | #ifdef CONFIG_PS2KBD |
1015 | puts ("PS/2: "); | |
1016 | kbd_init(); | |
1017 | #endif | |
1018 | ||
4532cb69 WD |
1019 | #ifdef CONFIG_MODEM_SUPPORT |
1020 | { | |
1021 | extern int do_mdm_init; | |
1022 | do_mdm_init = gd->do_mdm_init; | |
1023 | } | |
1024 | #endif | |
1025 | ||
fe8c2806 WD |
1026 | /* Initialization complete - start the monitor */ |
1027 | ||
1028 | /* main_loop() can return to retry autoboot, if so just run it again. */ | |
1029 | for (;;) { | |
1030 | WATCHDOG_RESET (); | |
1031 | main_loop (); | |
1032 | } | |
1033 | ||
1034 | /* NOTREACHED - no way out of command loop except booting */ | |
1035 | } | |
1036 | ||
1037 | void hang (void) | |
1038 | { | |
1039 | puts ("### ERROR ### Please RESET the board ###\n"); | |
63e73c9a WD |
1040 | #ifdef CONFIG_SHOW_BOOT_PROGRESS |
1041 | show_boot_progress(-30); | |
1042 | #endif | |
fe8c2806 WD |
1043 | for (;;); |
1044 | } | |
1045 | ||
4532cb69 WD |
1046 | #ifdef CONFIG_MODEM_SUPPORT |
1047 | /* called from main loop (common/main.c) */ | |
1048 | extern void dbg(const char *fmt, ...); | |
1049 | int mdm_init (void) | |
1050 | { | |
1051 | char env_str[16]; | |
1052 | char *init_str; | |
1053 | int i; | |
1054 | extern char console_buffer[]; | |
1055 | static inline void mdm_readline(char *buf, int bufsiz); | |
1056 | extern void enable_putc(void); | |
1057 | extern int hwflow_onoff(int); | |
1058 | ||
1059 | enable_putc(); /* enable serial_putc() */ | |
1060 | ||
1061 | #ifdef CONFIG_HWFLOW | |
1062 | init_str = getenv("mdm_flow_control"); | |
1063 | if (init_str && (strcmp(init_str, "rts/cts") == 0)) | |
1064 | hwflow_onoff (1); | |
1065 | else | |
1066 | hwflow_onoff(-1); | |
1067 | #endif | |
1068 | ||
1069 | for (i = 1;;i++) { | |
1070 | sprintf(env_str, "mdm_init%d", i); | |
1071 | if ((init_str = getenv(env_str)) != NULL) { | |
1072 | serial_puts(init_str); | |
1073 | serial_puts("\n"); | |
1074 | for(;;) { | |
1075 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1076 | dbg("ini%d: [%s]", i, console_buffer); | |
1077 | ||
1078 | if ((strcmp(console_buffer, "OK") == 0) || | |
1079 | (strcmp(console_buffer, "ERROR") == 0)) { | |
1080 | dbg("ini%d: cmd done", i); | |
1081 | break; | |
1082 | } else /* in case we are originating call ... */ | |
1083 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1084 | dbg("ini%d: connect", i); | |
1085 | return 0; | |
1086 | } | |
1087 | } | |
1088 | } else | |
1089 | break; /* no init string - stop modem init */ | |
1090 | ||
1091 | udelay(100000); | |
1092 | } | |
1093 | ||
1094 | udelay(100000); | |
1095 | ||
1096 | /* final stage - wait for connect */ | |
1097 | for(;i > 1;) { /* if 'i' > 1 - wait for connection | |
1098 | message from modem */ | |
1099 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1100 | dbg("ini_f: [%s]", console_buffer); | |
1101 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1102 | dbg("ini_f: connected"); | |
1103 | return 0; | |
1104 | } | |
1105 | } | |
1106 | ||
1107 | return 0; | |
1108 | } | |
1109 | ||
1110 | /* 'inline' - We have to do it fast */ | |
1111 | static inline void mdm_readline(char *buf, int bufsiz) | |
1112 | { | |
1113 | char c; | |
1114 | char *p; | |
1115 | int n; | |
1116 | ||
1117 | n = 0; | |
1118 | p = buf; | |
1119 | for(;;) { | |
1120 | c = serial_getc(); | |
1121 | ||
1122 | /* dbg("(%c)", c); */ | |
1123 | ||
1124 | switch(c) { | |
1125 | case '\r': | |
1126 | break; | |
1127 | case '\n': | |
1128 | *p = '\0'; | |
1129 | return; | |
1130 | ||
1131 | default: | |
1132 | if(n++ > bufsiz) { | |
1133 | *p = '\0'; | |
1134 | return; /* sanity check */ | |
1135 | } | |
1136 | *p = c; | |
1137 | p++; | |
1138 | break; | |
1139 | } | |
1140 | } | |
1141 | } | |
1142 | #endif | |
1143 | ||
fe8c2806 WD |
1144 | #if 0 /* We could use plain global data, but the resulting code is bigger */ |
1145 | /* | |
1146 | * Pointer to initial global data area | |
1147 | * | |
1148 | * Here we initialize it. | |
1149 | */ | |
1150 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR | |
1151 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ | |
1152 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
1153 | #endif /* 0 */ | |
1154 | ||
1155 | /************************************************************************/ |