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fe8c2806 1/*
d4ca31c4 2 * (C) Copyright 2000-2004
fe8c2806
WD
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
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29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
0db5bca8
WD
32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
cbd8a35c 35#ifdef CONFIG_MPC5xxx
945af8d7
WD
36#include <mpc5xxx.h>
37#endif
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38#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
281e00a3 51#include <serial.h>
fe8c2806 52#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 53#if !defined(CONFIG_CPM2)
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54#include <commproc.h>
55#endif
7aa78614 56#endif
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57#include <version.h>
58#if defined(CONFIG_BAB7xx)
59#include <w83c553f.h>
60#endif
61#include <dtt.h>
62#if defined(CONFIG_POST)
63#include <post.h>
64#endif
56f94be3
WD
65#if defined(CONFIG_LOGBUFFER)
66#include <logbuff.h>
67#endif
42d1f039
WD
68#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
69#include <asm/cache.h>
70#endif
1c43771b
WD
71#ifdef CONFIG_PS2KBD
72#include <keyboard.h>
73#endif
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74
75#if (CONFIG_COMMANDS & CFG_CMD_DOC)
76void doc_init (void);
77#endif
78#if defined(CONFIG_HARD_I2C) || \
79 defined(CONFIG_SOFT_I2C)
80#include <i2c.h>
81#endif
bedc4970
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82#if (CONFIG_COMMANDS & CFG_CMD_NAND)
83void nand_init (void);
84#endif
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85
86static char *failed = "*** failed ***\n";
87
17d704eb 88#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
fe8c2806 89extern flash_info_t flash_info[];
17d704eb 90#endif
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91
92#include <environment.h>
bce84c4d 93DECLARE_GLOBAL_DATA_PTR;
fe8c2806 94
7e780369
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95#if defined(CFG_ENV_IS_EMBEDDED)
96#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
97#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
04a85b3b 98 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
7e780369 99 defined(CFG_ENV_IS_IN_NVRAM)
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100#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
101#else
102#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
103#endif
104
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105extern ulong __init_end;
106extern ulong _end;
3b57fe0a
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107ulong monitor_flash_len;
108
8bde7f77
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109#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
110#include <bedbug/type.h>
111#endif
112
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113/*
114 * Begin and End of memory area for malloc(), and current "brk"
115 */
116static ulong mem_malloc_start = 0;
117static ulong mem_malloc_end = 0;
118static ulong mem_malloc_brk = 0;
119
120/************************************************************************
121 * Utilities *
122 ************************************************************************
123 */
124
125/*
126 * The Malloc area is immediately below the monitor copy in DRAM
127 */
128static void mem_malloc_init (void)
129{
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130 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
131
132 mem_malloc_end = dest_addr;
133 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
134 mem_malloc_brk = mem_malloc_start;
135
136 memset ((void *) mem_malloc_start,
137 0,
138 mem_malloc_end - mem_malloc_start);
139}
140
141void *sbrk (ptrdiff_t increment)
142{
143 ulong old = mem_malloc_brk;
144 ulong new = old + increment;
145
146 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
147 return (NULL);
148 }
149 mem_malloc_brk = new;
150 return ((void *) old);
151}
152
153char *strmhz (char *buf, long hz)
154{
155 long l, n;
156 long m;
157
158 n = hz / 1000000L;
159 l = sprintf (buf, "%ld", n);
160 m = (hz % 1000000L) / 1000L;
161 if (m != 0)
162 sprintf (buf + l, ".%03ld", m);
163 return (buf);
164}
165
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166/*
167 * All attempts to come up with a "common" initialization sequence
168 * that works for all boards and architectures failed: some of the
169 * requirements are just _too_ different. To get rid of the resulting
170 * mess of board dependend #ifdef'ed code we now make the whole
171 * initialization sequence configurable to the user.
172 *
173 * The requirements for any new initalization function is simple: it
174 * receives a pointer to the "global data" structure as it's only
175 * argument, and returns an integer return code, where 0 means
176 * "continue" and != 0 means "fatal error, hang the system".
177 */
178typedef int (init_fnc_t) (void);
179
180/************************************************************************
181 * Init Utilities *
182 ************************************************************************
183 * Some of this code should be moved into the core functions,
184 * but let's get it working (again) first...
185 */
186
187static int init_baudrate (void)
188{
77ddac94 189 char tmp[64]; /* long enough for environment variables */
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190 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
191
192 gd->baudrate = (i > 0)
193 ? (int) simple_strtoul (tmp, NULL, 10)
194 : CONFIG_BAUDRATE;
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195 return (0);
196}
197
198/***********************************************************************/
199
200static int init_func_ram (void)
201{
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202#ifdef CONFIG_BOARD_TYPES
203 int board_type = gd->board_type;
204#else
205 int board_type = 0; /* use dummy arg */
206#endif
207 puts ("DRAM: ");
208
209 if ((gd->ram_size = initdram (board_type)) > 0) {
210 print_size (gd->ram_size, "\n");
211 return (0);
212 }
213 puts (failed);
214 return (1);
215}
216
217/***********************************************************************/
218
219#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
220static int init_func_i2c (void)
221{
222 puts ("I2C: ");
223 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
224 puts ("ready\n");
225 return (0);
226}
227#endif
228
229/***********************************************************************/
230
231#if defined(CONFIG_WATCHDOG)
232static int init_func_watchdog_init (void)
233{
234 puts (" Watchdog enabled\n");
235 WATCHDOG_RESET ();
236 return (0);
237}
238# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
239
240static int init_func_watchdog_reset (void)
241{
242 WATCHDOG_RESET ();
243 return (0);
244}
245# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
246#else
247# define INIT_FUNC_WATCHDOG_INIT /* undef */
248# define INIT_FUNC_WATCHDOG_RESET /* undef */
249#endif /* CONFIG_WATCHDOG */
250
251/************************************************************************
252 * Initialization sequence *
253 ************************************************************************
254 */
255
256init_fnc_t *init_sequence[] = {
257
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258#if defined(CONFIG_BOARD_EARLY_INIT_F)
259 board_early_init_f,
fe8c2806 260#endif
c178d3da 261
66ca92a5 262#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
fe8c2806 263 get_clocks, /* get CPU and bus clocks (etc.) */
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264#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
265 adjust_sdram_tbs_8xx,
266#endif
fe8c2806 267 init_timebase,
c178d3da 268#endif
fe8c2806 269#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 270#if !defined(CONFIG_CPM2)
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271 dpram_init,
272#endif
7aa78614 273#endif
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274#if defined(CONFIG_BOARD_POSTCLK_INIT)
275 board_postclk_init,
276#endif
277 env_init,
66ca92a5 278#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
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279 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
280 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
281 init_timebase,
282#endif
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283 init_baudrate,
284 serial_init,
285 console_init_f,
286 display_options,
287#if defined(CONFIG_8260)
288 prt_8260_rsr,
289 prt_8260_clks,
290#endif /* CONFIG_8260 */
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291
292#if defined(CONFIG_MPC83XX)
293 print_clock_conf,
294#endif
295
fe8c2806 296 checkcpu,
cbd8a35c 297#if defined(CONFIG_MPC5xxx)
945af8d7 298 prt_mpc5xxx_clks,
cbd8a35c 299#endif /* CONFIG_MPC5xxx */
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300#if defined(CONFIG_MPC8220)
301 prt_mpc8220_clks,
302#endif
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303 checkboard,
304 INIT_FUNC_WATCHDOG_INIT
c837dcb1 305#if defined(CONFIG_MISC_INIT_F)
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306 misc_init_f,
307#endif
308 INIT_FUNC_WATCHDOG_RESET
309#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
310 init_func_i2c,
311#endif
312#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
313 dtt_init,
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WD
314#endif
315#ifdef CONFIG_POST
316 post_init_f,
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317#endif
318 INIT_FUNC_WATCHDOG_RESET
319 init_func_ram,
320#if defined(CFG_DRAM_TEST)
321 testdram,
322#endif /* CFG_DRAM_TEST */
323 INIT_FUNC_WATCHDOG_RESET
324
325 NULL, /* Terminate this list */
326};
327
328/************************************************************************
329 *
330 * This is the first part of the initialization sequence that is
331 * implemented in C, but still running from ROM.
332 *
333 * The main purpose is to provide a (serial) console interface as
334 * soon as possible (so we can see any error messages), and to
335 * initialize the RAM so that we can relocate the monitor code to
336 * RAM.
337 *
338 * Be aware of the restrictions: global data is read-only, BSS is not
339 * initialized, and stack space is limited to a few kB.
340 *
341 ************************************************************************
342 */
343
344void board_init_f (ulong bootflag)
345{
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346 bd_t *bd;
347 ulong len, addr, addr_sp;
7bc5ee07 348 ulong *s;
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349 gd_t *id;
350 init_fnc_t **init_fnc_ptr;
351#ifdef CONFIG_PRAM
352 int i;
353 ulong reg;
354 uchar tmp[64]; /* long enough for environment variables */
355#endif
356
357 /* Pointer is writable since we allocated a register for it */
358 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
93f6a677
WD
359 /* compiler optimization barrier needed for GCC >= 3.4 */
360 __asm__ __volatile__("": : :"memory");
fe8c2806 361
9c4c5ae3 362#if !defined(CONFIG_CPM2)
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363 /* Clear initial global data */
364 memset ((void *) gd, 0, sizeof (gd_t));
365#endif
366
367 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
368 if ((*init_fnc_ptr) () != 0) {
369 hang ();
370 }
371 }
372
373 /*
374 * Now that we have DRAM mapped and working, we can
375 * relocate the code and continue running from DRAM.
376 *
377 * Reserve memory at end of RAM for (top down in that order):
8bde7f77 378 * - kernel log buffer
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379 * - protected RAM
380 * - LCD framebuffer
381 * - monitor code
382 * - board info struct
383 */
3b57fe0a 384 len = (ulong)&_end - CFG_MONITOR_BASE;
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385
386#ifndef CONFIG_VERY_BIG_RAM
387 addr = CFG_SDRAM_BASE + gd->ram_size;
388#else
389 /* only allow stack below 256M */
390 addr = CFG_SDRAM_BASE +
391 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
392#endif
393
228f29ac
WD
394#ifdef CONFIG_LOGBUFFER
395 /* reserve kernel log buffer */
396 addr -= (LOGBUFF_RESERVE);
9d2b18a0 397 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
228f29ac
WD
398#endif
399
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400#ifdef CONFIG_PRAM
401 /*
402 * reserve protected RAM
403 */
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WD
404 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
405 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
fe8c2806 406 addr -= (reg << 10); /* size is in kB */
9d2b18a0 407 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
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408#endif /* CONFIG_PRAM */
409
410 /* round down to next 4 kB limit */
411 addr &= ~(4096 - 1);
9d2b18a0 412 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
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413
414#ifdef CONFIG_LCD
415 /* reserve memory for LCD display (always full pages) */
416 addr = lcd_setmem (addr);
417 gd->fb_base = addr;
418#endif /* CONFIG_LCD */
419
420#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
421 /* reserve memory for video display (always full pages) */
422 addr = video_setmem (addr);
423 gd->fb_base = addr;
424#endif /* CONFIG_VIDEO */
425
426 /*
427 * reserve memory for U-Boot code, data & bss
682011ff 428 * round down to next 4 kB limit
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429 */
430 addr -= len;
682011ff 431 addr &= ~(4096 - 1);
7d314992
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432#ifdef CONFIG_E500
433 /* round down to next 64 kB limit so that IVPR stays aligned */
434 addr &= ~(65536 - 1);
435#endif
fe8c2806 436
9d2b18a0 437 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
fe8c2806 438
c7de829c
WD
439#ifdef CONFIG_AMIGAONEG3SE
440 gd->relocaddr = addr;
441#endif
442
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443 /*
444 * reserve memory for malloc() arena
445 */
446 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 447 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 448 TOTAL_MALLOC_LEN >> 10, addr_sp);
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WD
449
450 /*
451 * (permanently) allocate a Board Info struct
452 * and a permanent copy of the "global" data
453 */
454 addr_sp -= sizeof (bd_t);
455 bd = (bd_t *) addr_sp;
456 gd->bd = bd;
9d2b18a0 457 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
fe8c2806 458 sizeof (bd_t), addr_sp);
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459 addr_sp -= sizeof (gd_t);
460 id = (gd_t *) addr_sp;
9d2b18a0 461 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
fe8c2806 462 sizeof (gd_t), addr_sp);
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463
464 /*
465 * Finally, we set up a new (bigger) stack.
466 *
467 * Leave some safety gap for SP, force alignment on 16 byte boundary
468 * Clear initial stack frame
469 */
470 addr_sp -= 16;
471 addr_sp &= ~0xF;
7bc5ee07
WD
472 s = (ulong *)addr_sp;
473 *s-- = 0;
474 *s-- = 0;
475 addr_sp = (ulong)s;
9d2b18a0 476 debug ("Stack Pointer at: %08lx\n", addr_sp);
fe8c2806
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477
478 /*
479 * Save local variables to board info struct
480 */
481
c837dcb1 482 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
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483 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
484
485#ifdef CONFIG_IP860
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486 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
487 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
983fda83
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488#elif defined CONFIG_MPC8220
489 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
490 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
fe8c2806 491#else
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492 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
493 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
fe8c2806
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494#endif
495
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496#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
497 defined(CONFIG_E500)
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498 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
499#endif
cbd8a35c 500#if defined(CONFIG_MPC5xxx)
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501 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
502#endif
f046ccd1
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503#if defined(CONFIG_MPC83XX)
504 bd->bi_immrbar = CFG_IMMRBAR;
505#endif
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506#if defined(CONFIG_MPC8220)
507 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
508 bd->bi_inpfreq = gd->inp_clk;
509 bd->bi_pcifreq = gd->pci_clk;
510 bd->bi_vcofreq = gd->vco_clk;
511 bd->bi_pevfreq = gd->pev_clk;
512 bd->bi_flbfreq = gd->flb_clk;
513
514 /* store bootparam to sram (backward compatible), here? */
515 {
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WD
516 u32 *sram = (u32 *)CFG_SRAM_BASE;
517 *sram++ = gd->ram_size;
518 *sram++ = gd->bus_clk;
519 *sram++ = gd->inp_clk;
520 *sram++ = gd->cpu_clk;
521 *sram++ = gd->vco_clk;
522 *sram++ = gd->flb_clk;
523 *sram++ = 0xb8c3ba11; /* boot signature */
983fda83
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524 }
525#endif
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526
527 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
528
529 WATCHDOG_RESET ();
530 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
531 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
9c4c5ae3 532#if defined(CONFIG_CPM2)
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533 bd->bi_cpmfreq = gd->cpm_clk;
534 bd->bi_brgfreq = gd->brg_clk;
535 bd->bi_sccfreq = gd->scc_clk;
536 bd->bi_vco = gd->vco_out;
9c4c5ae3 537#endif /* CONFIG_CPM2 */
cbd8a35c 538#if defined(CONFIG_MPC5xxx)
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539 bd->bi_ipbfreq = gd->ipb_clk;
540 bd->bi_pcifreq = gd->pci_clk;
cbd8a35c 541#endif /* CONFIG_MPC5xxx */
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542 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
543
544#ifdef CFG_EXTBDINFO
77ddac94
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545 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
546 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
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547
548 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
549 bd->bi_plb_busfreq = gd->bus_clk;
846b0dd2 550#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
fe8c2806 551 bd->bi_pci_busfreq = get_PCI_freq ();
109c0e3a 552 bd->bi_opbfreq = get_OPB_freq ();
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553#elif defined(CONFIG_XILINX_ML300)
554 bd->bi_pci_busfreq = get_PCI_freq ();
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555#endif
556#endif
557
9d2b18a0 558 debug ("New Stack Pointer is: %08lx\n", addr_sp);
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559
560 WATCHDOG_RESET ();
561
562#ifdef CONFIG_POST
563 post_bootmode_init();
6dff5529 564 post_run (NULL, POST_ROM | post_bootmode_get(0));
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565#endif
566
567 WATCHDOG_RESET();
568
27b207fd 569 memcpy (id, (void *)gd, sizeof (gd_t));
fe8c2806
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570
571 relocate_code (addr_sp, id, addr);
572
573 /* NOTREACHED - relocate_code() does not return */
574}
575
576
577/************************************************************************
578 *
579 * This is the next part if the initialization sequence: we are now
580 * running from RAM and have a "normal" C environment, i. e. global
581 * data can be written, BSS has been cleared, the stack size in not
582 * that critical any more, etc.
583 *
584 ************************************************************************
585 */
586
587void board_init_r (gd_t *id, ulong dest_addr)
588{
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589 cmd_tbl_t *cmdtp;
590 char *s, *e;
591 bd_t *bd;
592 int i;
593 extern void malloc_bin_reloc (void);
594#ifndef CFG_ENV_IS_NOWHERE
595 extern char * env_name_spec;
596#endif
597
598#ifndef CFG_NO_FLASH
599 ulong flash_size;
600#endif
601
602 gd = id; /* initialize RAM version of global data */
603 bd = gd->bd;
604
605 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
606
9d2b18a0 607 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
fe8c2806
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608
609 WATCHDOG_RESET ();
610
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611#if defined(CONFIG_BOARD_EARLY_INIT_R)
612 board_early_init_r ();
613#endif
614
fe8c2806 615 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
8bde7f77 616
3b57fe0a 617 monitor_flash_len = (ulong)&__init_end - dest_addr;
fe8c2806 618
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WD
619#ifdef CONFIG_SERIAL_MULTI
620 serial_initialize();
621#endif
622
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623 /*
624 * We have to relocate the command table manually
625 */
8bde7f77 626 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
fe8c2806 627 ulong addr;
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WD
628 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
629#if 0
630 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
631 cmdtp->name, (ulong) (cmdtp->cmd), addr);
632#endif
633 cmdtp->cmd =
634 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
635
636 addr = (ulong)(cmdtp->name) + gd->reloc_off;
637 cmdtp->name = (char *)addr;
638
639 if (cmdtp->usage) {
640 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
641 cmdtp->usage = (char *)addr;
642 }
643#ifdef CFG_LONGHELP
644 if (cmdtp->help) {
645 addr = (ulong)(cmdtp->help) + gd->reloc_off;
646 cmdtp->help = (char *)addr;
647 }
648#endif
649 }
650 /* there are some other pointer constants we must deal with */
651#ifndef CFG_ENV_IS_NOWHERE
652 env_name_spec += gd->reloc_off;
653#endif
654
655 WATCHDOG_RESET ();
656
56f94be3 657#ifdef CONFIG_LOGBUFFER
228f29ac 658 logbuff_init_ptrs ();
56f94be3 659#endif
fe8c2806 660#ifdef CONFIG_POST
228f29ac 661 post_output_backlog ();
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662 post_reloc ();
663#endif
664
665 WATCHDOG_RESET();
666
667#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)
668 icache_enable (); /* it's time to enable the instruction cache */
669#endif
670
42d1f039 671#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
c837dcb1 672 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
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WD
673#endif
674
3bac3513 675#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
fe8c2806 676 /*
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WD
677 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
678 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
679 * bridge there.
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680 */
681 pci_init ();
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WD
682#endif
683#if defined(CONFIG_BAB7xx)
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684 /*
685 * Initialise the ISA bridge
686 */
687 initialise_w83c553f ();
688#endif
689
690 asm ("sync ; isync");
691
692 /*
693 * Setup trap handlers
694 */
695 trap_init (dest_addr);
696
697#if !defined(CFG_NO_FLASH)
698 puts ("FLASH: ");
699
700 if ((flash_size = flash_init ()) > 0) {
0cb61d7d 701# ifdef CFG_FLASH_CHECKSUM
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702 print_size (flash_size, "");
703 /*
704 * Compute and print flash CRC if flashchecksum is set to 'y'
705 *
706 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
707 */
708 s = getenv ("flashchecksum");
709 if (s && (*s == 'y')) {
710 printf (" CRC: %08lX",
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711 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
712 );
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713 }
714 putc ('\n');
0cb61d7d 715# else /* !CFG_FLASH_CHECKSUM */
fe8c2806 716 print_size (flash_size, "\n");
0cb61d7d 717# endif /* CFG_FLASH_CHECKSUM */
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WD
718 } else {
719 puts (failed);
720 hang ();
721 }
722
723 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
724 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
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725# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
726 /* flash mapped at end of memory map */
727 bd->bi_flashoffset = TEXT_BASE + flash_size;
0cb61d7d 728# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
3b57fe0a 729 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 730# else
fe8c2806 731 bd->bi_flashoffset = 0;
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WD
732# endif
733#else /* CFG_NO_FLASH */
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734
735 bd->bi_flashsize = 0;
736 bd->bi_flashstart = 0;
737 bd->bi_flashoffset = 0;
738#endif /* !CFG_NO_FLASH */
739
740 WATCHDOG_RESET ();
741
742 /* initialize higher level parts of CPU like time base and timers */
743 cpu_init_r ();
744
745 WATCHDOG_RESET ();
746
747 /* initialize malloc() area */
748 mem_malloc_init ();
749 malloc_bin_reloc ();
750
751#ifdef CONFIG_SPI
752# if !defined(CFG_ENV_IS_IN_EEPROM)
753 spi_init_f ();
754# endif
755 spi_init_r ();
756#endif
757
758 /* relocate environment function pointers etc. */
759 env_relocate ();
760
761 /*
762 * Fill in missing fields of bd_info.
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763 * We do this here, where we have "normal" access to the
764 * environment; we used to do this still running from ROM,
765 * where had to use getenv_r(), which can be pretty slow when
766 * the environment is in EEPROM.
fe8c2806 767 */
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WD
768
769#if defined(CFG_EXTBDINFO)
770#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
771#if defined(CONFIG_I2CFAST)
772 /*
773 * set bi_iic_fast for linux taking environment variable
774 * "i2cfast" into account
775 */
776 {
777 char *s = getenv ("i2cfast");
778 if (s && ((*s == 'y') || (*s == 'Y'))) {
779 bd->bi_iic_fast[0] = 1;
780 bd->bi_iic_fast[1] = 1;
781 } else {
782 bd->bi_iic_fast[0] = 0;
783 bd->bi_iic_fast[1] = 0;
784 }
785 }
786#else
787 bd->bi_iic_fast[0] = 0;
788 bd->bi_iic_fast[1] = 0;
789#endif /* CONFIG_I2CFAST */
790#endif /* CONFIG_405GP, CONFIG_405EP */
791#endif /* CFG_EXTBDINFO */
792
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793 s = getenv ("ethaddr");
794#if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210)
795 if (s == NULL)
796 board_get_enetaddr (bd->bi_enetaddr);
797 else
798#endif
799 for (i = 0; i < 6; ++i) {
800 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
801 if (s)
802 s = (*e) ? e + 1 : e;
803 }
804#ifdef CONFIG_HERMES
805 if ((gd->board_type >> 16) == 2)
806 bd->bi_ethspeed = gd->board_type & 0xFFFF;
807 else
808 bd->bi_ethspeed = 0xFFFF;
809#endif
810
811#ifdef CONFIG_NX823
812 load_sernum_ethaddr ();
813#endif
814
e2ffd59b 815#ifdef CONFIG_HAS_ETH1
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WD
816 /* handle the 2nd ethernet address */
817
818 s = getenv ("eth1addr");
819
820 for (i = 0; i < 6; ++i) {
821 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
822 if (s)
823 s = (*e) ? e + 1 : e;
824 }
825#endif
e2ffd59b 826#ifdef CONFIG_HAS_ETH2
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WD
827 /* handle the 3rd ethernet address */
828
829 s = getenv ("eth2addr");
b79316f2 830#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
ba56f625
WD
831 if (s == NULL)
832 board_get_enetaddr(bd->bi_enet2addr);
833 else
834#endif
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WD
835 for (i = 0; i < 6; ++i) {
836 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
837 if (s)
838 s = (*e) ? e + 1 : e;
839 }
840#endif
841
e2ffd59b 842#ifdef CONFIG_HAS_ETH3
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WD
843 /* handle 4th ethernet address */
844 s = getenv("eth3addr");
b79316f2 845#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
ba56f625
WD
846 if (s == NULL)
847 board_get_enetaddr(bd->bi_enet3addr);
848 else
849#endif
850 for (i = 0; i < 6; ++i) {
851 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
852 if (s)
853 s = (*e) ? e + 1 : e;
854 }
855#endif
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WD
856
857#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
02b11f8e 858 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
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859 load_sernum_ethaddr ();
860#endif
861 /* IP Address */
862 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
863
864 WATCHDOG_RESET ();
865
979bdbc7 866#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
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WD
867 /*
868 * Do pci configuration
869 */
870 pci_init ();
871#endif
872
873/** leave this here (after malloc(), environment and PCI are working) **/
874 /* Initialize devices */
875 devices_init ();
876
27b207fd
WD
877 /* Initialize the jump table for applications */
878 jumptable_init ();
fe8c2806
WD
879
880 /* Initialize the console (after the relocation and devices init) */
881 console_init_r ();
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WD
882
883#if defined(CONFIG_CCM) || \
884 defined(CONFIG_COGENT) || \
885 defined(CONFIG_CPCI405) || \
886 defined(CONFIG_EVB64260) || \
56f94be3 887 defined(CONFIG_KUP4K) || \
0608e04d 888 defined(CONFIG_KUP4X) || \
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WD
889 defined(CONFIG_LWMON) || \
890 defined(CONFIG_PCU_E) || \
891 defined(CONFIG_W7O) || \
892 defined(CONFIG_MISC_INIT_R)
893 /* miscellaneous platform dependent initialisations */
894 misc_init_r ();
895#endif
896
897#ifdef CONFIG_HERMES
898 if (bd->bi_ethspeed != 0xFFFF)
899 hermes_start_lxt980 ((int) bd->bi_ethspeed);
900#endif
901
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WD
902#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
903 WATCHDOG_RESET ();
904 puts ("KGDB: ");
905 kgdb_init ();
906#endif
907
9d2b18a0 908 debug ("U-Boot relocated to %08lx\n", dest_addr);
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WD
909
910 /*
911 * Enable Interrupts
912 */
913 interrupt_init ();
914
915 /* Must happen after interrupts are initialized since
916 * an irq handler gets installed
917 */
42dfe7a1 918#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
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WD
919 serial_buffered_init();
920#endif
921
922#ifdef CONFIG_STATUS_LED
923 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
924#endif
925
926 udelay (20);
927
928 set_timer (0);
929
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WD
930 /* Initialize from environment */
931 if ((s = getenv ("loadaddr")) != NULL) {
932 load_addr = simple_strtoul (s, NULL, 16);
933 }
934#if (CONFIG_COMMANDS & CFG_CMD_NET)
935 if ((s = getenv ("bootfile")) != NULL) {
936 copy_filename (BootFile, s, sizeof (BootFile));
937 }
938#endif /* CFG_CMD_NET */
939
940 WATCHDOG_RESET ();
941
942#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
943 WATCHDOG_RESET ();
944 puts ("SCSI: ");
945 scsi_init ();
946#endif
947
948#if (CONFIG_COMMANDS & CFG_CMD_DOC)
949 WATCHDOG_RESET ();
950 puts ("DOC: ");
951 doc_init ();
952#endif
953
bedc4970
SR
954#if (CONFIG_COMMANDS & CFG_CMD_NAND)
955 WATCHDOG_RESET ();
b7eaad81 956 puts ("NAND: ");
bedc4970
SR
957 nand_init(); /* go init the NAND */
958#endif
959
63ff004c
MB
960#if (CONFIG_COMMANDS & CFG_CMD_NET)
961#if defined(CONFIG_NET_MULTI)
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WD
962 WATCHDOG_RESET ();
963 puts ("Net: ");
63ff004c 964#endif
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WD
965 eth_initialize (bd);
966#endif
967
63ff004c
MB
968#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
969 defined(CONFIG_CCM) || \
970 defined(CONFIG_ELPT860) || \
971 defined(CONFIG_EP8260) || \
972 defined(CONFIG_IP860) || \
973 defined(CONFIG_IVML24) || \
974 defined(CONFIG_IVMS8) || \
975 defined(CONFIG_MPC8260ADS) || \
976 defined(CONFIG_MPC8266ADS) || \
977 defined(CONFIG_MPC8560ADS) || \
978 defined(CONFIG_PCU_E) || \
979 defined(CONFIG_RPXSUPER) || \
980 defined(CONFIG_STXGP3) || \
981 defined(CONFIG_SPD823TS) || \
982 defined(CONFIG_RESET_PHY_R) )
983
984 WATCHDOG_RESET ();
985 debug ("Reset Ethernet PHY\n");
986 reset_phy ();
987#endif
988
fe8c2806 989#ifdef CONFIG_POST
6dff5529 990 post_run (NULL, POST_RAM | post_bootmode_get(0));
fe8c2806
WD
991#endif
992
993#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
994 WATCHDOG_RESET ();
995 puts ("PCMCIA:");
996 pcmcia_init ();
997#endif
998
999#if (CONFIG_COMMANDS & CFG_CMD_IDE)
1000 WATCHDOG_RESET ();
1001# ifdef CONFIG_IDE_8xx_PCCARD
1002 puts ("PCMCIA:");
1003# else
1004 puts ("IDE: ");
1005#endif
1006 ide_init ();
1007#endif /* CFG_CMD_IDE */
1008
1009#ifdef CONFIG_LAST_STAGE_INIT
1010 WATCHDOG_RESET ();
1011 /*
1012 * Some parts can be only initialized if all others (like
1013 * Interrupts) are up and running (i.e. the PC-style ISA
1014 * keyboard).
1015 */
1016 last_stage_init ();
1017#endif
1018
1019#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
1020 WATCHDOG_RESET ();
1021 bedbug_init ();
1022#endif
1023
228f29ac 1024#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
fe8c2806
WD
1025 /*
1026 * Export available size of memory for Linux,
1027 * taking into account the protected RAM at top of memory
1028 */
1029 {
1030 ulong pram;
fe8c2806 1031 uchar memsz[32];
228f29ac
WD
1032#ifdef CONFIG_PRAM
1033 char *s;
fe8c2806
WD
1034
1035 if ((s = getenv ("pram")) != NULL) {
1036 pram = simple_strtoul (s, NULL, 10);
1037 } else {
1038 pram = CONFIG_PRAM;
1039 }
228f29ac
WD
1040#else
1041 pram=0;
1042#endif
1043#ifdef CONFIG_LOGBUFFER
1044 /* Also take the logbuffer into account (pram is in kB) */
1045 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1046#endif
77ddac94
WD
1047 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1048 setenv ("mem", (char *)memsz);
fe8c2806
WD
1049 }
1050#endif
1051
1c43771b
WD
1052#ifdef CONFIG_PS2KBD
1053 puts ("PS/2: ");
1054 kbd_init();
1055#endif
1056
4532cb69
WD
1057#ifdef CONFIG_MODEM_SUPPORT
1058 {
1059 extern int do_mdm_init;
1060 do_mdm_init = gd->do_mdm_init;
1061 }
1062#endif
1063
fe8c2806
WD
1064 /* Initialization complete - start the monitor */
1065
1066 /* main_loop() can return to retry autoboot, if so just run it again. */
1067 for (;;) {
1068 WATCHDOG_RESET ();
1069 main_loop ();
1070 }
1071
1072 /* NOTREACHED - no way out of command loop except booting */
1073}
1074
1075void hang (void)
1076{
1077 puts ("### ERROR ### Please RESET the board ###\n");
63e73c9a
WD
1078#ifdef CONFIG_SHOW_BOOT_PROGRESS
1079 show_boot_progress(-30);
1080#endif
fe8c2806
WD
1081 for (;;);
1082}
1083
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WD
1084#ifdef CONFIG_MODEM_SUPPORT
1085/* called from main loop (common/main.c) */
77ddac94
WD
1086/* 'inline' - We have to do it fast */
1087static inline void mdm_readline(char *buf, int bufsiz)
1088{
1089 char c;
1090 char *p;
1091 int n;
1092
1093 n = 0;
1094 p = buf;
1095 for(;;) {
1096 c = serial_getc();
1097
1098 /* dbg("(%c)", c); */
1099
1100 switch(c) {
1101 case '\r':
1102 break;
1103 case '\n':
1104 *p = '\0';
1105 return;
1106
1107 default:
1108 if(n++ > bufsiz) {
1109 *p = '\0';
1110 return; /* sanity check */
1111 }
1112 *p = c;
1113 p++;
1114 break;
1115 }
1116 }
1117}
1118
1119
1120
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WD
1121extern void dbg(const char *fmt, ...);
1122int mdm_init (void)
1123{
1124 char env_str[16];
1125 char *init_str;
1126 int i;
1127 extern char console_buffer[];
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WD
1128 extern void enable_putc(void);
1129 extern int hwflow_onoff(int);
1130
1131 enable_putc(); /* enable serial_putc() */
1132
1133#ifdef CONFIG_HWFLOW
1134 init_str = getenv("mdm_flow_control");
1135 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1136 hwflow_onoff (1);
1137 else
1138 hwflow_onoff(-1);
1139#endif
1140
1141 for (i = 1;;i++) {
1142 sprintf(env_str, "mdm_init%d", i);
1143 if ((init_str = getenv(env_str)) != NULL) {
1144 serial_puts(init_str);
1145 serial_puts("\n");
1146 for(;;) {
1147 mdm_readline(console_buffer, CFG_CBSIZE);
1148 dbg("ini%d: [%s]", i, console_buffer);
1149
1150 if ((strcmp(console_buffer, "OK") == 0) ||
1151 (strcmp(console_buffer, "ERROR") == 0)) {
1152 dbg("ini%d: cmd done", i);
1153 break;
1154 } else /* in case we are originating call ... */
1155 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1156 dbg("ini%d: connect", i);
1157 return 0;
1158 }
1159 }
1160 } else
1161 break; /* no init string - stop modem init */
1162
1163 udelay(100000);
1164 }
1165
1166 udelay(100000);
1167
1168 /* final stage - wait for connect */
1169 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1170 message from modem */
1171 mdm_readline(console_buffer, CFG_CBSIZE);
1172 dbg("ini_f: [%s]", console_buffer);
1173 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1174 dbg("ini_f: connected");
1175 return 0;
1176 }
1177 }
1178
1179 return 0;
1180}
1181
4532cb69
WD
1182#endif
1183
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WD
1184#if 0 /* We could use plain global data, but the resulting code is bigger */
1185/*
1186 * Pointer to initial global data area
1187 *
1188 * Here we initialize it.
1189 */
1190#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1191#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1192DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1193#endif /* 0 */
1194
1195/************************************************************************/