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fe8c2806 1/*
4707fb50 2 * (C) Copyright 2000-2006
fe8c2806
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
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29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
0db5bca8
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32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
cbd8a35c 35#ifdef CONFIG_MPC5xxx
945af8d7
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36#include <mpc5xxx.h>
37#endif
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38#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
281e00a3 51#include <serial.h>
fe8c2806 52#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 53#if !defined(CONFIG_CPM2)
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54#include <commproc.h>
55#endif
7aa78614 56#endif
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57#include <version.h>
58#if defined(CONFIG_BAB7xx)
59#include <w83c553f.h>
60#endif
61#include <dtt.h>
62#if defined(CONFIG_POST)
63#include <post.h>
64#endif
56f94be3
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65#if defined(CONFIG_LOGBUFFER)
66#include <logbuff.h>
67#endif
42d1f039
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68#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
69#include <asm/cache.h>
70#endif
1c43771b
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71#ifdef CONFIG_PS2KBD
72#include <keyboard.h>
73#endif
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74
75#if (CONFIG_COMMANDS & CFG_CMD_DOC)
76void doc_init (void);
77#endif
78#if defined(CONFIG_HARD_I2C) || \
79 defined(CONFIG_SOFT_I2C)
80#include <i2c.h>
81#endif
bedc4970
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82#if (CONFIG_COMMANDS & CFG_CMD_NAND)
83void nand_init (void);
84#endif
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85
86static char *failed = "*** failed ***\n";
87
17d704eb 88#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
fe8c2806 89extern flash_info_t flash_info[];
17d704eb 90#endif
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91
92#include <environment.h>
d87080b7 93
bce84c4d 94DECLARE_GLOBAL_DATA_PTR;
fe8c2806 95
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96#if defined(CFG_ENV_IS_EMBEDDED)
97#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
98#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
04a85b3b 99 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
7e780369 100 defined(CFG_ENV_IS_IN_NVRAM)
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101#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
102#else
103#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
104#endif
105
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106extern ulong __init_end;
107extern ulong _end;
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108ulong monitor_flash_len;
109
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110#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
111#include <bedbug/type.h>
112#endif
113
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114/*
115 * Begin and End of memory area for malloc(), and current "brk"
116 */
117static ulong mem_malloc_start = 0;
118static ulong mem_malloc_end = 0;
119static ulong mem_malloc_brk = 0;
120
121/************************************************************************
122 * Utilities *
123 ************************************************************************
124 */
125
126/*
127 * The Malloc area is immediately below the monitor copy in DRAM
128 */
129static void mem_malloc_init (void)
130{
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131 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
132
133 mem_malloc_end = dest_addr;
134 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
135 mem_malloc_brk = mem_malloc_start;
136
137 memset ((void *) mem_malloc_start,
138 0,
139 mem_malloc_end - mem_malloc_start);
140}
141
142void *sbrk (ptrdiff_t increment)
143{
144 ulong old = mem_malloc_brk;
145 ulong new = old + increment;
146
147 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
148 return (NULL);
149 }
150 mem_malloc_brk = new;
151 return ((void *) old);
152}
153
154char *strmhz (char *buf, long hz)
155{
156 long l, n;
157 long m;
158
159 n = hz / 1000000L;
160 l = sprintf (buf, "%ld", n);
161 m = (hz % 1000000L) / 1000L;
162 if (m != 0)
163 sprintf (buf + l, ".%03ld", m);
164 return (buf);
165}
166
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167/*
168 * All attempts to come up with a "common" initialization sequence
169 * that works for all boards and architectures failed: some of the
170 * requirements are just _too_ different. To get rid of the resulting
171 * mess of board dependend #ifdef'ed code we now make the whole
172 * initialization sequence configurable to the user.
173 *
174 * The requirements for any new initalization function is simple: it
175 * receives a pointer to the "global data" structure as it's only
176 * argument, and returns an integer return code, where 0 means
177 * "continue" and != 0 means "fatal error, hang the system".
178 */
179typedef int (init_fnc_t) (void);
180
181/************************************************************************
182 * Init Utilities *
183 ************************************************************************
184 * Some of this code should be moved into the core functions,
185 * but let's get it working (again) first...
186 */
187
188static int init_baudrate (void)
189{
77ddac94 190 char tmp[64]; /* long enough for environment variables */
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191 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
192
193 gd->baudrate = (i > 0)
194 ? (int) simple_strtoul (tmp, NULL, 10)
195 : CONFIG_BAUDRATE;
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196 return (0);
197}
198
199/***********************************************************************/
200
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201#ifdef CONFIG_ADD_RAM_INFO
202void board_add_ram_info(int);
203#endif
204
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205static int init_func_ram (void)
206{
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207#ifdef CONFIG_BOARD_TYPES
208 int board_type = gd->board_type;
209#else
210 int board_type = 0; /* use dummy arg */
211#endif
212 puts ("DRAM: ");
213
214 if ((gd->ram_size = initdram (board_type)) > 0) {
d96f41e0
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215 print_size (gd->ram_size, "");
216#ifdef CONFIG_ADD_RAM_INFO
217 board_add_ram_info(0);
218#endif
219 putc('\n');
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220 return (0);
221 }
222 puts (failed);
223 return (1);
224}
225
226/***********************************************************************/
227
228#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
229static int init_func_i2c (void)
230{
231 puts ("I2C: ");
232 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
233 puts ("ready\n");
234 return (0);
235}
236#endif
237
238/***********************************************************************/
239
240#if defined(CONFIG_WATCHDOG)
241static int init_func_watchdog_init (void)
242{
243 puts (" Watchdog enabled\n");
244 WATCHDOG_RESET ();
245 return (0);
246}
247# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
248
249static int init_func_watchdog_reset (void)
250{
251 WATCHDOG_RESET ();
252 return (0);
253}
254# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
255#else
256# define INIT_FUNC_WATCHDOG_INIT /* undef */
257# define INIT_FUNC_WATCHDOG_RESET /* undef */
258#endif /* CONFIG_WATCHDOG */
259
260/************************************************************************
261 * Initialization sequence *
262 ************************************************************************
263 */
264
265init_fnc_t *init_sequence[] = {
266
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267#if defined(CONFIG_BOARD_EARLY_INIT_F)
268 board_early_init_f,
fe8c2806 269#endif
c178d3da 270
66ca92a5 271#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
fe8c2806 272 get_clocks, /* get CPU and bus clocks (etc.) */
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273#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
274 && !defined(CONFIG_TQM885D)
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275 adjust_sdram_tbs_8xx,
276#endif
fe8c2806 277 init_timebase,
c178d3da 278#endif
fe8c2806 279#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 280#if !defined(CONFIG_CPM2)
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281 dpram_init,
282#endif
7aa78614 283#endif
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284#if defined(CONFIG_BOARD_POSTCLK_INIT)
285 board_postclk_init,
286#endif
287 env_init,
66ca92a5 288#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
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289 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
290 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
291 init_timebase,
292#endif
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293 init_baudrate,
294 serial_init,
295 console_init_f,
296 display_options,
297#if defined(CONFIG_8260)
298 prt_8260_rsr,
299 prt_8260_clks,
300#endif /* CONFIG_8260 */
f046ccd1
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301
302#if defined(CONFIG_MPC83XX)
303 print_clock_conf,
304#endif
305
fe8c2806 306 checkcpu,
cbd8a35c 307#if defined(CONFIG_MPC5xxx)
945af8d7 308 prt_mpc5xxx_clks,
cbd8a35c 309#endif /* CONFIG_MPC5xxx */
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310#if defined(CONFIG_MPC8220)
311 prt_mpc8220_clks,
312#endif
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313 checkboard,
314 INIT_FUNC_WATCHDOG_INIT
c837dcb1 315#if defined(CONFIG_MISC_INIT_F)
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316 misc_init_f,
317#endif
318 INIT_FUNC_WATCHDOG_RESET
319#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
320 init_func_i2c,
321#endif
322#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
323 dtt_init,
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324#endif
325#ifdef CONFIG_POST
326 post_init_f,
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327#endif
328 INIT_FUNC_WATCHDOG_RESET
329 init_func_ram,
330#if defined(CFG_DRAM_TEST)
331 testdram,
332#endif /* CFG_DRAM_TEST */
333 INIT_FUNC_WATCHDOG_RESET
334
335 NULL, /* Terminate this list */
336};
337
338/************************************************************************
339 *
340 * This is the first part of the initialization sequence that is
341 * implemented in C, but still running from ROM.
342 *
343 * The main purpose is to provide a (serial) console interface as
344 * soon as possible (so we can see any error messages), and to
345 * initialize the RAM so that we can relocate the monitor code to
346 * RAM.
347 *
348 * Be aware of the restrictions: global data is read-only, BSS is not
349 * initialized, and stack space is limited to a few kB.
350 *
351 ************************************************************************
352 */
353
354void board_init_f (ulong bootflag)
355{
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356 bd_t *bd;
357 ulong len, addr, addr_sp;
7bc5ee07 358 ulong *s;
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359 gd_t *id;
360 init_fnc_t **init_fnc_ptr;
361#ifdef CONFIG_PRAM
362 int i;
363 ulong reg;
364 uchar tmp[64]; /* long enough for environment variables */
365#endif
366
367 /* Pointer is writable since we allocated a register for it */
368 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
93f6a677
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369 /* compiler optimization barrier needed for GCC >= 3.4 */
370 __asm__ __volatile__("": : :"memory");
fe8c2806 371
9c4c5ae3 372#if !defined(CONFIG_CPM2)
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373 /* Clear initial global data */
374 memset ((void *) gd, 0, sizeof (gd_t));
375#endif
376
377 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
378 if ((*init_fnc_ptr) () != 0) {
379 hang ();
380 }
381 }
382
383 /*
384 * Now that we have DRAM mapped and working, we can
385 * relocate the code and continue running from DRAM.
386 *
387 * Reserve memory at end of RAM for (top down in that order):
8bde7f77 388 * - kernel log buffer
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389 * - protected RAM
390 * - LCD framebuffer
391 * - monitor code
392 * - board info struct
393 */
3b57fe0a 394 len = (ulong)&_end - CFG_MONITOR_BASE;
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395
396#ifndef CONFIG_VERY_BIG_RAM
397 addr = CFG_SDRAM_BASE + gd->ram_size;
398#else
399 /* only allow stack below 256M */
400 addr = CFG_SDRAM_BASE +
401 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
402#endif
403
228f29ac
WD
404#ifdef CONFIG_LOGBUFFER
405 /* reserve kernel log buffer */
406 addr -= (LOGBUFF_RESERVE);
9d2b18a0 407 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
228f29ac
WD
408#endif
409
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410#ifdef CONFIG_PRAM
411 /*
412 * reserve protected RAM
413 */
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414 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
415 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
fe8c2806 416 addr -= (reg << 10); /* size is in kB */
9d2b18a0 417 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
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418#endif /* CONFIG_PRAM */
419
420 /* round down to next 4 kB limit */
421 addr &= ~(4096 - 1);
9d2b18a0 422 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
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423
424#ifdef CONFIG_LCD
425 /* reserve memory for LCD display (always full pages) */
426 addr = lcd_setmem (addr);
427 gd->fb_base = addr;
428#endif /* CONFIG_LCD */
429
430#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
431 /* reserve memory for video display (always full pages) */
432 addr = video_setmem (addr);
433 gd->fb_base = addr;
434#endif /* CONFIG_VIDEO */
435
436 /*
437 * reserve memory for U-Boot code, data & bss
682011ff 438 * round down to next 4 kB limit
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439 */
440 addr -= len;
682011ff 441 addr &= ~(4096 - 1);
7d314992
WD
442#ifdef CONFIG_E500
443 /* round down to next 64 kB limit so that IVPR stays aligned */
444 addr &= ~(65536 - 1);
445#endif
fe8c2806 446
9d2b18a0 447 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
fe8c2806 448
c7de829c
WD
449#ifdef CONFIG_AMIGAONEG3SE
450 gd->relocaddr = addr;
451#endif
452
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453 /*
454 * reserve memory for malloc() arena
455 */
456 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 457 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 458 TOTAL_MALLOC_LEN >> 10, addr_sp);
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WD
459
460 /*
461 * (permanently) allocate a Board Info struct
462 * and a permanent copy of the "global" data
463 */
464 addr_sp -= sizeof (bd_t);
465 bd = (bd_t *) addr_sp;
466 gd->bd = bd;
9d2b18a0 467 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
fe8c2806 468 sizeof (bd_t), addr_sp);
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469 addr_sp -= sizeof (gd_t);
470 id = (gd_t *) addr_sp;
9d2b18a0 471 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
fe8c2806 472 sizeof (gd_t), addr_sp);
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473
474 /*
475 * Finally, we set up a new (bigger) stack.
476 *
477 * Leave some safety gap for SP, force alignment on 16 byte boundary
478 * Clear initial stack frame
479 */
480 addr_sp -= 16;
481 addr_sp &= ~0xF;
7bc5ee07
WD
482 s = (ulong *)addr_sp;
483 *s-- = 0;
484 *s-- = 0;
485 addr_sp = (ulong)s;
9d2b18a0 486 debug ("Stack Pointer at: %08lx\n", addr_sp);
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487
488 /*
489 * Save local variables to board info struct
490 */
491
c837dcb1 492 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
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493 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
494
495#ifdef CONFIG_IP860
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496 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
497 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
983fda83
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498#elif defined CONFIG_MPC8220
499 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
500 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
fe8c2806 501#else
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502 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
503 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
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504#endif
505
42d1f039 506#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
debb7354 507 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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508 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
509#endif
cbd8a35c 510#if defined(CONFIG_MPC5xxx)
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511 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
512#endif
f046ccd1 513#if defined(CONFIG_MPC83XX)
d239d74b 514 bd->bi_immrbar = CFG_IMMR;
f046ccd1 515#endif
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516#if defined(CONFIG_MPC8220)
517 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
518 bd->bi_inpfreq = gd->inp_clk;
519 bd->bi_pcifreq = gd->pci_clk;
520 bd->bi_vcofreq = gd->vco_clk;
521 bd->bi_pevfreq = gd->pev_clk;
522 bd->bi_flbfreq = gd->flb_clk;
523
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524 /* store bootparam to sram (backward compatible), here? */
525 {
526 u32 *sram = (u32 *)CFG_SRAM_BASE;
527 *sram++ = gd->ram_size;
528 *sram++ = gd->bus_clk;
529 *sram++ = gd->inp_clk;
530 *sram++ = gd->cpu_clk;
531 *sram++ = gd->vco_clk;
532 *sram++ = gd->flb_clk;
533 *sram++ = 0xb8c3ba11; /* boot signature */
534 }
983fda83 535#endif
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536
537 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
538
539 WATCHDOG_RESET ();
540 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
541 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
9c4c5ae3 542#if defined(CONFIG_CPM2)
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543 bd->bi_cpmfreq = gd->cpm_clk;
544 bd->bi_brgfreq = gd->brg_clk;
545 bd->bi_sccfreq = gd->scc_clk;
546 bd->bi_vco = gd->vco_out;
9c4c5ae3 547#endif /* CONFIG_CPM2 */
cbd8a35c 548#if defined(CONFIG_MPC5xxx)
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549 bd->bi_ipbfreq = gd->ipb_clk;
550 bd->bi_pcifreq = gd->pci_clk;
cbd8a35c 551#endif /* CONFIG_MPC5xxx */
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552 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
553
554#ifdef CFG_EXTBDINFO
77ddac94
WD
555 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
556 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
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557
558 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
559 bd->bi_plb_busfreq = gd->bus_clk;
846b0dd2 560#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
fe8c2806 561 bd->bi_pci_busfreq = get_PCI_freq ();
109c0e3a 562 bd->bi_opbfreq = get_OPB_freq ();
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563#elif defined(CONFIG_XILINX_ML300)
564 bd->bi_pci_busfreq = get_PCI_freq ();
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565#endif
566#endif
567
9d2b18a0 568 debug ("New Stack Pointer is: %08lx\n", addr_sp);
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569
570 WATCHDOG_RESET ();
571
572#ifdef CONFIG_POST
573 post_bootmode_init();
6dff5529 574 post_run (NULL, POST_ROM | post_bootmode_get(0));
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575#endif
576
577 WATCHDOG_RESET();
578
27b207fd 579 memcpy (id, (void *)gd, sizeof (gd_t));
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580
581 relocate_code (addr_sp, id, addr);
582
583 /* NOTREACHED - relocate_code() does not return */
584}
585
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586/************************************************************************
587 *
588 * This is the next part if the initialization sequence: we are now
589 * running from RAM and have a "normal" C environment, i. e. global
590 * data can be written, BSS has been cleared, the stack size in not
591 * that critical any more, etc.
592 *
593 ************************************************************************
594 */
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595void board_init_r (gd_t *id, ulong dest_addr)
596{
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597 cmd_tbl_t *cmdtp;
598 char *s, *e;
599 bd_t *bd;
600 int i;
601 extern void malloc_bin_reloc (void);
602#ifndef CFG_ENV_IS_NOWHERE
603 extern char * env_name_spec;
604#endif
605
606#ifndef CFG_NO_FLASH
607 ulong flash_size;
608#endif
609
610 gd = id; /* initialize RAM version of global data */
611 bd = gd->bd;
612
613 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
bb105f24
MB
614 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
615
616#ifdef CONFIG_SERIAL_MULTI
617 serial_initialize();
618#endif
fe8c2806 619
9d2b18a0 620 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
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WD
621
622 WATCHDOG_RESET ();
623
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WD
624#if defined(CONFIG_BOARD_EARLY_INIT_R)
625 board_early_init_r ();
626#endif
627
3b57fe0a 628 monitor_flash_len = (ulong)&__init_end - dest_addr;
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WD
629
630 /*
631 * We have to relocate the command table manually
632 */
8bde7f77 633 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
fe8c2806 634 ulong addr;
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WD
635 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
636#if 0
637 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
638 cmdtp->name, (ulong) (cmdtp->cmd), addr);
639#endif
640 cmdtp->cmd =
641 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
642
643 addr = (ulong)(cmdtp->name) + gd->reloc_off;
644 cmdtp->name = (char *)addr;
645
646 if (cmdtp->usage) {
647 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
648 cmdtp->usage = (char *)addr;
649 }
650#ifdef CFG_LONGHELP
651 if (cmdtp->help) {
652 addr = (ulong)(cmdtp->help) + gd->reloc_off;
653 cmdtp->help = (char *)addr;
654 }
655#endif
656 }
657 /* there are some other pointer constants we must deal with */
658#ifndef CFG_ENV_IS_NOWHERE
659 env_name_spec += gd->reloc_off;
660#endif
661
662 WATCHDOG_RESET ();
663
56f94be3 664#ifdef CONFIG_LOGBUFFER
228f29ac 665 logbuff_init_ptrs ();
56f94be3 666#endif
fe8c2806 667#ifdef CONFIG_POST
228f29ac 668 post_output_backlog ();
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WD
669 post_reloc ();
670#endif
671
672 WATCHDOG_RESET();
673
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KG
674#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
675 defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
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676 icache_enable (); /* it's time to enable the instruction cache */
677#endif
678
1c8f6d8f 679#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
c837dcb1 680 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
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681#endif
682
3bac3513 683#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
fe8c2806 684 /*
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WD
685 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
686 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
687 * bridge there.
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688 */
689 pci_init ();
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WD
690#endif
691#if defined(CONFIG_BAB7xx)
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692 /*
693 * Initialise the ISA bridge
694 */
695 initialise_w83c553f ();
696#endif
697
698 asm ("sync ; isync");
699
700 /*
701 * Setup trap handlers
702 */
703 trap_init (dest_addr);
704
705#if !defined(CFG_NO_FLASH)
706 puts ("FLASH: ");
707
708 if ((flash_size = flash_init ()) > 0) {
0cb61d7d 709# ifdef CFG_FLASH_CHECKSUM
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710 print_size (flash_size, "");
711 /*
712 * Compute and print flash CRC if flashchecksum is set to 'y'
713 *
714 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
715 */
716 s = getenv ("flashchecksum");
717 if (s && (*s == 'y')) {
718 printf (" CRC: %08lX",
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719 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
720 );
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721 }
722 putc ('\n');
0cb61d7d 723# else /* !CFG_FLASH_CHECKSUM */
fe8c2806 724 print_size (flash_size, "\n");
0cb61d7d 725# endif /* CFG_FLASH_CHECKSUM */
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726 } else {
727 puts (failed);
728 hang ();
729 }
730
731 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
732 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
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733# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
734 /* flash mapped at end of memory map */
735 bd->bi_flashoffset = TEXT_BASE + flash_size;
0cb61d7d 736# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
3b57fe0a 737 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 738# else
fe8c2806 739 bd->bi_flashoffset = 0;
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740# endif
741#else /* CFG_NO_FLASH */
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742
743 bd->bi_flashsize = 0;
744 bd->bi_flashstart = 0;
745 bd->bi_flashoffset = 0;
746#endif /* !CFG_NO_FLASH */
747
748 WATCHDOG_RESET ();
749
750 /* initialize higher level parts of CPU like time base and timers */
751 cpu_init_r ();
752
753 WATCHDOG_RESET ();
754
755 /* initialize malloc() area */
756 mem_malloc_init ();
757 malloc_bin_reloc ();
758
759#ifdef CONFIG_SPI
760# if !defined(CFG_ENV_IS_IN_EEPROM)
761 spi_init_f ();
762# endif
763 spi_init_r ();
764#endif
765
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SR
766#if (CONFIG_COMMANDS & CFG_CMD_NAND)
767 WATCHDOG_RESET ();
768 puts ("NAND: ");
769 nand_init(); /* go init the NAND */
770#endif
771
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WD
772 /* relocate environment function pointers etc. */
773 env_relocate ();
774
775 /*
776 * Fill in missing fields of bd_info.
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WD
777 * We do this here, where we have "normal" access to the
778 * environment; we used to do this still running from ROM,
779 * where had to use getenv_r(), which can be pretty slow when
780 * the environment is in EEPROM.
fe8c2806 781 */
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782
783#if defined(CFG_EXTBDINFO)
784#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
785#if defined(CONFIG_I2CFAST)
786 /*
787 * set bi_iic_fast for linux taking environment variable
788 * "i2cfast" into account
789 */
790 {
791 char *s = getenv ("i2cfast");
792 if (s && ((*s == 'y') || (*s == 'Y'))) {
793 bd->bi_iic_fast[0] = 1;
794 bd->bi_iic_fast[1] = 1;
795 } else {
796 bd->bi_iic_fast[0] = 0;
797 bd->bi_iic_fast[1] = 0;
798 }
799 }
800#else
801 bd->bi_iic_fast[0] = 0;
802 bd->bi_iic_fast[1] = 0;
803#endif /* CONFIG_I2CFAST */
804#endif /* CONFIG_405GP, CONFIG_405EP */
805#endif /* CFG_EXTBDINFO */
806
fe8c2806 807 s = getenv ("ethaddr");
4707fb50
BS
808#if defined (CONFIG_MBX) || \
809 defined (CONFIG_RPXCLASSIC) || \
810 defined(CONFIG_IAD210) || \
811 defined(CONFIG_V38B)
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WD
812 if (s == NULL)
813 board_get_enetaddr (bd->bi_enetaddr);
814 else
815#endif
816 for (i = 0; i < 6; ++i) {
817 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
818 if (s)
819 s = (*e) ? e + 1 : e;
820 }
821#ifdef CONFIG_HERMES
822 if ((gd->board_type >> 16) == 2)
823 bd->bi_ethspeed = gd->board_type & 0xFFFF;
824 else
825 bd->bi_ethspeed = 0xFFFF;
826#endif
827
828#ifdef CONFIG_NX823
829 load_sernum_ethaddr ();
830#endif
831
e2ffd59b 832#ifdef CONFIG_HAS_ETH1
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WD
833 /* handle the 2nd ethernet address */
834
835 s = getenv ("eth1addr");
836
837 for (i = 0; i < 6; ++i) {
838 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
839 if (s)
840 s = (*e) ? e + 1 : e;
841 }
842#endif
e2ffd59b 843#ifdef CONFIG_HAS_ETH2
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WD
844 /* handle the 3rd ethernet address */
845
846 s = getenv ("eth2addr");
b79316f2 847#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
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WD
848 if (s == NULL)
849 board_get_enetaddr(bd->bi_enet2addr);
850 else
851#endif
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WD
852 for (i = 0; i < 6; ++i) {
853 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
854 if (s)
855 s = (*e) ? e + 1 : e;
856 }
857#endif
858
e2ffd59b 859#ifdef CONFIG_HAS_ETH3
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WD
860 /* handle 4th ethernet address */
861 s = getenv("eth3addr");
b79316f2 862#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
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WD
863 if (s == NULL)
864 board_get_enetaddr(bd->bi_enet3addr);
865 else
866#endif
867 for (i = 0; i < 6; ++i) {
868 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
869 if (s)
870 s = (*e) ? e + 1 : e;
871 }
872#endif
fe8c2806 873
bea3f28d
HW
874#ifdef CFG_ID_EEPROM
875 mac_read_from_eeprom();
876#endif
877
fe8c2806 878#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
02b11f8e 879 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
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WD
880 load_sernum_ethaddr ();
881#endif
882 /* IP Address */
883 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
884
885 WATCHDOG_RESET ();
886
979bdbc7 887#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
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888 /*
889 * Do pci configuration
890 */
891 pci_init ();
892#endif
893
894/** leave this here (after malloc(), environment and PCI are working) **/
895 /* Initialize devices */
896 devices_init ();
897
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WD
898 /* Initialize the jump table for applications */
899 jumptable_init ();
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WD
900
901 /* Initialize the console (after the relocation and devices init) */
902 console_init_r ();
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WD
903
904#if defined(CONFIG_CCM) || \
905 defined(CONFIG_COGENT) || \
906 defined(CONFIG_CPCI405) || \
907 defined(CONFIG_EVB64260) || \
56f94be3 908 defined(CONFIG_KUP4K) || \
0608e04d 909 defined(CONFIG_KUP4X) || \
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WD
910 defined(CONFIG_LWMON) || \
911 defined(CONFIG_PCU_E) || \
912 defined(CONFIG_W7O) || \
913 defined(CONFIG_MISC_INIT_R)
914 /* miscellaneous platform dependent initialisations */
915 misc_init_r ();
916#endif
917
918#ifdef CONFIG_HERMES
919 if (bd->bi_ethspeed != 0xFFFF)
920 hermes_start_lxt980 ((int) bd->bi_ethspeed);
921#endif
922
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WD
923#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
924 WATCHDOG_RESET ();
925 puts ("KGDB: ");
926 kgdb_init ();
927#endif
928
9d2b18a0 929 debug ("U-Boot relocated to %08lx\n", dest_addr);
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WD
930
931 /*
932 * Enable Interrupts
933 */
934 interrupt_init ();
935
936 /* Must happen after interrupts are initialized since
937 * an irq handler gets installed
938 */
42dfe7a1 939#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
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WD
940 serial_buffered_init();
941#endif
942
943#ifdef CONFIG_STATUS_LED
944 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
945#endif
946
947 udelay (20);
948
949 set_timer (0);
950
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WD
951 /* Initialize from environment */
952 if ((s = getenv ("loadaddr")) != NULL) {
953 load_addr = simple_strtoul (s, NULL, 16);
954 }
955#if (CONFIG_COMMANDS & CFG_CMD_NET)
956 if ((s = getenv ("bootfile")) != NULL) {
957 copy_filename (BootFile, s, sizeof (BootFile));
958 }
959#endif /* CFG_CMD_NET */
960
961 WATCHDOG_RESET ();
962
963#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
964 WATCHDOG_RESET ();
965 puts ("SCSI: ");
966 scsi_init ();
967#endif
968
969#if (CONFIG_COMMANDS & CFG_CMD_DOC)
970 WATCHDOG_RESET ();
971 puts ("DOC: ");
972 doc_init ();
973#endif
974
63ff004c
MB
975#if (CONFIG_COMMANDS & CFG_CMD_NET)
976#if defined(CONFIG_NET_MULTI)
fe8c2806
WD
977 WATCHDOG_RESET ();
978 puts ("Net: ");
63ff004c 979#endif
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WD
980 eth_initialize (bd);
981#endif
982
63ff004c
MB
983#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
984 defined(CONFIG_CCM) || \
985 defined(CONFIG_ELPT860) || \
986 defined(CONFIG_EP8260) || \
987 defined(CONFIG_IP860) || \
988 defined(CONFIG_IVML24) || \
989 defined(CONFIG_IVMS8) || \
990 defined(CONFIG_MPC8260ADS) || \
991 defined(CONFIG_MPC8266ADS) || \
992 defined(CONFIG_MPC8560ADS) || \
993 defined(CONFIG_PCU_E) || \
994 defined(CONFIG_RPXSUPER) || \
995 defined(CONFIG_STXGP3) || \
996 defined(CONFIG_SPD823TS) || \
997 defined(CONFIG_RESET_PHY_R) )
998
999 WATCHDOG_RESET ();
1000 debug ("Reset Ethernet PHY\n");
1001 reset_phy ();
1002#endif
1003
fe8c2806 1004#ifdef CONFIG_POST
6dff5529 1005 post_run (NULL, POST_RAM | post_bootmode_get(0));
fe8c2806
WD
1006#endif
1007
1008#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
1009 WATCHDOG_RESET ();
1010 puts ("PCMCIA:");
1011 pcmcia_init ();
1012#endif
1013
1014#if (CONFIG_COMMANDS & CFG_CMD_IDE)
1015 WATCHDOG_RESET ();
1016# ifdef CONFIG_IDE_8xx_PCCARD
1017 puts ("PCMCIA:");
1018# else
1019 puts ("IDE: ");
1020#endif
1021 ide_init ();
1022#endif /* CFG_CMD_IDE */
1023
1024#ifdef CONFIG_LAST_STAGE_INIT
1025 WATCHDOG_RESET ();
1026 /*
1027 * Some parts can be only initialized if all others (like
1028 * Interrupts) are up and running (i.e. the PC-style ISA
1029 * keyboard).
1030 */
1031 last_stage_init ();
1032#endif
1033
1034#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
1035 WATCHDOG_RESET ();
1036 bedbug_init ();
1037#endif
1038
228f29ac 1039#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
fe8c2806
WD
1040 /*
1041 * Export available size of memory for Linux,
1042 * taking into account the protected RAM at top of memory
1043 */
1044 {
1045 ulong pram;
fe8c2806 1046 uchar memsz[32];
228f29ac
WD
1047#ifdef CONFIG_PRAM
1048 char *s;
fe8c2806
WD
1049
1050 if ((s = getenv ("pram")) != NULL) {
1051 pram = simple_strtoul (s, NULL, 10);
1052 } else {
1053 pram = CONFIG_PRAM;
1054 }
228f29ac
WD
1055#else
1056 pram=0;
1057#endif
1058#ifdef CONFIG_LOGBUFFER
1059 /* Also take the logbuffer into account (pram is in kB) */
1060 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1061#endif
77ddac94
WD
1062 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1063 setenv ("mem", (char *)memsz);
fe8c2806
WD
1064 }
1065#endif
1066
1c43771b
WD
1067#ifdef CONFIG_PS2KBD
1068 puts ("PS/2: ");
1069 kbd_init();
1070#endif
1071
4532cb69
WD
1072#ifdef CONFIG_MODEM_SUPPORT
1073 {
1074 extern int do_mdm_init;
1075 do_mdm_init = gd->do_mdm_init;
1076 }
1077#endif
1078
fe8c2806
WD
1079 /* Initialization complete - start the monitor */
1080
1081 /* main_loop() can return to retry autoboot, if so just run it again. */
1082 for (;;) {
1083 WATCHDOG_RESET ();
1084 main_loop ();
1085 }
1086
1087 /* NOTREACHED - no way out of command loop except booting */
1088}
1089
1090void hang (void)
1091{
1092 puts ("### ERROR ### Please RESET the board ###\n");
63e73c9a
WD
1093#ifdef CONFIG_SHOW_BOOT_PROGRESS
1094 show_boot_progress(-30);
1095#endif
fe8c2806
WD
1096 for (;;);
1097}
1098
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WD
1099#ifdef CONFIG_MODEM_SUPPORT
1100/* called from main loop (common/main.c) */
77ddac94
WD
1101/* 'inline' - We have to do it fast */
1102static inline void mdm_readline(char *buf, int bufsiz)
1103{
1104 char c;
1105 char *p;
1106 int n;
1107
1108 n = 0;
1109 p = buf;
1110 for(;;) {
1111 c = serial_getc();
1112
1113 /* dbg("(%c)", c); */
1114
1115 switch(c) {
1116 case '\r':
1117 break;
1118 case '\n':
1119 *p = '\0';
1120 return;
1121
1122 default:
1123 if(n++ > bufsiz) {
1124 *p = '\0';
1125 return; /* sanity check */
1126 }
1127 *p = c;
1128 p++;
1129 break;
1130 }
1131 }
1132}
1133
4532cb69
WD
1134extern void dbg(const char *fmt, ...);
1135int mdm_init (void)
1136{
1137 char env_str[16];
1138 char *init_str;
1139 int i;
1140 extern char console_buffer[];
4532cb69
WD
1141 extern void enable_putc(void);
1142 extern int hwflow_onoff(int);
1143
1144 enable_putc(); /* enable serial_putc() */
1145
1146#ifdef CONFIG_HWFLOW
1147 init_str = getenv("mdm_flow_control");
1148 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1149 hwflow_onoff (1);
1150 else
1151 hwflow_onoff(-1);
1152#endif
1153
1154 for (i = 1;;i++) {
1155 sprintf(env_str, "mdm_init%d", i);
1156 if ((init_str = getenv(env_str)) != NULL) {
1157 serial_puts(init_str);
1158 serial_puts("\n");
1159 for(;;) {
1160 mdm_readline(console_buffer, CFG_CBSIZE);
1161 dbg("ini%d: [%s]", i, console_buffer);
1162
1163 if ((strcmp(console_buffer, "OK") == 0) ||
1164 (strcmp(console_buffer, "ERROR") == 0)) {
1165 dbg("ini%d: cmd done", i);
1166 break;
1167 } else /* in case we are originating call ... */
1168 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1169 dbg("ini%d: connect", i);
1170 return 0;
1171 }
1172 }
1173 } else
1174 break; /* no init string - stop modem init */
1175
1176 udelay(100000);
1177 }
1178
1179 udelay(100000);
1180
1181 /* final stage - wait for connect */
1182 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1183 message from modem */
1184 mdm_readline(console_buffer, CFG_CBSIZE);
1185 dbg("ini_f: [%s]", console_buffer);
1186 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1187 dbg("ini_f: connected");
1188 return 0;
1189 }
1190 }
1191
1192 return 0;
1193}
1194
4532cb69
WD
1195#endif
1196
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WD
1197#if 0 /* We could use plain global data, but the resulting code is bigger */
1198/*
1199 * Pointer to initial global data area
1200 *
1201 * Here we initialize it.
1202 */
1203#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1204#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1205DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1206#endif /* 0 */
1207
1208/************************************************************************/