]>
Commit | Line | Data |
---|---|---|
cd71c089 LV |
1 | /* |
2 | * qemu user cpu loop | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "qemu/osdep.h" | |
a8d25326 | 21 | #include "qemu-common.h" |
cd71c089 LV |
22 | #include "qemu.h" |
23 | #include "cpu_loop-common.h" | |
24 | ||
ff9803b1 LV |
25 | void cpu_loop(CPUM68KState *env) |
26 | { | |
a8d92fd8 | 27 | CPUState *cs = env_cpu(env); |
ff9803b1 LV |
28 | int trapnr; |
29 | unsigned int n; | |
30 | target_siginfo_t info; | |
31 | TaskState *ts = cs->opaque; | |
32 | ||
33 | for(;;) { | |
34 | cpu_exec_start(cs); | |
35 | trapnr = cpu_exec(cs); | |
36 | cpu_exec_end(cs); | |
37 | process_queued_cpu_work(cs); | |
38 | ||
39 | switch(trapnr) { | |
40 | case EXCP_ILLEGAL: | |
41 | { | |
42 | if (ts->sim_syscalls) { | |
43 | uint16_t nr; | |
44 | get_user_u16(nr, env->pc + 2); | |
45 | env->pc += 4; | |
46 | do_m68k_simcall(env, nr); | |
47 | } else { | |
48 | goto do_sigill; | |
49 | } | |
50 | } | |
51 | break; | |
52 | case EXCP_HALT_INSN: | |
53 | /* Semihosing syscall. */ | |
54 | env->pc += 4; | |
55 | do_m68k_semihosting(env, env->dregs[0]); | |
56 | break; | |
57 | case EXCP_LINEA: | |
58 | case EXCP_LINEF: | |
ff9803b1 LV |
59 | do_sigill: |
60 | info.si_signo = TARGET_SIGILL; | |
61 | info.si_errno = 0; | |
62 | info.si_code = TARGET_ILL_ILLOPN; | |
63 | info._sifields._sigfault._addr = env->pc; | |
64 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
65 | break; | |
66 | case EXCP_CHK: | |
67 | info.si_signo = TARGET_SIGFPE; | |
68 | info.si_errno = 0; | |
69 | info.si_code = TARGET_FPE_INTOVF; | |
70 | info._sifields._sigfault._addr = env->pc; | |
71 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
72 | break; | |
73 | case EXCP_DIV0: | |
74 | info.si_signo = TARGET_SIGFPE; | |
75 | info.si_errno = 0; | |
76 | info.si_code = TARGET_FPE_INTDIV; | |
77 | info._sifields._sigfault._addr = env->pc; | |
78 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
79 | break; | |
80 | case EXCP_TRAP0: | |
81 | { | |
82 | abi_long ret; | |
83 | ts->sim_syscalls = 0; | |
84 | n = env->dregs[0]; | |
85 | env->pc += 2; | |
86 | ret = do_syscall(env, | |
87 | n, | |
88 | env->dregs[1], | |
89 | env->dregs[2], | |
90 | env->dregs[3], | |
91 | env->dregs[4], | |
92 | env->dregs[5], | |
93 | env->aregs[0], | |
94 | 0, 0); | |
95 | if (ret == -TARGET_ERESTARTSYS) { | |
96 | env->pc -= 2; | |
97 | } else if (ret != -TARGET_QEMU_ESIGRETURN) { | |
98 | env->dregs[0] = ret; | |
99 | } | |
100 | } | |
101 | break; | |
102 | case EXCP_INTERRUPT: | |
103 | /* just indicate that signals should be handled asap */ | |
104 | break; | |
105 | case EXCP_ACCESS: | |
106 | { | |
107 | info.si_signo = TARGET_SIGSEGV; | |
108 | info.si_errno = 0; | |
109 | /* XXX: check env->error_code */ | |
110 | info.si_code = TARGET_SEGV_MAPERR; | |
111 | info._sifields._sigfault._addr = env->mmu.ar; | |
112 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
113 | } | |
114 | break; | |
115 | case EXCP_DEBUG: | |
b10089a1 PM |
116 | info.si_signo = TARGET_SIGTRAP; |
117 | info.si_errno = 0; | |
118 | info.si_code = TARGET_TRAP_BRKPT; | |
119 | queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); | |
ff9803b1 LV |
120 | break; |
121 | case EXCP_ATOMIC: | |
122 | cpu_exec_step_atomic(cs); | |
123 | break; | |
124 | default: | |
125 | EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr); | |
126 | abort(); | |
127 | } | |
128 | process_pending_signals(env); | |
129 | } | |
130 | } | |
131 | ||
cd71c089 LV |
132 | void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) |
133 | { | |
29a0af61 | 134 | CPUState *cpu = env_cpu(env); |
ff9803b1 LV |
135 | TaskState *ts = cpu->opaque; |
136 | struct image_info *info = ts->info; | |
137 | ||
138 | env->pc = regs->pc; | |
139 | env->dregs[0] = regs->d0; | |
140 | env->dregs[1] = regs->d1; | |
141 | env->dregs[2] = regs->d2; | |
142 | env->dregs[3] = regs->d3; | |
143 | env->dregs[4] = regs->d4; | |
144 | env->dregs[5] = regs->d5; | |
145 | env->dregs[6] = regs->d6; | |
146 | env->dregs[7] = regs->d7; | |
147 | env->aregs[0] = regs->a0; | |
148 | env->aregs[1] = regs->a1; | |
149 | env->aregs[2] = regs->a2; | |
150 | env->aregs[3] = regs->a3; | |
151 | env->aregs[4] = regs->a4; | |
152 | env->aregs[5] = regs->a5; | |
153 | env->aregs[6] = regs->a6; | |
154 | env->aregs[7] = regs->usp; | |
155 | env->sr = regs->sr; | |
156 | ||
157 | ts->sim_syscalls = 1; | |
158 | ts->stack_base = info->start_stack; | |
159 | ts->heap_base = info->brk; | |
160 | /* This will be filled in on the first SYS_HEAPINFO call. */ | |
161 | ts->heap_limit = 0; | |
cd71c089 | 162 | } |