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Commit | Line | Data |
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befb7447 LV |
1 | /* |
2 | * Emulation of Linux signals | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
9f172adb LV |
19 | #include "qemu/osdep.h" |
20 | #include "qemu.h" | |
9f172adb LV |
21 | #include "signal-common.h" |
22 | #include "linux-user/trace.h" | |
23 | ||
24 | #define __SUNOS_MAXWIN 31 | |
25 | ||
26 | /* This is what SunOS does, so shall I. */ | |
27 | struct target_sigcontext { | |
28 | abi_ulong sigc_onstack; /* state to restore */ | |
29 | ||
30 | abi_ulong sigc_mask; /* sigmask to restore */ | |
31 | abi_ulong sigc_sp; /* stack pointer */ | |
32 | abi_ulong sigc_pc; /* program counter */ | |
33 | abi_ulong sigc_npc; /* next program counter */ | |
34 | abi_ulong sigc_psr; /* for condition codes etc */ | |
35 | abi_ulong sigc_g1; /* User uses these two registers */ | |
36 | abi_ulong sigc_o0; /* within the trampoline code. */ | |
37 | ||
38 | /* Now comes information regarding the users window set | |
39 | * at the time of the signal. | |
40 | */ | |
41 | abi_ulong sigc_oswins; /* outstanding windows */ | |
42 | ||
43 | /* stack ptrs for each regwin buf */ | |
44 | char *sigc_spbuf[__SUNOS_MAXWIN]; | |
45 | ||
46 | /* Windows to restore after signal */ | |
47 | struct { | |
48 | abi_ulong locals[8]; | |
49 | abi_ulong ins[8]; | |
50 | } sigc_wbuf[__SUNOS_MAXWIN]; | |
51 | }; | |
52 | /* A Sparc stack frame */ | |
53 | struct sparc_stackf { | |
54 | abi_ulong locals[8]; | |
55 | abi_ulong ins[8]; | |
56 | /* It's simpler to treat fp and callers_pc as elements of ins[] | |
57 | * since we never need to access them ourselves. | |
58 | */ | |
59 | char *structptr; | |
60 | abi_ulong xargs[6]; | |
61 | abi_ulong xxargs[1]; | |
62 | }; | |
63 | ||
64 | typedef struct { | |
65 | struct { | |
66 | abi_ulong psr; | |
67 | abi_ulong pc; | |
68 | abi_ulong npc; | |
69 | abi_ulong y; | |
70 | abi_ulong u_regs[16]; /* globals and ins */ | |
71 | } si_regs; | |
72 | int si_mask; | |
73 | } __siginfo_t; | |
74 | ||
75 | typedef struct { | |
76 | abi_ulong si_float_regs[32]; | |
77 | unsigned long si_fsr; | |
78 | unsigned long si_fpqdepth; | |
79 | struct { | |
80 | unsigned long *insn_addr; | |
81 | unsigned long insn; | |
82 | } si_fpqueue [16]; | |
83 | } qemu_siginfo_fpu_t; | |
84 | ||
85 | ||
86 | struct target_signal_frame { | |
87 | struct sparc_stackf ss; | |
88 | __siginfo_t info; | |
89 | abi_ulong fpu_save; | |
b220cbcf | 90 | uint32_t insns[2] QEMU_ALIGNED(8); |
9f172adb LV |
91 | abi_ulong extramask[TARGET_NSIG_WORDS - 1]; |
92 | abi_ulong extra_size; /* Should be 0 */ | |
93 | qemu_siginfo_fpu_t fpu_state; | |
94 | }; | |
95 | struct target_rt_signal_frame { | |
96 | struct sparc_stackf ss; | |
97 | siginfo_t info; | |
98 | abi_ulong regs[20]; | |
99 | sigset_t mask; | |
100 | abi_ulong fpu_save; | |
b220cbcf | 101 | uint32_t insns[2]; |
9f172adb LV |
102 | stack_t stack; |
103 | unsigned int extra_size; /* Should be 0 */ | |
104 | qemu_siginfo_fpu_t fpu_state; | |
105 | }; | |
106 | ||
9f172adb LV |
107 | static inline abi_ulong get_sigframe(struct target_sigaction *sa, |
108 | CPUSPARCState *env, | |
109 | unsigned long framesize) | |
110 | { | |
465e237b | 111 | abi_ulong sp = get_sp_from_cpustate(env); |
9f172adb | 112 | |
465e237b LV |
113 | /* |
114 | * If we are on the alternate signal stack and would overflow it, don't. | |
115 | * Return an always-bogus address instead so we will die with SIGSEGV. | |
116 | */ | |
117 | if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize))) { | |
118 | return -1; | |
119 | } | |
9f172adb LV |
120 | |
121 | /* This is the X/Open sanctioned signal stack switching. */ | |
465e237b LV |
122 | sp = target_sigsp(sp, sa) - framesize; |
123 | ||
124 | /* Always align the stack frame. This handles two cases. First, | |
125 | * sigaltstack need not be mindful of platform specific stack | |
126 | * alignment. Second, if we took this signal because the stack | |
127 | * is not aligned properly, we'd like to take the signal cleanly | |
128 | * and report that. | |
129 | */ | |
130 | sp &= ~15UL; | |
131 | ||
132 | return sp; | |
9f172adb LV |
133 | } |
134 | ||
135 | static int | |
136 | setup___siginfo(__siginfo_t *si, CPUSPARCState *env, abi_ulong mask) | |
137 | { | |
138 | int err = 0, i; | |
139 | ||
140 | __put_user(env->psr, &si->si_regs.psr); | |
141 | __put_user(env->pc, &si->si_regs.pc); | |
142 | __put_user(env->npc, &si->si_regs.npc); | |
143 | __put_user(env->y, &si->si_regs.y); | |
144 | for (i=0; i < 8; i++) { | |
145 | __put_user(env->gregs[i], &si->si_regs.u_regs[i]); | |
146 | } | |
147 | for (i=0; i < 8; i++) { | |
80180eb2 | 148 | __put_user(env->regwptr[WREG_O0 + i], &si->si_regs.u_regs[i + 8]); |
9f172adb LV |
149 | } |
150 | __put_user(mask, &si->si_mask); | |
151 | return err; | |
152 | } | |
153 | ||
9f172adb LV |
154 | #define NF_ALIGNEDSZ (((sizeof(struct target_signal_frame) + 7) & (~7))) |
155 | ||
156 | void setup_frame(int sig, struct target_sigaction *ka, | |
157 | target_sigset_t *set, CPUSPARCState *env) | |
158 | { | |
159 | abi_ulong sf_addr; | |
160 | struct target_signal_frame *sf; | |
161 | int sigframe_size, err, i; | |
162 | ||
163 | /* 1. Make sure everything is clean */ | |
164 | //synchronize_user_stack(); | |
165 | ||
166 | sigframe_size = NF_ALIGNEDSZ; | |
167 | sf_addr = get_sigframe(ka, env, sigframe_size); | |
168 | trace_user_setup_frame(env, sf_addr); | |
169 | ||
170 | sf = lock_user(VERIFY_WRITE, sf_addr, | |
171 | sizeof(struct target_signal_frame), 0); | |
172 | if (!sf) { | |
173 | goto sigsegv; | |
174 | } | |
175 | #if 0 | |
176 | if (invalid_frame_pointer(sf, sigframe_size)) | |
177 | goto sigill_and_return; | |
178 | #endif | |
179 | /* 2. Save the current process state */ | |
180 | err = setup___siginfo(&sf->info, env, set->sig[0]); | |
181 | __put_user(0, &sf->extra_size); | |
182 | ||
183 | //save_fpu_state(regs, &sf->fpu_state); | |
184 | //__put_user(&sf->fpu_state, &sf->fpu_save); | |
185 | ||
186 | __put_user(set->sig[0], &sf->info.si_mask); | |
187 | for (i = 0; i < TARGET_NSIG_WORDS - 1; i++) { | |
188 | __put_user(set->sig[i + 1], &sf->extramask[i]); | |
189 | } | |
190 | ||
191 | for (i = 0; i < 8; i++) { | |
80180eb2 | 192 | __put_user(env->regwptr[i + WREG_L0], &sf->ss.locals[i]); |
9f172adb LV |
193 | } |
194 | for (i = 0; i < 8; i++) { | |
9c226a11 | 195 | __put_user(env->regwptr[i + WREG_I0], &sf->ss.ins[i]); |
9f172adb LV |
196 | } |
197 | if (err) | |
198 | goto sigsegv; | |
199 | ||
200 | /* 3. signal handler back-trampoline and parameters */ | |
8d9c72a2 | 201 | env->regwptr[WREG_SP] = sf_addr; |
80180eb2 RH |
202 | env->regwptr[WREG_O0] = sig; |
203 | env->regwptr[WREG_O1] = sf_addr + | |
9f172adb | 204 | offsetof(struct target_signal_frame, info); |
80180eb2 | 205 | env->regwptr[WREG_O2] = sf_addr + |
9f172adb LV |
206 | offsetof(struct target_signal_frame, info); |
207 | ||
208 | /* 4. signal handler */ | |
209 | env->pc = ka->_sa_handler; | |
210 | env->npc = (env->pc + 4); | |
211 | /* 5. return to kernel instructions */ | |
212 | if (ka->ka_restorer) { | |
80180eb2 | 213 | env->regwptr[WREG_O7] = ka->ka_restorer; |
9f172adb LV |
214 | } else { |
215 | uint32_t val32; | |
216 | ||
80180eb2 | 217 | env->regwptr[WREG_O7] = sf_addr + |
9f172adb LV |
218 | offsetof(struct target_signal_frame, insns) - 2 * 4; |
219 | ||
220 | /* mov __NR_sigreturn, %g1 */ | |
221 | val32 = 0x821020d8; | |
222 | __put_user(val32, &sf->insns[0]); | |
223 | ||
224 | /* t 0x10 */ | |
225 | val32 = 0x91d02010; | |
226 | __put_user(val32, &sf->insns[1]); | |
9f172adb LV |
227 | } |
228 | unlock_user(sf, sf_addr, sizeof(struct target_signal_frame)); | |
229 | return; | |
230 | #if 0 | |
231 | sigill_and_return: | |
232 | force_sig(TARGET_SIGILL); | |
233 | #endif | |
234 | sigsegv: | |
235 | unlock_user(sf, sf_addr, sizeof(struct target_signal_frame)); | |
236 | force_sigsegv(sig); | |
237 | } | |
238 | ||
239 | void setup_rt_frame(int sig, struct target_sigaction *ka, | |
240 | target_siginfo_t *info, | |
241 | target_sigset_t *set, CPUSPARCState *env) | |
242 | { | |
8f0ea816 | 243 | qemu_log_mask(LOG_UNIMP, "setup_rt_frame: not implemented\n"); |
9f172adb LV |
244 | } |
245 | ||
246 | long do_sigreturn(CPUSPARCState *env) | |
247 | { | |
248 | abi_ulong sf_addr; | |
249 | struct target_signal_frame *sf; | |
250 | uint32_t up_psr, pc, npc; | |
251 | target_sigset_t set; | |
252 | sigset_t host_set; | |
bba390cb | 253 | int i; |
9f172adb | 254 | |
8d9c72a2 | 255 | sf_addr = env->regwptr[WREG_SP]; |
9f172adb LV |
256 | trace_user_do_sigreturn(env, sf_addr); |
257 | if (!lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) { | |
258 | goto segv_and_exit; | |
259 | } | |
260 | ||
261 | /* 1. Make sure we are not getting garbage from the user */ | |
262 | ||
263 | if (sf_addr & 3) | |
264 | goto segv_and_exit; | |
265 | ||
266 | __get_user(pc, &sf->info.si_regs.pc); | |
267 | __get_user(npc, &sf->info.si_regs.npc); | |
268 | ||
269 | if ((pc | npc) & 3) { | |
270 | goto segv_and_exit; | |
271 | } | |
272 | ||
273 | /* 2. Restore the state */ | |
274 | __get_user(up_psr, &sf->info.si_regs.psr); | |
275 | ||
276 | /* User can only change condition codes and FPU enabling in %psr. */ | |
277 | env->psr = (up_psr & (PSR_ICC /* | PSR_EF */)) | |
278 | | (env->psr & ~(PSR_ICC /* | PSR_EF */)); | |
279 | ||
280 | env->pc = pc; | |
281 | env->npc = npc; | |
282 | __get_user(env->y, &sf->info.si_regs.y); | |
283 | for (i=0; i < 8; i++) { | |
284 | __get_user(env->gregs[i], &sf->info.si_regs.u_regs[i]); | |
285 | } | |
286 | for (i=0; i < 8; i++) { | |
80180eb2 | 287 | __get_user(env->regwptr[i + WREG_O0], &sf->info.si_regs.u_regs[i + 8]); |
9f172adb LV |
288 | } |
289 | ||
290 | /* FIXME: implement FPU save/restore: | |
bba390cb PM |
291 | * __get_user(fpu_save, &sf->fpu_save); |
292 | * if (fpu_save) { | |
293 | * if (restore_fpu_state(env, fpu_save)) { | |
294 | * goto segv_and_exit; | |
295 | * } | |
296 | * } | |
297 | */ | |
9f172adb LV |
298 | |
299 | /* This is pretty much atomic, no amount locking would prevent | |
300 | * the races which exist anyways. | |
301 | */ | |
302 | __get_user(set.sig[0], &sf->info.si_mask); | |
303 | for(i = 1; i < TARGET_NSIG_WORDS; i++) { | |
304 | __get_user(set.sig[i], &sf->extramask[i - 1]); | |
305 | } | |
306 | ||
307 | target_to_host_sigset_internal(&host_set, &set); | |
308 | set_sigmask(&host_set); | |
309 | ||
9f172adb LV |
310 | unlock_user_struct(sf, sf_addr, 0); |
311 | return -TARGET_QEMU_ESIGRETURN; | |
312 | ||
313 | segv_and_exit: | |
314 | unlock_user_struct(sf, sf_addr, 0); | |
315 | force_sig(TARGET_SIGSEGV); | |
316 | return -TARGET_QEMU_ESIGRETURN; | |
317 | } | |
318 | ||
319 | long do_rt_sigreturn(CPUSPARCState *env) | |
320 | { | |
321 | trace_user_do_rt_sigreturn(env, 0); | |
8f0ea816 | 322 | qemu_log_mask(LOG_UNIMP, "do_rt_sigreturn: not implemented\n"); |
9f172adb LV |
323 | return -TARGET_ENOSYS; |
324 | } | |
325 | ||
326 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) | |
327 | #define SPARC_MC_TSTATE 0 | |
328 | #define SPARC_MC_PC 1 | |
329 | #define SPARC_MC_NPC 2 | |
330 | #define SPARC_MC_Y 3 | |
331 | #define SPARC_MC_G1 4 | |
332 | #define SPARC_MC_G2 5 | |
333 | #define SPARC_MC_G3 6 | |
334 | #define SPARC_MC_G4 7 | |
335 | #define SPARC_MC_G5 8 | |
336 | #define SPARC_MC_G6 9 | |
337 | #define SPARC_MC_G7 10 | |
338 | #define SPARC_MC_O0 11 | |
339 | #define SPARC_MC_O1 12 | |
340 | #define SPARC_MC_O2 13 | |
341 | #define SPARC_MC_O3 14 | |
342 | #define SPARC_MC_O4 15 | |
343 | #define SPARC_MC_O5 16 | |
344 | #define SPARC_MC_O6 17 | |
345 | #define SPARC_MC_O7 18 | |
346 | #define SPARC_MC_NGREG 19 | |
347 | ||
348 | typedef abi_ulong target_mc_greg_t; | |
349 | typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG]; | |
350 | ||
351 | struct target_mc_fq { | |
352 | abi_ulong *mcfq_addr; | |
353 | uint32_t mcfq_insn; | |
354 | }; | |
355 | ||
356 | struct target_mc_fpu { | |
357 | union { | |
358 | uint32_t sregs[32]; | |
359 | uint64_t dregs[32]; | |
360 | //uint128_t qregs[16]; | |
361 | } mcfpu_fregs; | |
362 | abi_ulong mcfpu_fsr; | |
363 | abi_ulong mcfpu_fprs; | |
364 | abi_ulong mcfpu_gsr; | |
365 | struct target_mc_fq *mcfpu_fq; | |
366 | unsigned char mcfpu_qcnt; | |
367 | unsigned char mcfpu_qentsz; | |
368 | unsigned char mcfpu_enab; | |
369 | }; | |
370 | typedef struct target_mc_fpu target_mc_fpu_t; | |
371 | ||
372 | typedef struct { | |
373 | target_mc_gregset_t mc_gregs; | |
374 | target_mc_greg_t mc_fp; | |
375 | target_mc_greg_t mc_i7; | |
376 | target_mc_fpu_t mc_fpregs; | |
377 | } target_mcontext_t; | |
378 | ||
379 | struct target_ucontext { | |
380 | struct target_ucontext *tuc_link; | |
381 | abi_ulong tuc_flags; | |
382 | target_sigset_t tuc_sigmask; | |
383 | target_mcontext_t tuc_mcontext; | |
384 | }; | |
385 | ||
386 | /* A V9 register window */ | |
387 | struct target_reg_window { | |
388 | abi_ulong locals[8]; | |
389 | abi_ulong ins[8]; | |
390 | }; | |
391 | ||
392 | #define TARGET_STACK_BIAS 2047 | |
393 | ||
394 | /* {set, get}context() needed for 64-bit SparcLinux userland. */ | |
395 | void sparc64_set_context(CPUSPARCState *env) | |
396 | { | |
397 | abi_ulong ucp_addr; | |
398 | struct target_ucontext *ucp; | |
399 | target_mc_gregset_t *grp; | |
400 | abi_ulong pc, npc, tstate; | |
401 | abi_ulong fp, i7, w_addr; | |
402 | unsigned int i; | |
403 | ||
80180eb2 | 404 | ucp_addr = env->regwptr[WREG_O0]; |
9f172adb LV |
405 | if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) { |
406 | goto do_sigsegv; | |
407 | } | |
408 | grp = &ucp->tuc_mcontext.mc_gregs; | |
409 | __get_user(pc, &((*grp)[SPARC_MC_PC])); | |
410 | __get_user(npc, &((*grp)[SPARC_MC_NPC])); | |
411 | if ((pc | npc) & 3) { | |
412 | goto do_sigsegv; | |
413 | } | |
80180eb2 | 414 | if (env->regwptr[WREG_O1]) { |
9f172adb LV |
415 | target_sigset_t target_set; |
416 | sigset_t set; | |
417 | ||
418 | if (TARGET_NSIG_WORDS == 1) { | |
419 | __get_user(target_set.sig[0], &ucp->tuc_sigmask.sig[0]); | |
420 | } else { | |
421 | abi_ulong *src, *dst; | |
422 | src = ucp->tuc_sigmask.sig; | |
423 | dst = target_set.sig; | |
424 | for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { | |
425 | __get_user(*dst, src); | |
426 | } | |
427 | } | |
428 | target_to_host_sigset_internal(&set, &target_set); | |
429 | set_sigmask(&set); | |
430 | } | |
431 | env->pc = pc; | |
432 | env->npc = npc; | |
433 | __get_user(env->y, &((*grp)[SPARC_MC_Y])); | |
434 | __get_user(tstate, &((*grp)[SPARC_MC_TSTATE])); | |
435 | env->asi = (tstate >> 24) & 0xff; | |
436 | cpu_put_ccr(env, tstate >> 32); | |
437 | cpu_put_cwp64(env, tstate & 0x1f); | |
438 | __get_user(env->gregs[1], (&(*grp)[SPARC_MC_G1])); | |
439 | __get_user(env->gregs[2], (&(*grp)[SPARC_MC_G2])); | |
440 | __get_user(env->gregs[3], (&(*grp)[SPARC_MC_G3])); | |
441 | __get_user(env->gregs[4], (&(*grp)[SPARC_MC_G4])); | |
442 | __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); | |
443 | __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); | |
444 | __get_user(env->gregs[7], (&(*grp)[SPARC_MC_G7])); | |
80180eb2 RH |
445 | __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); |
446 | __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); | |
447 | __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); | |
448 | __get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3])); | |
449 | __get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4])); | |
450 | __get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5])); | |
451 | __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); | |
452 | __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); | |
9f172adb LV |
453 | |
454 | __get_user(fp, &(ucp->tuc_mcontext.mc_fp)); | |
455 | __get_user(i7, &(ucp->tuc_mcontext.mc_i7)); | |
456 | ||
80180eb2 | 457 | w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6]; |
9f172adb LV |
458 | if (put_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), |
459 | abi_ulong) != 0) { | |
460 | goto do_sigsegv; | |
461 | } | |
462 | if (put_user(i7, w_addr + offsetof(struct target_reg_window, ins[7]), | |
463 | abi_ulong) != 0) { | |
464 | goto do_sigsegv; | |
465 | } | |
466 | /* FIXME this does not match how the kernel handles the FPU in | |
467 | * its sparc64_set_context implementation. In particular the FPU | |
468 | * is only restored if fenab is non-zero in: | |
469 | * __get_user(fenab, &(ucp->tuc_mcontext.mc_fpregs.mcfpu_enab)); | |
470 | */ | |
471 | __get_user(env->fprs, &(ucp->tuc_mcontext.mc_fpregs.mcfpu_fprs)); | |
472 | { | |
473 | uint32_t *src = ucp->tuc_mcontext.mc_fpregs.mcfpu_fregs.sregs; | |
474 | for (i = 0; i < 64; i++, src++) { | |
475 | if (i & 1) { | |
476 | __get_user(env->fpr[i/2].l.lower, src); | |
477 | } else { | |
478 | __get_user(env->fpr[i/2].l.upper, src); | |
479 | } | |
480 | } | |
481 | } | |
482 | __get_user(env->fsr, | |
483 | &(ucp->tuc_mcontext.mc_fpregs.mcfpu_fsr)); | |
484 | __get_user(env->gsr, | |
485 | &(ucp->tuc_mcontext.mc_fpregs.mcfpu_gsr)); | |
486 | unlock_user_struct(ucp, ucp_addr, 0); | |
487 | return; | |
488 | do_sigsegv: | |
489 | unlock_user_struct(ucp, ucp_addr, 0); | |
490 | force_sig(TARGET_SIGSEGV); | |
491 | } | |
492 | ||
493 | void sparc64_get_context(CPUSPARCState *env) | |
494 | { | |
495 | abi_ulong ucp_addr; | |
496 | struct target_ucontext *ucp; | |
497 | target_mc_gregset_t *grp; | |
498 | target_mcontext_t *mcp; | |
499 | abi_ulong fp, i7, w_addr; | |
500 | int err; | |
501 | unsigned int i; | |
502 | target_sigset_t target_set; | |
503 | sigset_t set; | |
504 | ||
80180eb2 | 505 | ucp_addr = env->regwptr[WREG_O0]; |
9f172adb LV |
506 | if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) { |
507 | goto do_sigsegv; | |
508 | } | |
509 | ||
510 | mcp = &ucp->tuc_mcontext; | |
511 | grp = &mcp->mc_gregs; | |
512 | ||
513 | /* Skip over the trap instruction, first. */ | |
514 | env->pc = env->npc; | |
515 | env->npc += 4; | |
516 | ||
517 | /* If we're only reading the signal mask then do_sigprocmask() | |
518 | * is guaranteed not to fail, which is important because we don't | |
519 | * have any way to signal a failure or restart this operation since | |
520 | * this is not a normal syscall. | |
521 | */ | |
522 | err = do_sigprocmask(0, NULL, &set); | |
523 | assert(err == 0); | |
524 | host_to_target_sigset_internal(&target_set, &set); | |
525 | if (TARGET_NSIG_WORDS == 1) { | |
526 | __put_user(target_set.sig[0], | |
527 | (abi_ulong *)&ucp->tuc_sigmask); | |
528 | } else { | |
529 | abi_ulong *src, *dst; | |
530 | src = target_set.sig; | |
531 | dst = ucp->tuc_sigmask.sig; | |
532 | for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { | |
533 | __put_user(*src, dst); | |
534 | } | |
535 | if (err) | |
536 | goto do_sigsegv; | |
537 | } | |
538 | ||
539 | /* XXX: tstate must be saved properly */ | |
540 | // __put_user(env->tstate, &((*grp)[SPARC_MC_TSTATE])); | |
541 | __put_user(env->pc, &((*grp)[SPARC_MC_PC])); | |
542 | __put_user(env->npc, &((*grp)[SPARC_MC_NPC])); | |
543 | __put_user(env->y, &((*grp)[SPARC_MC_Y])); | |
544 | __put_user(env->gregs[1], &((*grp)[SPARC_MC_G1])); | |
545 | __put_user(env->gregs[2], &((*grp)[SPARC_MC_G2])); | |
546 | __put_user(env->gregs[3], &((*grp)[SPARC_MC_G3])); | |
547 | __put_user(env->gregs[4], &((*grp)[SPARC_MC_G4])); | |
548 | __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); | |
549 | __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); | |
550 | __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); | |
80180eb2 RH |
551 | __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); |
552 | __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); | |
553 | __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); | |
554 | __put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3])); | |
555 | __put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4])); | |
556 | __put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5])); | |
557 | __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); | |
558 | __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); | |
559 | ||
560 | w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6]; | |
9f172adb LV |
561 | fp = i7 = 0; |
562 | if (get_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), | |
563 | abi_ulong) != 0) { | |
564 | goto do_sigsegv; | |
565 | } | |
566 | if (get_user(i7, w_addr + offsetof(struct target_reg_window, ins[7]), | |
567 | abi_ulong) != 0) { | |
568 | goto do_sigsegv; | |
569 | } | |
570 | __put_user(fp, &(mcp->mc_fp)); | |
571 | __put_user(i7, &(mcp->mc_i7)); | |
572 | ||
573 | { | |
574 | uint32_t *dst = ucp->tuc_mcontext.mc_fpregs.mcfpu_fregs.sregs; | |
575 | for (i = 0; i < 64; i++, dst++) { | |
576 | if (i & 1) { | |
577 | __put_user(env->fpr[i/2].l.lower, dst); | |
578 | } else { | |
579 | __put_user(env->fpr[i/2].l.upper, dst); | |
580 | } | |
581 | } | |
582 | } | |
583 | __put_user(env->fsr, &(mcp->mc_fpregs.mcfpu_fsr)); | |
584 | __put_user(env->gsr, &(mcp->mc_fpregs.mcfpu_gsr)); | |
585 | __put_user(env->fprs, &(mcp->mc_fpregs.mcfpu_fprs)); | |
586 | ||
587 | if (err) | |
588 | goto do_sigsegv; | |
589 | unlock_user_struct(ucp, ucp_addr, 1); | |
590 | return; | |
591 | do_sigsegv: | |
592 | unlock_user_struct(ucp, ucp_addr, 1); | |
593 | force_sig(TARGET_SIGSEGV); | |
594 | } | |
595 | #endif |